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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 73 records · Page 4
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

Investigation of fast and efficient lossless compression algorithms for macromolecular crystallography experiments

Structural biology experiments benefit significantly from state-of-the-art synchrotron data collection. One can acquire macromolecular crystallography (MX) diffraction data on large-area photon-counting pixel-array detectors at framing rates exceeding 1000 frames per second, using 200 Gbps network connectivity, or higher when available. In extreme cases this represents a raw data throughput of about 25 GB s −1 , which is nearly impossible to deliver at reasonable cost without compression. Our field has used lossless compression for decades to make such data collection manageable. Many MX beamlines are now fitted with DECTRIS Eiger detectors, all of which are delivered with optimized compression algorithms by default, and they perform well with current framing rates and typical diffraction data. However, better lossless compression algorithms have been developed and are now available to the research community. Here one of the latest and most promising lossless compression algorithms is investigated on a variety of diffraction data like those routinely acquired at state-of-the-art MX beamlines.

36 MATERIALS SCIENCE↗
DOE OSTI2024

A Cryogenic readout integrated circuit with analog pile-up and in-Pixel ADC for high frame rate Skipper CCD-in-CMOS Sensors

The Skipper CCD-in-CMOS Parallel Read-Out Circuit V2 (SPROCKET2) is designed to enable high frame rate readout of Skipper CCD-in-CMOS image sensors. The SPROCKET2 pixel is fabricated in a 65 nm CMOS process and occupies a 60$\mu$m $\times$ 60$\mu$m footprint. SPROCKET2 is intended to be heterogeneously integrated with a pixelated Skipper CCD-in-CMOS sensor, such that one readout pixel is connected to a multiplexed array of 16 active image sensor pixels, to match their spatial geometry. Our design benefits from the Skipper CCD-in-CMOS sensor's non-destructive readout capability to achieve exceptionally low noise through multi-sampling and averaging while optimizing for total power consumption. The pixel readout utilizes correlated double sampling to minimize 1/f noise and includes "pile-up" of ten successive samples in the analog domain before digitizing at a rate of 66.7 ksps. Measurement results of in-pixel serial SAR ADC show DNL and INL of ~0. 44 LSB and 0.58 LBS respectively. A large area array of 20,000 SPROCKET2 ADC pixels (multiplexed 1:16 to 320,000 sensor pixels) is currently under test. By reading out data over a 10 Gbps optical link, this pixel design enables a frame rate of $\sim$ 4 kfps for large sensing areas with minimal sensing deadtime. In the highest gain mode, the pixelated ADC has an input-referred resolution of 10$\mu$V with a simulated power consumption of 50$\mu$W. The pixel operates with constant current draw to minimize power-rail crosstalk.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2025

FedCSpc: A Cross-Silo Federated Learning System With Error-Bounded Lossy Parameter Compression

Cross-Silo federated learning is widely used for scaling deep neural network (DNN) training over data silos from different locations worldwide while guaranteeing data privacy. Communication has been identified as the main bottleneck when training large-scale models due to large-volume model parameters and gradient transmission across public networks with limited bandwidth. Most previous works focus on gradient compression, while limited work tries to compress parameters that can not be ignored and extremely affect communication performance during the training. Here, to bridge this gap, we propose FedCSpc: an efficient cross-silo federated learning system with an XAI-driven adaptive parameter compression strategy for large-scale model training. Our work substantially differs from existing gradient compression techniques due to the distinct data features of gradient and parameter. The key contributions of this paper are fourfold. (1) Our designed FedCSpc proposes to compress the parameter during the training using the state-of-the-art error-bounded lossy compressor – SZ3. (2) We develop an adaptive compression error bound adjustment algorithm to guarantee the model accuracy effectively. (3) We exploit an efficient approach to utilize the idle CPU resources of clients to compress the parameters. (4) We perform a comprehensive evaluation with a wide range of models and benchmarks on a GPU cluster with 65 GPUs. Results show that FedCSpc can achieve the same model accuracy as FedAvg while reducing the data volume of parameters and gradients in communication by up to 7.39× and 288×, respectively. With 32 clients on a 4 Gb size model, FedCSpc significantly outperforms FedAvg in wall-clock time in the emulated WAN environment (at the bandwidth of 1 Gbps or lower without loss of generality).

SZ3↗
DOE OSTI2025

eCounter: Inline Per-IP Network Monitoring at Millisecond Resolution via eBPF

Scientific data acquisition (SciDAQ) systems are shifting from archive-based workflows to streaming paradigms, where real-time, fine-grained network monitoring becomes essential. While P4-enabled devices offer per-packet in-band observability, they require specialized switches and routers. Host-side tools like Prometheus exporters lack sufficient temporal granularity. To bridge this gap, we present eCounter, a lightweight, hardware-agnostic, inline telemetry agent built on extended Berkeley Packet Filter (eBPF). eCounter captures per-interface ingress and egress traffic, categorized by IP address and protocol, at millisecond to sub-millisecond resolution. In a 100 Gbps environment, it continuously exports up to 3,257 time-series bins per second with only 4% CPU utilization at a 35¿KiB/s data rate. We evaluate eCounter across diverse NIC MTU settings, hook types, CPU architectures and operating systems, and observed negligible impact on concurrent high-throughput streaming applications. Complexity analysis confirms that it can be readily scaled to distributed SciDAQ deployments.

Mei, Xinxin [Computational Sciences and Technology↗
DOE OSTI2026

Quantum entanglement distribution coexisting with high-rate, broadband classical optical communications over a real-world fiber connecting remote, synchronized nodes

Compatibility with existing classical network infrastructure offers a scalable path towards deploying large-scale quantum networks. Here, we demonstrate O-band polarization-encoded quantum entanglement distribution over an installed 24.4-km fiber while coexisting with a state-of-the-art fully loaded C-band classical communications line system and a picosecond-level precision L-band synchronization signal. The classical system carries two 800-Gbps channels while the remainder of the C-band is filled with amplified spontaneous emission, as is standard for such state-of-the-art communications systems. We examine the spontaneous Raman scattering spectrum generated from this broadband C-band light and offer insights into wavelength allocation for O-band quantum channels. Optimal wavelength selection and narrow filtering enable well-preserved Bell state fidelity when coexisting with 21.4-dBm aggregate launch power across the C-band suitable for 36-Tbps transmission. To the best of our knowledge, this is the first implementation of entanglement-based quantum communications between two remote nodes coexisting with independent classical communications traffic. We demonstrate coexistence of quantum entanglement with ultra-high power levels and record classical bandwidth, offering promise for real-world entanglement-based networking integrated within high-capacity communications infrastructure.

Talcott, Gina M. [Northwestern U.] (ORCID:00000002↗
DOE OSTI2024

Characterization of throughput on the AXI DMA bus for burst data transfer over Ethernet

cThe Xilinx AXI Direct Memory Access (AXI DMA) module is an efficient solution for medium-speed data transfer in Xilinx SoC FPGAs, supporting data rates greater than 1000 Gbps even in very suboptimal operating modes. It facilitates direct transfer of AXI stream data into processor memory without constant software intervention, which reduces overhead and ensures consistent data logging. By utilizing the FPGA's available memory, large circular buffers (1-5 GiB) are used to buffer data and accommodate network limitations, enabling high-rate data bursts. In this study, we measured the performance of AXI DMA under conditions simulating its lowest practical data transfer speeds. The Arbitrary Length Data Sender was used to transmit AXI stream packets at 32-bit width and 100 MHz frequency, a narrow width and slow speed. Results show that the AXI DMA can transfer up to 3192.76 Mbps with large packet sizes but experiences reduced performance for smaller packets, as low as 2.6 Mbps for 4-byte packets. For Ethernet-limited applications, packet sizes between 8,000 and 16,000 bytes provided optimal transfer speeds of 874 to 1600 Mbps. These findings suggest that the AXI DMA is not the limiting factor in systems where packet sizes exceed 8,000 bytes.

43 PARTICLE ACCELERATORS↗
NASA NTRS1983

Advanced digital modulation: Communication techniques and monolithic GaAs technology

Communications theory and practice are merged with state-of-the-art technology in IC fabrication, especially monolithic GaAs technology, to examine the general feasibility of a number of advanced technology digital transmission systems. Satellite-channel models with (1) superior throughput, perhaps 2 Gbps; (2) attractive weight and cost; and (3) high RF power and spectrum efficiency are discussed. Transmission techniques possessing reasonably simple architectures capable of monolithic fabrication at high speeds were surveyed. This included a review of amplitude/phase shift keying (APSK) techniques and the continuous-phase-modulation (CPM) methods, of which MSK represents the simplest case.

Wilson, S. G.↗
NASA NTRS1981

A low-power, high-throughput maximum-likelihood convolutional decoder chip for NASA's 30/20 GHz program

It is pointed out that the NASA 30/20 GHz program will place in geosynchronous orbit a technically advanced communication satellite which can process time-division multiple access (TDMA) information bursts with a data throughput in excess of 4 GBPS. To guarantee acceptable data quality during periods of signal attenuation it will be necessary to provide a significant forward error correction (FEC) capability. Convolutional decoding (utilizing the maximum-likelihood techniques) was identified as the most attractive FEC strategy. Design trade-offs regarding a maximum-likelihood convolutional decoder (MCD) in a single-chip CMOS implementation are discussed.

Mccallister, R. D.↗
NASA NTRS1990

CSMA/RN: A universal protocol for gigabit networks

Networks must provide intelligent access for nodes to share the communications resources. In the range of 100 Mbps to 1 Gbps, the demand access class of protocols were studied extensively. Many use some form of slot or reservation system and many the concept of attempt and defer to determine the presence or absence of incoming information. The random access class of protocols like shared channel systems (Ethernet), also use the concept of attempt and defer in the form of carrier sensing to alleviate the damaging effects of collisions. In CSMA/CD, the sensing of interference is on a global basis. All systems discussed above have one aspect in common, they examine activity on the network either locally or globally and react in an attempt and whatever mechanism. Of the attempt + mechanisms discussed, one is obviously missing; that is attempt and truncate. Attempt and truncate was studied in a ring configuration called the Carrier Sensed Multiple Access Ring Network (CSMA/RN). The system features of CSMA/RN are described including a discussion of the node operations for inserting and removing messages and for handling integrated traffic. The performance and operational features based on analytical and simulation studies which indicate that CSMA/RN is a useful and adaptable protocol over a wide range of network conditions are discussed. Finally, the research and development activities necessary to demonstrate and realize the potential of CSMA/RN as a universal, gigabit network protocol is outlined.

Foudriat, E. C.↗
NASA NTRS1986

NASA 60 GHz intersatellite communication link definition study. Baseline document

The overall system and component concepts for a 60 GHz intersatellite communications link system (ICLS) are described. The ICLS was designed to augment the capabilities of the current Tracking and Data Relay Satellite System (TDRSS), providing a data rate capacity large enough to accommodate the expected rates for user satellites (USAT's) in the post-1995 timeframe. The use of 60 GHz for the anticipated successor to TDRSS, the Tracking and Data Acquisition System (TDAS), was selected because of current technology development that will enable multigigibit data rates. Additionally, the attenuation of the earth's atmosphere at 60 GHz means that there is virtually no possibility of terrestrially generated interference (intentional or accidental) or terrestrially based intercept. The ICLS includes the following functional areas: (1) the ICLS payload package on the GEO TDAS satellite that communicates simultaneously with up to five LEO USAT's; (2) the payload package on the USAT that communicates with the TDAS satellite; and (3) the crosslink payload package on the TDAS satellite that communicates with another TDAS satellite. Two methods of data relay on-board the TDAS spacecraft were addressed. One is a complete baseband system (demod and remod) with a bi-directional 2 Gbps data stream; the other is a channelized system wherein some of the channels are baseband and others are merely frequency translated before re-transmission. Descriptions of the TDAS antenna, transmitter, receiver, and mechanical designs are presented.

Source record↗
NASA NTRS1986

NASA 60 GHz intersatellite links definition study. Final Review

Viewgraphs are presented which outline the overall system and component concepts for a 60 GHz intersatellite communications link system (ICLS). The ICLS was designed to augment the capabilities of the current Tracking and Data Relay Satellite System (TDRSS), providing a data rate capacity large enough to accommodate the expected rates for user satellites (USAT's) in the post-1995 timeframe. Two methods of data relay on-board the planned TDAS (Tracking and Data Acquisition) satellites are described. One is an all-baseband system with a bi-directional 2 Gbps data stream; the other is a channelized crosslink system wherein some of the channels are baseband and others are merely frequency translated before re-transmission. The general system and technology design drivers are outlined along with the acquisition architecture design. Descriptions of the TDAS antenna, transmitter, receiver, and mechanical hardware are presented.

Source record↗
NASA NTRS1989

User RF requirements for a Ka-band data relay satellite link

The user G/T and EIRP requirements were determined for a data relay satellite link consisting of a forward link to 360 Mbps at 23 GHz and a return link to 2 Gbps at 26.5 GHz. Hardware for this data link would be a modular expansion to the NASA Data Link Module. Calculations were based on a data relay satellite model of predetermined characteristics patterned after the NASA Tracking and Data Relay Satellite (TDRS). The desired data rates could be achieved with a G/T of 21.7 dB/deg K (forward link) and an EIRP of 68.2 dBW (return link) for the user satellite. Hardware configurations meeting these requirements are discussed in terms of RF performance, efficiency, reliability, and modular flexibility. A planar array configuration emerges as the logical candidate for most NASA missions. Pertinent Ka-band technology and certain ongoing research efforts are reviewed. Areas of particular interest include new power device families, 0.25-micron low-noise HEMT technology, and fiber optic distribution and control of RF arrays.

Copeland, David J.↗
NASA NTRS1989

NASA/GSFC program in direct detection optical communications for intersatellite links

NASA-Goddard has undertaken the development of direct-detection optical communications for space applications at the Gbps data rate channel capability level. The primary challenges to optical communications designers lie in the development of reliable optical power sources, as well as of high performance pointing/acquisition/tracking systems required by the narrow widths of the transmitted optical beams. GaAlAs diodes and their arrays are currently the most attractive technology for optical transmitters; pioneering work has also been conducted on dichroic and grating techniques for combining the power of several laser diodes. Attention is given to the performance obtained for an optical link acquisition and submicroradian tracking/pointing system.

Fitzmaurice, M.↗
NASA NTRS1990

Highball: A high speed, reserved-access, wide area network

A network architecture called Highball and a preliminary design for a prototype, wide-area data network designed to operate at speeds of 1 Gbps and beyond are described. It is intended for applications requiring high speed burst transmissions where some latency between requesting a transmission and granting the request can be anticipated and tolerated. Examples include real-time video and disk-disk transfers, national filestore access, remote sensing, and similar applications. The network nodes include an intelligent crossbar switch, but have no buffering capabilities; thus, data must be queued at the end nodes. There are no restrictions on the network topology, link speeds, or end-end protocols. The end system, nodes, and links can operate at any speed up to the limits imposed by the physical facilities. An overview of an initial design approach is presented and is intended as a benchmark upon which a detailed design can be developed. It describes the network architecture and proposed access protocols, as well as functional descriptions of the hardware and software components that could be used in a prototype implementation. It concludes with a discussion of additional issues to be resolved in continuing stages of this project.

Mills, David L.↗
NASA NTRS1991

Communications systems evolutionary scenarios for Martian SEI support

A set of architectures for the Mars-earth SEI space communications link is identified and characterized. A 'road map' is defined that illustrates the most logical and efficient evolutionary paths for the SEI Mars-earth link. The major features of the road map include three alternative evolutionary paths meeting the data rate requirements that may grow from 10 Mbps to 1 Gbps in the 2008-2025 time frame. All three paths begin with a Ka-band MRS-EST baseline link in 2000, and diverge from this baseline as time progresses.

Kwong, P. W.↗
NASA NTRS1993

An ASIC memory buffer controller for a high speed disk system

The need for large capacity, high speed mass memory storage devices has become increasingly evident at NASA during the past decade. High performance mass storage systems are crucial to present and future NASA systems. Spaceborne data storage system requirements have grown in response to the increasing amounts of data generated and processed by orbiting scientific experiments. Predictions indicate increases in the volume of data by orders of magnitude during the next decade. Current predictions are for storage capacities on the order of terabits (Tb), with data rates exceeding one gigabit per second (Gbps). As part of the design effort for a state of the art mass storage system, NASA Langley has designed a 144 CMOS ASIC to support high speed data transfers. This paper discusses the system architecture, ASIC design and some of the lessons learned in the development process.

Hodson, Robert F.↗
NASA NTRS1994

Telecommunications issues of intelligent database management for ground processing systems in the EOS era

Future NASA earth science missions, including the Earth Observing System (EOS), will be generating vast amounts of data that must be processed and stored at various locations around the world. Here we present a stepwise-refinement of the intelligent database management (IDM) of the distributed active archive center (DAAC - one of seven regionally-located EOSDIS archive sites) architecture, to showcase the telecommunications issues involved. We develop this architecture into a general overall design. We show that the current evolution of protocols is sufficient to support IDM at Gbps rates over large distances. We also show that network design can accommodate a flexible data ingestion storage pipeline and a user extraction and visualization engine, without interference between the two.

Touch, Joseph D.↗
NASA NTRS2000

An Assessment of Gigabit Ethernet Technology and Its Applications at the NASA Glenn Research Center

This paper describes Gigabit Ethernet and its role in supporting R&D programs at NASA Glenn. These programs require an advanced high-speed network capable of transporting multimedia traffic, including real-time visualization, high- resolution graphics, and scientific data. GigE is a 1 Gbps extension to 10 and 100 Mbps Ethernet. The IEEE 802.3z and 802.3ab standards define the MAC layer and 1000BASE-X and 1000BASE-T physical layer specifications for GigE. GigE switches and buffered distributors support IEEE 802.3x flow control. The paper also compares GigE with ATM in terms of quality of service, data rate, throughput, scalability, interoperability, network management, and cost of ownership.

Bakes, Catherine Murphy↗