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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 73 records · Page 4
All sourcesNASA NTRSDOE OSTI
DOE OSTI2019

Software Defined Networking for HPC Interconnects and its Extension across Domains (Final Technical Report for DE-SC0016039)

This project seeks to incorporate OpenFlow-style Software Defined Networking capability into existing High Performance Computing (HPC) interconnect technology, InfiniBand, and to extend such capability beyond one domain. We develop SDN-enhanced InfiniBand that supports OpenFlow functionality for HPC interconnects, investigate the required techniques and the potential benefits for applying SDN on different types of HPC interconnects, and develop software to control the network and expose SDN capability to external networks through the OpenFlow interface. We have also developed techniques to evaluate communication characteristics of parallel applications, which determines the workload on interconnects, investigated newly proposed Interconnection network technologies including new network topologies and routing schemes, and designed novel interconnect routing and modeling techniques. Major activities and findings are summarized as follows.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2023

Characterization of Interconnects

Combined-accelerated stress testing (C-AST) simultaneously combines stress factors of the natural environment (including UV radiation, temperature, humidity, electrical current, and external mechanical force) into a single test that requires fewer modules, fewer chambers, and makes it possible to discover weaknesses in new designs that are not known a-priori. C-AST reduces risk, accelerates time to market, and improves bankability by reducing costly overdesign using test levels not exceeding those seen in the natural environment. This project seeks to evaluate strengths and weaknesses of modern cell interconnect designs with combined-accelerated stress testing (C-AST) to screen multiple climates along with finite element and failure analysis to determine the potential for a 50-year life. Supporting this, we seek to develop methods of characterization to assess the degradation of interconnects, enable predictive rate models with material forensics and FEA and show C-AST's ability to find interconnect failures and benchmark it relative to other accelerated stress test methods like temperature cycling and cyclic dynamic mechanical loading. Examples of modern interconnect designs covered are Canadian Solar Hetero Technology ribbon enabling closer cell interconnections, SmartWire (eg. Meyer-Berger technology), and shingled cells with new interconnect materials.

C-AST↗
DOE OSTI2022

Optimal interconnection of three-terminal tandem solar cells

Three-terminal (3T) tandem solar cells require an adapted module integration scheme in order to explore their full efficiency potential. The three terminals allow to extract the power of the top and bottom cell separately. In a cell string, the wide bandgap top cells are interconnected in parallel to multiple bottom cells resulting in a parallel/series interconnection. This interconnection scheme affects the operation of the subcells, the resulting current path between the subcells, the layout of the cell interconnects, and the system level. Here, we analyze by simulations and experiments the aspects of the module integration of series- and reverse-connected 3T cells with their practical impact on module processes and performance as well as the effect of varying voltage ratios on the string-end losses. If the subcells are connected in series, the module integration requires insulation layers and significantly longer interconnects compared to devices with reverse-connected subcells. Tandem devices with a reverse connection and a voltage ratio between top and bottom cell of 2:1 allow a lean interconnection design and low integration losses. Here, we present an approach for the integration of bypass diodes for the protection against shading effects that allow to minimize string-end and shading losses for a system of modules featuring 3T cells.

14 SOLAR ENERGY↗
DOE OSTI2017

Cantilever testing of sintered-silver interconnects

Cantilever testing is an underutilized test method from which results and interpretations promote greater understanding of the tensile and shear failure responses of interconnects, metallizations, or bonded joints. The use and analysis of this method were pursued through the mechanical testing of sintered-silver interconnects that joined Ni/Au-plated copper pillars or Ti/Ni/Ag-plated silicon pillars to Ag-plated direct bonded copper substrates. Sintered-silver was chosen as the interconnect test medium because of its high electrical and thermal conductivities and high-temperature capability—attractive characteristics for a candidate interconnect in power electronic components and other devices. Deep beam theory was used to improve upon the estimations of the tensile and shear stresses calculated from classical beam theory. The failure stresses of the sintered-silver interconnects were observed to be dependent on test-condition and test-material-system. In conclusion, the experimental simplicity of cantilever testing, and the ability to analytically calculate tensile and shear stresses at failure, result in it being an attractive mechanical test method to evaluate the failure response of interconnects.

36 MATERIALS SCIENCE↗
DOE OSTI2024

Interconnected Nanoporous Polysulfone by the Self-Assembly of Randomly Linked Copolymer Networks and Linear Multiblocks

Porous materials have attracted considerable attention due to their versatile applications, especially in water purification. Interconnected nanoporous structures are distinguished by their high degree of porosity and resistance to clogging, as well as their insensitivity to nanostructural orientation. Previous works on randomly linked copolymer systems have shown that they can effectively produce disordered cocontinuous nanostructures, which upon removal of one component yield interconnected nanoporous materials. However, the cocontinuous nanomaterials previously developed using polystyrene (PS) and poly(d,l-lactic acid) (PLA) strands, and the resulting interconnected nanoporous PS monoliths, were far too brittle to enable practical use as membranes. Here, we study the self-assembly of randomly linked copolymer networks prepared using blocks of the engineering polymer polysulfone (PSU). A wide cocontinuous regime (spanning 40 wt %) was found for randomly end-linked copolymer networks (RECNs) constructed from PSU and PLA strands, via a combination of mechanical testing, gravimetry, small-angle X-ray scattering, and scanning electron microscopy. The PSU/PLA cocontinuous nanomaterial with symmetric composition showed 2.4 times higher Young’s modulus and ~100 times greater toughness than the corresponding PS/PLA sample. The interconnected nanoporous PSU fabricated after etching of PLA even exhibited 1.6 times greater toughness than PS/PLA prior to PLA removal. To facilitate the production of thin films of cocontinuous nanomaterials, we applied solution-processable randomly linked linear PSU/PLA multiblock polymers onto ultrafiltration membranes. Here, the interconnected nanoporous PSU thin film generated by etching PLA was found to effectively reject 50 nm diameter particles without significantly compromising permeability. This discovery presents a valuable addition to the existing techniques used to fabricate PSU membranes. In contrast to traditional methods, which are sensitive to processing conditions, produce a wide range of pore sizes, and offer limited adjustability of pore size, the current technique is anticipated to enable interconnected PSU membranes with more uniform and tailorable porosity.

36 MATERIALS SCIENCE↗
DOE OSTI2021

Development of Quantum Interconnects (QuICs) for Next-Generation Information Technologies

Just as “classical” information technology rests on a foundation built of interconnected information-processing systems, quantum information technology (QIT) must do the same. A critical component of such systems is the “interconnect,” a device or process that allows transfer of information between disparate physical media, for example, semiconductor electronics, individual atoms, light pulses in optical fiber, or microwave fields. While interconnects have been well engineered for decades in the realm of classical information technology, quantum interconnects (QuICs) present special challenges, as they must allow the transfer of fragile quantum states between different physical parts or degrees of freedom of the system. The diversity of QIT platforms (superconducting, atomic, solid-state color center, optical, etc.) that will form a “quantum internet” poses additional challenges. As quantum systems scale to larger size, the quantum interconnect bottleneck is imminent, and is emerging as a grand challenge for QIT. For these reasons, it is the position of the community represented by participants of the NSF workshop on “Quantum Interconnects” that accelerating QuIC research is crucial for sustained development of a national quantum science and technology program. Given the diversity of QIT platforms, materials used, applications, and infrastructure required, a convergent research program including partnership between academia, industry, and national laboratories is required.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2018

Double-Sided Pressureless-Sintered-Silver Interconnects Fabricated by Reflow-Oven-Processing

A significant amount of development with sintered-silver as an alternative interconnect (or attachment or attach) material in power electronic devices has occurred since ~ 2010 at Oak Ridge National Laboratory's National Transportation Research Center. Continuous sponsorship of the work enabled improvements and understanding of several sequential processing steps which otherwise would not have occurred with a short duration or an intermittently funded project. The majority of that work has occurred with a focus on improving its processing and consequential mechanical reliability of the interconnect while promoting adaptability to power elect ronic device manufacturing. The work includes determining application issues of silver-sintering and the developing processes that would make it amenable for use with reflow oven sintering. As part of that work, co-development of maximum interconnect strength of the sintered-silver interconnect occurred, and that also involved examining candidate plating materials that could be used in concert with them for the "interconnect system". All of this work involved the consideration of a single sintered-silver interconnect.

36 MATERIALS SCIENCE↗
DOE OSTI2019

High Density Chip Interconnect Technology Using High Density Glass Interposers

Modern particle physics experiments require “intelligent detectors” with dense interconnects and distributed intelligence in very large area detector systems. Available packaging and interconnect technologies directly limit the performance and capabilities of these systems. Interposers are interconnected elements that use through-silicon or through-glass via to replace the PC board technology currently used for connecting chips and can improve the interconnect density by more than two orders of magnitude. The goal of this project is to fabricate a thru glass via interposer that will allow top to bottom side interconnects in the tens of microns. Having a thru glass interposer with interconnects in the tens of microns will benefit the electrons industry which focuses on 3D packaging. In addition to commercial, medical applications such as the CAT scan, which have resolutions in the micron or larger range, will now be able to use these interposers to diagnose in the tens of microns.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2021

Considerations for Distributed Energy Resource Integration in Puerto Rico: DOE Multi-Lab Grid Modeling Support for Puerto Rico; Analytical Support for Interconnection and IEEE Std 1547-2018 National Renewable Energy Laboratory (Task 3.0)

To ensure the sustainable long-term recovery of Puerto Rico's electric power grid from hurricanes María and Irma and to build capacity to manage future potential natural disasters in the most secure and resilient way, the U.S. Department of Energy (DOE) convened experts from multiple national laboratories to develop a comprehensive set of data, models, analytic tools, and studies, considering inputs from a wide variety of stakeholder groups, to support technically sound recommendations for Puerto Rico's energy investment decisions. A resilient electric grid is vital to Puerto Rico's security, economy, and way of life, and it will provide the foundation for essential services that people and businesses on the island rely on every day. This report shows progress for a grid modeling task under the DOE-sponsored project that is a collaboration among the National Renewable Energy Laboratory (NREL) and other national laboratories. In Phase 1 of the multilab effort to support Puerto Rico's recovery, NREL provided the utility company Puerto Rico Electric Power Authority (PREPA) recommendations for a new framework of interconnection standards to accelerate the integration of utility-scale, transmission-connected renewable electrical generation and energy storage that ensure cross-technology compatibility and enable high deployment levels without compromising grid reliably, safety, or security. This Phase 2 report focuses on the interconnection of distributed energy resources (DERs) to the electric distribution system in Puerto Rico. This report is intended to familiarize the reader with Puerto Rico's distribution infrastructure and operational practices and procedures that are relevant to DER interconnection. The report also provides considerations for streamlining the interconnection process given the expected increase in deployments resulting from Puerto Rico's renewable portfolio standard (RPS) goal of 100% renewables by 2050. Accordingly, the report identifies considerations and concerns associated with the increase in intermittent generation, strategies for DER interconnection best practices, and the potential use of the latest technological solutions identified in the latest revision of the Institute of Electrical and Electronics Engineers (IEEE) 1547-2018 interconnection standard.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2023

Queued Up: Characteristics of Power Plants Seeking Transmission Interconnection As of the End of 2022 [Slides]

Proposed large-scale electric generation and storage projects must apply for interconnection to the bulk power system via interconnection queues. While most projects that apply for interconnection are not subsequently built, data from these queues nonetheless provide a general indicator for mid-term trends in developer interest. Berkeley Lab compiled and analyzed data from all seven ISOs/RTOs in concert with 35 non-ISO utilities, representing an estimated 85% of all U.S. electricity load. We include all "active" projects in these generation interconnection queues through the end of 2022, as well as data on "operational" and "withdrawn" projects where those data are available. We find that the amount of new electric capacity in these queues is growing dramatically, with over 2,000 gigawatts (GW) of total generation and storage capacity now seeking connection to the grid (over 95% of which is for zero-carbon resources like solar, wind, and battery storage). Solar (947 GW) and battery storage (~680 GW) are – by far – the fastest growing resources in the queues; combined they accounted for over 80% of new capacity entering the queues in 2022. Substantial wind (300 GW) capacity is also seeking interconnection, 38% of which is for offshore projects (113 GW). In total, about 1,250 GW of zero-carbon generating capacity is currently seeking transmission access, as is 82 GW of natural gas capacity. Hybrids projects (co-locating multiple generation and/or storage types) comprise a large – and increasing – share of proposed projects, particularly in CAISO and the non-ISO West. 457 GW of solar hybrids (primarily solar+battery) and 24 GW of wind hybrids are currently active in the queues; over half of battery storage in the queues is paired with generation. However, much of this proposed capacity will be withdrawn from the queues and not built. Among a subset of queues for which data are available, only 21% of the projects (and 14% of capacity) seeking connection from 2000 to 2017 have been built as of the end of 2022. Additionally, interconnection wait times are on the rise: The typical duration from connection request to commercial operation increased from <2 years for projects built in 2000-2007 to nearly 4 years for those built in 2018-2022 (with a median of 5 years for projects built in 2022).

24 POWER TRANSMISSION AND DISTRIBUTION↗
NASA NTRS1982

Interconnect fatigue design for terrestrial photovoltaic modules

The results of comprehensive investigation of interconnect fatigue that has led to the definition of useful reliability-design and life-prediction algorithms are presented. Experimental data indicate that the classical strain-cycle (fatigue) curve for the interconnect material is a good model of mean interconnect fatigue performance, but it fails to account for the broad statistical scatter, which is critical to reliability prediction. To fill this shortcoming the classical fatigue curve is combined with experimental cumulative interconnect failure rate data to yield statistical fatigue curves (having failure probability as a parameter) which enable (1) the prediction of cumulative interconnect failures during the design life of an array field, and (2) the unambiguous--ie., quantitative--interpretation of data from field-service qualification (accelerated thermal cycling) tests. Optimal interconnect cost-reliability design algorithms are derived based on minimizing the cost of energy over the design life of the array field.

Mon, G. R.↗
NASA NTRS1994

Reconfigurable optical interconnections via dynamic computer-generated holograms

A system is proposed for optically providing one-to-many irregular interconnections, and strength-adjustable many-to-many irregular interconnections which may be provided with strengths (weights) w(sub ij) using multiple laser beams which address multiple holograms and means for combining the beams modified by the holograms to form multiple interconnections, such as a cross-bar switching network. The optical means for interconnection is based on entering a series of complex computer-generated holograms on an electrically addressed spatial light modulator for real-time reconfigurations, thus providing flexibility for interconnection networks for largescale practical use. By employing multiple sources and holograms, the number of interconnection patterns achieved is increased greatly.

Liu, Hua-Kuang↗
NASA NTRS1996

Reconfigurable Optical Interconnections Via Dynamic Computer-Generated Holograms

A system is presented for optically providing one-to-many irregular interconnections, and strength-adjustable many-to-many irregular interconnections which may be provided with strengths (weights) w(sub ij) using multiple laser beams which address multiple holograms and means for combining the beams modified by the holograms to form multiple interconnections, such as a cross-bar switching network. The optical means for interconnection is based on entering a series of complex computer-generated holograms on an electrically addressed spatial light modulator for real-time reconfigurations, thus providing flexibility for interconnection networks for large-scale practical use. By employing multiple sources and holograms, the number of interconnection patterns achieved is increased greatly.

Liu, Hua-Kuang↗
NASA NTRS2004

Fabrication of a novel gigabit/second free-space optical interconnect - photodetector characterization and testing and system development

The time when computing power is limited by the copper wire inherent in the computer system and not the speed of the microprocessor is rapidly approaching. With constant advances in computer technology, many researchers believe that in only a few years, optical interconnects will begin to replace copper wires in your Central Processing Unit (CPU). On a more macroscopic scale, the telecommunications industry has already made the switch to optical data transmission as, to date, fiber optic technology is the only reasonable method of reliable, long range data transmission. Within the span of a decade, we will see optical technologies move from the macroscopic world of the telecommunications industry to the microscopic world of the computer chip. Already, the communications industry is marketing commercially available optical links to connect two personal computers, thereby eliminating the need for standard and comparatively slow wired and wireless Ethernet transfers and greatly increasing the distance the computers can be separated. As processing demands continue to increase, the realm of optical communications will continue to move closer to the microprocessor and quite possibly onto the microprocessor itself. A day may come when copper connections are used only to supply power, not transfer data. This summer s work marks some of the beginning stages of a 5 to 10 year, long-term research project to create and study a free-space, 1 Gigabit/sec optical interconnect. The research will result in a novel fabricated, chip-to-chip interconnect consisting of a Vertical Cavity Surface Emitting Laser (VCSEL) Diode linked through free space to a Metal- Semiconductor-Metal (MSM) Photodetector with the possible integration of microlenses for signal focusing and Micro-Electromechanical Systems (MEMS) devices for optical signal steering. The advantages, disadvantages, and practicality of incorporating flip-chip mounting technologies will also be addressed. My work began with the design and construction of a test setup for the experiment and then appropriate characterization of the test system. Specifically, I am involved in the characterization of a commercially available 1550nm wavelength, 5mW diode laser and a study of its modulation bandwidth. Commercially produced photodetectors as well as the incorporation of microwave technology, in the form of RF input and output, are used in the characterization procedure. The next stage involves the use of a probe station and network analyzer to characterize and test a series of photodetectors fabricated on a 2 inch, Indium Gallium Arsenide (InGaAs) wafer in the Branch s microlithography lab. Other project responsibilities include, but are not limited to the incorporation of a transimpedance amplifier to the photodetector circuit; a study of VCSEL technology; bit error rate analysis of an optical interconnect system; and analysis of free space divergence of the VCSEL, optical path length of the interconnect; and any other pertinent optical properties of the one gigabit per second interconnect for fabrication and testing.

Savich, Gregory R.↗
NASA NTRS2001

Zee electrical interconnect

An interconnect, having some length, that reliably connects two conductors separated by the length of the interconnect when the connection is made but in which one length if unstressed would change relative to the other in operation. The interconnect comprises a base element an intermediate element and a top element. Each element is rectangular and formed of a conducting material and has opposed ends. The elements are arranged in a generally Z-shape with the base element having one end adapted to be connected to one conductor. The top element has one end adapted to be connected to another conductor and the intermediate element has its ends disposed against the other end of the base and the top element. Brazes mechanically and electrically interconnect the intermediate element to the base and the top elements proximate the corresponding ends of the elements. When the respective ends of the base and the top elements are connected to the conductors, an electrical connection is formed therebetween, and when the conductors are relatively moved or the interconnect elements change length the elements accommodate the changes and the associated compression and tension forces in such a way that the interconnect does not mechanically fatigue.

Rust, Thomas M.↗
DOE OSTI2017

Fast process flow, on-wafer interconnection and singulation for MEPV

A method including providing a substrate comprising a device layer on which a plurality of device cells are defined; depositing a first dielectric layer on the device layer and metal interconnect such that the deposited interconnect is electrically connected to at least two of the device cells; depositing a second dielectric layer over the interconnect; and exposing at least one contact point on the interconnect through the second dielectric layer. An apparatus including a substrate having defined thereon a device layer including a plurality of device cells; a first dielectric layer disposed directly on the device layer; a plurality of metal interconnects, each of which is electrically connected to at least two of the device cells; and a second dielectric layer disposed over the first dielectric layer and over the interconnects, wherein the second dielectric layer is patterned in a positive or negative planar spring pattern.

36 MATERIALS SCIENCE↗
DOE OSTI2022

High-voltage push to mate electrical interconnect

A high-voltage self-aligning push to mate electrical interconnect device is provided. The electrical interconnect device includes a housing with a mating end and a receiving end. The interconnect also includes an insulator bushing configured to be affixed to the receiving end of the housing. The interconnect also includes a center pin disposed within the housing. The center pin extends from the mating end of the housing to the receiving end of the housing. The interconnect also includes a connector socket disposed within the insulator bushing and which is in electrical communication with the center pin. The interconnect also includes an alignment sleeve including a chamfered mating funnel defining a void configured to accept and surround the housing and at least a portion of insulator bushing.

Martinez, David K.↗
DOE OSTI2018

Failure stress comparison of different pairings of Ag-plating and reflow-oven-processed pressureless-sintered-Ag interconnects

Here, sintered-silver is a candidate material to supplant solders for interconnects in power electronic packaging for many reasons including its desirably high electrical and thermal conductivities and compliance to Restriction of Hazardous Substances (RoHS) guidelines. The shear failure stress of interconnects though is limited by whatever constituent is the weakest, and that includes any employed plating. In the present study, silver-platings were processed electrolytically, electrolessly, and through sputter deposition and their influence on the entire “interconnect system” shear strength was examined. Test sets employing gold plating and no plating were included for comparison and to aid interpretation. Ambient-air, reflow-oven-processed, pressureless-sintered-silver interconnects were identically fabricated with all plating test sets. It was found that all considered silver-plating methods produced consistently strong (characteristic failure stresses > 55 MPa) sintered-silver interconnects. Because failures tended to be adhesive in all six sets, differences in failure stress among the silver-plated sets and the gold-plated or unplated sets were likely due to differences in the adhesive strength of the sintered silver with silver-plating, gold-plating, or direct bonding with copper.

36 MATERIALS SCIENCE↗