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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 73 records · Page 4
All sourcesNASA NTRSDOE OSTI
DOE OSTI2025

Variable Bragg x-ray beam splitters

Beam splitters are utilized in a variety of advanced x-ray instruments and are essential for extending quantum optics techniques to x rays. A new fabrication method has produced thinned Bragg diffracting silicon devices with variable reflectivity and transmission coefficients and negligible absorption losses. Diffraction measurements confirm that silicon continues to exhibit perfect crystal diffraction even for thicknesses below two microns. Devices are machined from standard wafers, with the thinned regions contained within the robust frame of an unperturbed crystal for ease of handling.

Powers, L. T. (ORCID:000900047481248X)↗
NASA NTRS1993

Study of the Staebler-Wronski degradation effect in a-Si:H based p-i-n solar cell

Conversion of solar energy into electricity using environmentally safe and clean photovoltaic methods to supplement the ever increasing energy needs has been a cherished goal of many scientists and engineers around the world. Photovoltaic solar cells on the other hand, have been the power source for satellites ever since their introduction in the early sixties. For widespread terrestrial applications, however, the cost of photovoltaic systems must be reduced considerably. Much progress has been made in the recent past towards developing economically viable terrestrial systems, and the future looks highly promising. Thin film solar cells offer cost reductions mainly from their low processing cost, low material cost, and choice of low cost substrates. These are also very attractive for space applications because of their high power densities (power produced per kilogram of solar cell pay load) and high radiation resistance. Amorphous silicon based solar cells are amongst the top candidates for economically viable terrestrial and space based power generation. Despite very low federal funding during the eighties, amorphous silicon solar cell efficiencies have continually been improved - from a low 3 percent to over 13 percent now. Further improvements have been made by the use of multi-junction tandem solar cells. Efficiencies close to 15 percent have been achieved in several labs. In order to be competitive with fossil fuel generated electricity, it is believed that module efficiency of 15 percent or cell efficiency of 20 percent is required. Thus, further improvements in cell performance is imperative. One major problem that was discovered almost 15 years ago in amorphous silicon devices is the well known Staebler-Wronski Effect. Efficiency of amorphous silicon solar cells was found to degrade upon exposure to sunlight. Until now their is no consensus among the scientists on the mechanism for this degradation. Efficiency may degrade anywhere from 10 percent to almost 50 percent within the first few months of operation. In order to improve solar cell efficiencies, it is clear that the cause or causes of such degradation must be found and the processing conditions altered to minimize the loss in efficiency. This project was initiated in 1987 to investigate a possible link between metallic impurities, in particular, Ag, and this degradation. Such a link was established by one of the NASA scientists for the light induced degradation of n+/p crystalline silicon solar cells.

Naseem, H. A.↗
NASA NTRS2017

Silicon Carbide Power Devices and Integrated Circuits

An overview of the NASA NEPP Program Silicon Carbide Power Device subtask is given, including the current task roadmap, partnerships, and future plans. Included are the Agency-wide efforts to promote development of single-event effect hardened SiC power devices for space applications.

single-event gate rupture (SEGR)↗
DOE OSTI2024

Future of plasma etching for microelectronics: Challenges and opportunities

Plasma etching is an essential semiconductor manufacturing technology required to enable the current microelectronics industry. Along with lithographic patterning, thin-film formation methods, and others, plasma etching has dynamically evolved to meet the exponentially growing demands of the microelectronics industry that enables modern society. At this time, plasma etching faces a period of unprecedented changes owing to numerous factors, including aggressive transition to three-dimensional (3D) device architectures, process precision approaching atomic-scale critical dimensions, introduction of new materials, fundamental silicon device limits, and parallel evolution of post-CMOS approaches. The vast growth of the microelectronics industry has emphasized its role in addressing major societal challenges, including questions on the sustainability of the associated energy use, semiconductor manufacturing related emissions of greenhouse gases, and others. The goal of this article is to help both define the challenges for plasma etching and point out effective plasma etching technology options that may play essential roles in defining microelectronics manufacturing in the future. The challenges are accompanied by significant new opportunities, including integrating experiments with various computational approaches such as machine learning/artificial intelligence and progress in computational approaches, including the realization of digital twins of physical etch chambers through hybrid/coupled models. These prospects can enable innovative solutions to problems that were not available during the past 50 years of plasma etch development in the microelectronics industry. To elaborate on these perspectives, the present article brings together the views of various experts on the different topics that will shape plasma etching for microelectronics manufacturing of the future.

Engineering↗
DOE OSTI2022

Low voltage AC electroluminescence in silicon MOS capacitors

Low power silicon based light source and detector are attractive for on-chip photonic circuits given their ease of process integration. However, conventional silicon light emitting diodes emit photons with energies near the band edge where the corresponding silicon photodetectors lack responsivity. On the other hand, previously reported hot carrier electroluminescent silicon devices utilizing a reverse biased diode require high operating voltages. Here, we investigate hot carrier electroluminescence in silicon metal–oxide–semiconductor capacitors operating under transient voltage conditions. Further, during each voltage transient, large energy band bending is created at the edge of the source contact, much larger than what is achievable at a steady state. As a result, electrons and holes are injected efficiently from a single source contact into the silicon channel at the corresponding voltage transient, where they subsequently undergo impact ionization and phonon-assisted interband recombination. Notably, we show low voltage operation down to 2.8 V by using a 20 nm thick high-κ gate dielectric. We show further voltage scaling is possible by reducing the gate dielectric thickness, thus presenting a low voltage platform for silicon optoelectronic integrated circuits.

42 ENGINEERING↗
NASA NTRS1982

Annual Conference on Nuclear and Space Radiation Effects, 19th, Las Vegas, NV, July 20-22, 1982, Proceedings

The results of research concerning the effects of nuclear and space radiation are presented. Topics discussed include the basic mechanisms of nuclear and space radiation effects, radiation effects in devices, and radiation effects in microcircuits, including studies of radiation-induced paramagnetic defects in MOS structures, silicon solar cell damage from electrical overstress, radiation-induced charge dynamics in dielectrics, and the enhanced radiation effects on submicron narrow-channel NMOS. Also examined are topics in SGEMP/IEMP phenomena, hardness assurance and testing, energy deposition, desometry, and radiation transport, and single event phenomena. Among others, studies are presented concerning the limits to hardening electronic boxes to IEMP coupling, transient radiation screening of silicon devices using backside laser irradiation, the damage equivalence of electrons, protons, and gamma rays in MOS devices, and the single event upset sensitivity of low power Schottky devices.

Long, D. M.↗
NASA NTRS1999

Silicon Carbide Being Developed for High-Definition Television (HDTV) Transmitter Modules

Through a Space Act Agreement, the NASA Lewis Research Center has helped develop the base silicon carbide (SiC) epitaxial growth technology for Westinghouse's efforts to bring silicon carbide products to the marketplace. SiC is a high-temperature, high-voltage semiconductor that can deliver greater than three times the power of conventional silicon devices. The technology was initially disclosed in the 1994 R&T report. NASA Lewis High Temperature Integrated Electronics and Sensors (HTIES) team is developing SiC as a material for advanced semiconductor electronic device applications because SiC-based electronics and sensors can operate in hostile environments where conventional silicon-based electronics cannot function. SiC transmitters hold great promise for television stations because they can convert broadcasts from analog to digital signals. A modular solid-state design provides broadcasters with an option to gradually add modules, increasing the power of their transmitters as they expand their high-definition television (HDTV) coverage. Using these high-power transistors will significantly reduce the space needed for high-power transmitters at television stations and will offer a solid-state solution, reducing long-term maintenance costs. Thus, transmitter manufacturers will be able to abandon their reliance on tube-based technology for high-power transmitters and will be able to build smaller, high-power, solid-state transmitters.

Costello, Donald E.↗
NASA NTRS1987

Gigarad-tolerant power switches and memory elements

A new class of silicon devices operating without p-n junctions has been studied for radiation hardness. The electric field in these devices is uniform over most of the device, thus causing high-voltage breakdown to increase with electrode spacing. Deep acceptor levels are created in the silicon by diffusing gold atoms into the lattice, or by electron radiation. These acceptor levels, near the center of the band gap, trap out electrons so that the low resistivity of the n-type doped wafer can be raised to intrinsic resistivity. Switching between a high-resistivity state at low currents and a low-resistivity state at high currents occurs at a definite threshold voltage, exhibiting characteristics similar to silicon-controlled rectifiers. Compensating 0.1 ohm-meter (10 ohm-cm) silicon wafers requires electron fluxes of 10 to the 23rd electrons per square meter (10 to the 19th electrons per square centimeter). Experiments demonstrating gamma tolerance to 1 Gigarad(Si) are described. Calculations for maximum tolerable neutron fluence are shown, and a phenomenological explanation for these results is presented.

Joyner, W. T.↗
NASA NTRS2005

Ultra-Low-Temperature Homoepitaxial Growth of Sb-Doped Silicon

An ultra-low-temperature process for homoepitaxial growth of high-quality, surface-confined, Sb-doped silicon layers is presented. Non-equilibrium growth by molecular beam epitaxy (MBE) is used to achieve dopant incorporation in excess of 2x10(exp 14) per sq cm in a thin, surface-confined layer. Sb surface segregation larger than expected from theoretical models was observed, in agreement with other experimental works. Furthermore, this work details an entirely low-temperature process (less than 450 degree C) that can be applied to fully processed and aluminum-metallized silicon devices. One application of this process is the formation of a back-surface electrode for back-illuminated high-purity silicon imaging arrays.

Molecular beam epitaxy↗
NASA NTRS2008

Performance of MEMS Silicon Oscillator, ASFLM1, under Wide Operating Temperature Range

Over the last few years, MEMS (Micro-Electro-Mechanical Systems) resonator-based oscillators began to be offered as commercial-off-the-shelf (COTS) parts by a few companies [1-2]. These quartz-free, miniature silicon devices could compete with the traditional crystal oscillators in providing the timing (clock function) for many digital and analog electronic circuits. They provide stable output frequency, offer great tolerance to shock and vibration, and are immune to electro-static discharge [1-2]. In addition, they are encapsulated in compact lead-free packages, cover a wide frequency range (1 MHz to 125 MHz), and are specified, depending on the grade, for extended temperature operation from -40 C to +85 C. The small size of the MEMS oscillators along with their reliability and thermal stability make them candidates for use in space exploration missions. Limited data, however, exist on the performance and reliability of these devices under operation in applications where extreme temperatures or thermal cycling swings, which are typical of space missions, are encountered. This report presents the results of the work obtained on the evaluation of an ABRACON Corporation MEMS silicon oscillator chip, type ASFLM1, under extreme temperatures.

Patterson, Richard L.↗
NASA NTRS2009

Assessment of Operation of EMK21 MEMS Silicon Oscillator Over Wide Temperature Range

Electronic control systems, data-acquisition instrumentation, and microprocessors require accurate timing signals for proper operation. Traditionally, ceramic resonators and crystal oscillators provided this clock function for the majority of these systems. Over the last few years, MEMS (Micro-Electro-Mechanical Systems) resonator-based oscillators began to surface as commercial-off-the-shelf (COTS) parts by a few companies. These quartz-free, miniature silicon devices could easily replace the traditional crystal oscillators in providing the timing/clock function for many digital and analog circuits. They are reported to provide stable output frequency, offer great tolerance to shock and vibration, and are immune to electro-static discharge [ 1-2]. In addition, they are encapsulated in compact lead-free packages and cover a wide frequency range (1 MHz to 125 MHz). The small size of the MEMS oscillators along with their thermal stability make them ideal candidates for use in space exploration missions. Limited data, however, exist on the performance and reliability of these devices under operation in applications where extreme temperatures or thermal cycling swings, which are typical of space missions, are encountered. This report presents the results of the work obtained on the evaluation of an Ecliptek Corporation MEMS silicon oscillator chip under extreme temperatures.

Patterson, Richard L.↗
DOE OSTI2026

Performance Modeling of Tandem Photovoltaics: A Yearlong Outdoor Degradation Analysis of a Ga⁢As//Si Minimodule

We present a performance modeling and degradation analysis framework for tandem photovoltaic modules, building upon established procedures for crystalline silicon devices and adapting them to account for the spectral sensitivity of multijunction technologies. The methodology employs filter criteria to select outdoor measurements close to standard test conditions (STC) under stable spectral and ambient conditions, followed by normalization of power production data with corrections for temperature, irradiance, and precipitable water vapor. We demonstrate this framework using a mechanically stacked four-terminal gallium arsenide (Ga⁢As) // silicon (Si) tandem solar minimodule deployed outdoors from October 2019 to January 2021 in Golden, Colorado, USA. We determined degradation rates of −4.1 ±0.2%/year for the Ga⁢As subcell and −2.5 ±0.9%/year for the Si subcell, with analysis of individual performance metrics indicating that packaging degradation, particularly delamination, was the dominant failure mode. Simulations using PVcircuit, an open-source equivalent-circuit solver, confirmed these findings. The presented methodology provides a reproducible foundation for performance modeling and degradation analysis of emerging tandem technologies.

14 SOLAR ENERGY↗
NASA NTRS1985

Defects in silicon effect on device performance and relationship to crystal growth conditions

A relationship between material defects in silicon and the performance of electronic devices will be described. A role which oxygen and carbon in silicon play during the defects generation process will be discussed. The electronic properties of silicon are a strong function of the oxygen state in the silicon. This state controls mechanical properties of silicon efficiency for internal gettering and formation of defects in the device's active area. In addition, to temperature, time, ambience, and the cooling/heating rates of high temperature treatments, the oxygen state is a function of the crystal growth process. The incorporation of carbon and oxygen into silicon crystal is controlled by geometry and rotation rates applied to crystal and crucible during crystal growths. Also, formation of nucleation centers for oxygen precipitation is influenced by the growth process, although there is still a controversy which parameters play a major role. All these factors will be reviewed with special emphasis on areas which are still ambiguous and controversial.

Jastrzebski, L.↗
NASA NTRSDate not supplied

Passive Cooling for Mercury Surface Lander Electronics

A significant barrier to operation of a mission on the surface of Mercury is the temperature. At Mercury’s perihelion distance of 0.313 AU, the solar intensity is 10.6 times the solar flux at Earth orbit, and at the subsolar point, the maximum surface temperature reaches 427°C. For a mission landing on the surface of Mercury at latitude of 40°S, we analyzed using passive thermal control to reduce the temperature of the critical electronics to within the operation temperature limits of silicon devices. The thermal control requires reducing the thermal conductance and infrared flux from the high temperature surface and surrounding spacecraft, and moderating the solar heat input using a surface coating with high solar reflectivity, and maximizing thermal cooling with high infrared emissivity. Using this approach, we find that we can passively cool an electronics box to a temperature of 393K (120°C) using a radiator-white surface with solar absorptivity 0.11 and infrared emissivity 0.91. This temperature is well under 175C target we use for the limits of high-temperature silicon integrated circuits, including RAM and microcontrollers. We could further reduce this operating temperature to as low as 321K (48°C) with an advanced thermal coating, a temperature well within the operational limits of conventional electronics.

Mercury↗
NASA NTRSDate not supplied

Passive Cooling for Mercury Surface Lander Electronics

A significant barrier to operation of a mission on the surface of Mercury is the temperature. At Mercury’s perihelion distance of 0.313 AU, the solar intensity is 10.6 times the solar flux at Earth orbit, and at the subsolar point, the maximum surface temperature reaches 427°C. For a mission landing on the surface of Mercury at latitude of 40°S, we analyzed using passive thermal control to reduce the temperature of the critical electronics to within the operation temperature limits of silicon devices. The thermal control requires reducing the thermal conductance and infrared flux from the high temperature surface and surrounding spacecraft, and moderating the solar heat input using a surface coating with high solar reflectivity, and maximizing thermal cooling with high infrared emissivity. Using this approach, we find that we can passively cool an electronics box to a temperature of 393K (120°C) using a radiator-white surface with solar absorptivity 0.11 and infrared emissivity 0.91. This temperature is well under 175C target we use for the limits of high-temperature silicon integrated circuits, including RAM and microcontrollers. We could further reduce this operating temperature to as low as 321K (48°C) with an advanced thermal coating, a temperature well within the operational limits of conventional electronics

Mercury↗
NASA NTRS1978

Ultra-thin silicon solar cells for high performance panel applications

Solar cells have been fabricated which achieved the highest power to mass ratios and radiation stability yet reported for silicon devices. The thinnest cells (.04 mm) had initial efficiencies in excess of 2 watts per gram (AMO) and 1.7 watts per gram after an irradiation of 1 x 10 to the 15th equivalent 1 MeV electrons per square centimeter. The cells have been successfully interconnected by welding and filtered using a FEP bonded, ceria-doped microsheet of six mil thickness. Handling losses during cell manufacture and panel assembly may be minimized through the use of an integral reinforcing perimeter or ribs which remove almost all restrictions on cell thickness and area. Such a cell is typically composed of a main section which can be as thin as 0.015 mm and is supported at the edge by a thicker border (0.20 mm) of silicon.

Gay, C. F.↗