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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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All sourcesNASA NTRSDOE OSTI
NASA NTRS2013

NASA Tech Briefs, January 2013

Topics include: Single-Photon-Sensitive HgCdTe Avalanche Photodiode Detector; Surface-Enhanced Raman Scattering Using Silica Whispering-Gallery Mode Resonators; 3D Hail Size Distribution Interpolation/Extrapolation Algorithm; Color-Changing Sensors for Detecting the Presence of Hypergolic Fuels; Artificial Intelligence Software for Assessing Postural Stability; Transformers: Shape-Changing Space Systems Built with Robotic Textiles; Fibrillar Adhesive for Climbing Robots; Using Pre-Melted Phase Change Material to Keep Payloads in Space Warm for Hours without Power; Development of a Centrifugal Technique for the Microbial Bioburden Analysis of Freon (CFC-11); Microwave Sinterator Freeform Additive Construction System (MS-FACS); DSP/FPGA Design for a High-Speed Programmable S-Band Space Transceiver; On-Chip Power-Combining for High-Power Schottky Diode-Based Frequency Multipliers; FPGA Vision Data Architecture; Memory Circuit Fault Simulator; Ultra-Compact Transputer-Based Controller for High-Level, Multi-Axis Coordination; Regolith Advanced Surface Systems Operations Robot Excavator; Magnetically Actuated Seal; Hybrid Electrostatic/Flextensional Mirror for Lightweight, Large-Aperture, and Cryogenic Space Telescopes; System for Contributing and Discovering Derived Mission and Science Data; Remote Viewer for Maritime Robotics Software; Stackfile Database; Reachability Maps for In Situ Operations; JPL Space Telecommunications Radio System Operating Environment; RFI-SIM: RFI Simulation Package; ION Configuration Editor; Dtest Testing Software; IMPaCT - Integration of Missions, Programs, and Core Technologies; Integrated Systems Health Management (ISHM) Toolkit; Wind-Driven Wireless Networked System of Mobile Sensors for Mars Exploration; In Situ Solid Particle Generator; Analysis of the Effects of Streamwise Lift Distribution on Sonic Boom Signature; Rad-Tolerant, Thermally Stable, High-Speed Fiber-Optic Network for Harsh Environments; Towed Subsurface Optical Communications Buoy; High-Collection-Efficiency Fluorescence Detection Cell; Ultra-Compact, Superconducting Spectrometer-on-a-Chip at Submillimeter Wavelengths; UV Resonant Raman Spectrometer with Multi-Line Laser Excitation; Medicine Delivery Device with Integrated Sterilization and Detection; Ionospheric Simulation System for Satellite Observations and Global Assimilative Model Experiments - ISOGAME; Airborne Tomographic Swath Ice Sounding Processing System; flexplan: Mission Planning System for the Lunar Reconnaissance Orbiter; Estimating Torque Imparted on Spacecraft Using Telemetry; PowderSim: Lagrangian Discrete and Mesh-Free Continuum Simulation Code for Cohesive Soils; Multiple-Frame Detection of Subpixel Targets in Thermal Image Sequences; Metric Learning to Enhance Hyperspectral Image Segmentation; Basic Operational Robotics Instructional System; Sheet Membrane Spacesuit Water Membrane Evaporator; Advanced Materials and Manufacturing for Low-Cost, High-Performance Liquid Rocket Combustion Chambers; Motor Qualification for Long-Duration Mars Missions.

Source record↗
NASA NTRS1994

Waveguide-coupled resonator filters on AlN on silicon

In the effort to continually reduce the size and cost of wireless communications products the level of integration has improved dramatically in recent years. In order to reduce future generations of wireless systems to single chip form, there is a need for on-chip filtering capabilities. In this paper, the first report of an experimental waveguide-coupled resonator filter for cellular radio applications is presented. Measured results indicate a typical insertion loss of 26 dB at a center frequency of 132 MHz using a 2 um AlN film on (001) less than 110 greater than Si. In addition, a laser probe analysis has been conducted and a theoretical analysis of the first order reflection coefficients is presented.

Liaw, H. M.↗
NASA NTRS2019

High-Performance Spaceflight Computing (HPSC) Middleware Overview

High Performance Spacecraft Computing (HPSC) is a joint project between the National Aeronautics and Space Administration (NASA) and Air Force Research Lab (AFRL) to develop a high-performance multi-core radiation hardened flight processor. HPSC offers a new flight computing architecture to meet the needs of NASA missions through 2030 and beyond. Providing on the order of 100X the computational capacity of current flight processors for the same amount of power, the multicore architecture of the HPSC processor, or "Chiplet" provides unprecedented flexibility in a flight computing system by enabling the operating point to be set dynamically, trading among needs for computational performance, energy management and fault tolerance. The HPSC Chiplet is being developed by Boeing under contract to NASA, and is expected to provide prototypes in 2021. The HPSC Chiplet prototypes will be delivered with an evaluation board, system emulators, comprehensive system software, and a software development kit. In addition to the vendor deliverables, the AFRL is funding the development of a flexible Middleware to be developed by NASA Jet Propulsion Laboratory and NASA Goddard Space Flight Center. The HPSC Middleware provides a suite of thirteen high level services to manage the compute, memory and I/O resources of this complex device.This presentation will provide an overview of the HPSC project, including a hardware overview, system software overview, Middleware overview, and mission use cases. The hardware overview will provide a look at the 8 core High Performance Processing Subsystem (HPPS), the Real Time Processing Subsystem (RTPS), the Chiplet Configuration Management Subsystem, on chip peripherals, and high speed I/O. The system software overview will introduce the boot loaders, operating systems, device drivers, and software development environment. The Middleware overview will provide insight into the high-level services that will be provided to help mission developers manage the many resources and configurations made possible with the Chiplet. Finally, the presentation will provide a brief look at the mission use cases that can be enabled with this next generation architecture.

middleware↗
NASA NTRS1983

Automatic hardware synthesis

The complexity of the circuit that can fit on an integrated circuit (IC) chip has reached the level of a million transistors with the advent of Very-Large-Scale Integration (VLSI). Several automatic synthesis systems have evolved that 'aid' the human designer in managing this complexity. This paper surveys such efforts. The synthesis is viewed as the process of transforming a high-level design specification into a lower level design specification that includes more structural details, leading to the physical design of the IC. The characteristics of ten automatic synthesis systems are summarized.

Shiva, S. G.↗
NASA NTRS1989

Impact of device level faults in a digital avionic processor

This study describes an experimental analysis of the impact of gate and device-level faults in the processor of a Bendix BDX-930 flight control system. Via mixed mode simulation, faults were injected at the gate (stuck-at) and at the transistor levels and, their propagation through the chip to the output pins was measured. The results show that there is little correspondence between a stuck-at and a device-level fault model, as far as error activity or detection within a functional unit is concerned. In so far as error activity outside the injected unit and at the output pins are concerned, the stuck-at and device models track each other. The stuck-at model, however, overestimates, by over 100 percent, the probability of fault propagation to the output pins. An evaluation of the Mean Error Durations and the Mean Time Between Errors at the output pins shows that the stuck-at model significantly underestimates (by 62 percent) the impact of an internal chip fault on the output pins. Finally, the study also quantifies the impact of device fault by location, both internally and at the output pins.

Suk, Ho Kim↗
NASA NTRS1981

Modular hardware synthesis using an HDL

Although hardware description languages (HDL) are becoming more and more necessary to automated design systems, their application is complicated due to the difficulty in translating the HDL description into an implementable format, nonfamiliarity of hardware designers with high-level language programming, nonuniform design methodologies and the time and costs involved in transfering HDL design software. Digital design language (DDL) suffers from all of the above problems and in addition can only by synthesized on a complete system and not on its subparts, making it unsuitable for synthesis using standard modules or prefabricated chips such as those required in LSI or VLSI circuits. The present paper presents a method by which the DDL translator can be made to generate modular equations that will allow the system to be synthesized as an interconnection of lower-level modules. The method involves the introduction of a new language construct called a Module which provides for the separate translation of all equations bounded by it.

Covington, J. A.↗
NASA NTRS1988

Impact of device level faults in a digital avionic processor

This paper describes an experimental analysis of the impact of gate and device-level faults in the processor of a flight control system. Via mixed mode simulation faults were injected both at the gate (stuck-at) and at the transistor levels, and their propagation through the chip to the output pins was measured. The results show that there is little correspondence between a stuck-at and a device-level fault model insofar as error activity or detection within a functional unit is concerned. Insofar as error activity outside the injected unit and at the output pins are concerned, the stuck-at and device models track each other, although the stuck-at model overestimates, by over one hundred percent, the probability of fault propagation to the output pins. The stuck-at model significantly underestimates the impact of an internal chip fault on the output pins.

Kim, S.↗
NASA NTRS1984

Research in the design of high-performance reconfigurable systems

An initial design for the Bit Processor (BP) referred to in prior reports as the Processing Element or PE has been completed. Eight BP's, together with their supporting random-access memory, a 64 k x 9 ROM to perform addition, routing logic, and some additional logic, constitute the components of a single stage. An initial stage design is given. Stages may be combined to perform high-speed fixed or floating point arithmetic. Stages can be configured into a range of arithmetic modules that includes bit-serial one or two-dimensional arrays; one or two dimensional arrays fixed or floating point processors; and specialized uniprocessors, such as long-word arithmetic units. One to eight BP's represent a likely initial chip level. The Stage would then correspond to a first-level pluggable module. As both this project and VLSI CAD/CAM progress, however, it is expected that the chip level would migrate upward to the stage and, perhaps, ultimately the box level. The BP RAM, consisting of two banks, holds only operands and indices. Programs are at the box (high-level function) and system level. At the system level initial effort has been concentrated on specifying the tools needed to evaluate design alternatives.

Slotnick, D. L.↗
NASA NTRS1986

Technology achievements and projections for communication satellites of the future

Multibeam systems of the future using monolithic microwave integrated circuits to provide phase control and power gain are contrasted with discrete microwave power amplifiers from 10 to 75 W and their associated waveguide feeds, phase shifters and power splitters. Challenging new enabling technology areas include advanced electrooptical control and signal feeds. Large scale MMIC's will be used incorporating on chip control interfaces, latching, and phase and amplitude control with power levels of a few watts each. Beam forming algorithms for 80 to 90 deg. wide angle scanning and precise beam forming under wide ranging environments will be required. Satelllite systems using these dynamically reconfigured multibeam antenna systems will demand greater degrees of beam interconnectivity. Multiband and multiservice users will be interconnected through the same space platform. Monolithic switching arrays operating over a wide range of RF and IF frequencies are contrasted with current IF switch technology implemented discretely. Size, weight, and performance improvements by an order of magnitude are projected.

Bagwell, J. W.↗
NASA NTRS1986

Technology achievements and projections for communication satellites of the future

Multibeam systems of the future using monolithic microwave integrated circuits to provide phase control and power gain are contrasted with discrete microwave power amplifiers from 10 to 75 W and their associated waveguide feeds, phase shifters and power splitters. Challenging new enabling technology areas include advanced electrooptical control and signal feeds. Large scale MMIC's will be used incorporating on chip control interfaces, latching, and phase and amplitude control with power levels of a few watts each. Beam forming algorithms for 80 to 90 deg wide angle scanning and precise beam forming under wide ranging environments will be required. Satellite systems using these dynamically reconfigured multibeam antenna systems will demand greater degrees of beam interconnectivity. Multiband and multiservice users will be interconnected through the same space platform. Monolithic switching arrays operating over a wide range of RF and IF frequencies are contrasted with current IF switch technology implemented discretely. Size, weight, and performance improvements by an order of magnitude are projected.

Bagwell, J. W.↗
NASA NTRS2011

Performance Comparison of Wireless Sensor Network Standard Protocols in an Aerospace Environment: ISA100.11a and ZigBee

Wireless Sensor Networks (WSNs) can provide a substantial benefit in spacecraft systems, reducing launch weight and providing unprecedented flexibility by allowing instrumentation capabilities to grow and change over time. Achieving data transport reliability on par with that of wired systems, however, can prove extremely challenging in practice. Fortunately, much progress has been made in developing standard WSN radio protocols for applications from non-critical home automation to mission-critical industrial process control. The relative performances of candidate protocols must be compared in representative aerospace environments, however, to determine their suitability for spaceflight applications. In this paper, we will present the results of a rigorous laboratory analysis of the performance of two standards-based, low power, low data rate WSN protocols: ZigBee Pro and ISA100.11a. Both are based on IEEE 802.15.4 and augment that standard's specifications to build complete, multi-hop networking stacks. ZigBee Pro targets primarily the home and office automation markets, providing an ad-hoc protocol that is computationally lightweight and easy to implement in inexpensive system-on-a-chip components. As a result of this simplicity, however, ZigBee Pro can be susceptible to radio frequency (RF) interference. ISA100.11a, on the other hand, targets the industrial process control market, providing a robust, centrally-managed protocol capable of tolerating a significant amount of RF interference. To achieve these gains, a coordinated channel hopping mechanism is employed, which entails a greater computational complexity than ZigBee and requires more sophisticated and costly hardware. To guide future aerospace deployments, we must understand how well these standards relatively perform in analog environments under expected operating conditions. Specifically, we are interested in evaluating goodput -- application level throughput -- in a representative crewed environment in the presence of varying levels of 802.11g Wi-Fi traffic. To do so, we use the NASA Johnson Space Center Wireless Habitat Testbed (WHT), a metallic, habitation-sized module designed for co-existence testing of wireless systems. In its quiescent state, the sealed WHT provides an RF-quiet environment to which we can selectively add interfering systems; it also provides a realistic level of multi-path self-interference for systems under investigation. In our test, we deploy two representative five node networks, configured in a star topology with all nodes reporting directly to a WSN gateway. Each ZigBee network WSN node is built using a Texas Instruments (TI) CC2530 system-on-a-chip radio running TI's ZigBee Pro Z-stack. Each ISA100.11a network node is built using a Nivis VersaNode 210 system-on-a-chip radio. In both cases, radios interface with TI MSP430-F5438 microcontroller implementing a common test application. Interference is provided by a D-link 802.11g Wi-Fi router transporting traffic generated using the Iperf network testing tool. For the single-channel ZigBee network, effects of both direct and indirect Wi-Fi interference are evaluated. For the channel-hopping ISA100.11a network, effects of interference from multiple Wi-Fi routers configured in non-overlapping 802.11g channels are evaluated. Our results show that, in general, the more lightweight ZigBee network performs well at low interference levels, but performance degrades as interference increases. Conversely, the more complex and costly ISA100.11a network continues to perform well as Wi-Fi interference levels increase.

Wagner, Raymond S.↗
NASA NTRS2008

Next Generation LOCAD-PTS Cartridge Development

Future astrobiology exploration missions will require rapid, point-of-use techniques for surface science experiments and contamination monitoring. The Lab-On-a-Chip Application Development (LOCAD) team is developing operational instruments that advance spaceflight technologies to molecular-based methods. Currently, LOCAD-Portable Test System (PTS) is quantifying levels of the bacterial molecule endotoxin onboard the Internatioal Space Station. Future research and development will focus on more sensitive molecular techniques that expand the number of compounds detected to include beta-glucan from fungal cell walls.

Morris, H.↗
NASA NTRS2012

A Spacecraft Housekeeping System-on-Chip in a Radiation Hardened Structured ASIC

Housekeeping systems are essential to health monitoring of spacecraft and instruments. Typically, sensors are distributed across various sub-systems and data is collected using components such as analog-to-digital converters, analog multiplexers and amplifiers. In most cases programmable devices are used to implement the data acquisition control and storage, and the interface to higher level systems. Such discrete implementations require additional size, weight, power and interconnect complexity versus an integrated circuit solution, as well as the qualification of multiple parts. Although commercial devices are readily available, they are not suitable for space applications due the radiation tolerance and qualification requirements. The Housekeeping System-o n-A-Chip (HKSOC) is a low power, radiation hardened integrated solution suitable for spacecraft and instrument control and data collection. A prototype has been designed and includes a wide variety of functions including a 16-channel analog front-end for driving and reading sensors, analog-to-digital and digital-to-analog converters, on-chip temperature sensor, power supply current sense circuits, general purpose comparators and amplifiers, a 32-bit processor, digital I/O, pulse-width modulation (PWM) generators, timers and I2C master and slave serial interfaces. In addition, the device can operate in a bypass mode where the processor is disabled and external logic is used to control the analog and mixed signal functions. The device is suitable for stand-alone or distributed systems where multiple chips can be deployed across different sub-systems as intelligent nodes with computing and processing capabilities.

Suarez, George↗
DOE OSTI2024

GaN-based W-band receiver chip development for fusion plasma diagnostics

Millimeter-wave diagnostics have proven effective on various magnetic fusion devices worldwide, yet the formidable challenges posed by the harsh environments of future burning plasma devices, characterized by extreme temperatures, pressures, and radiation levels, remain a significant hurdle. To address these challenges, the utilization of wide bandgap Gallium Nitride (GaN)-based millimeter-wave diagnostics is a most promising solution for fusion reactor safety monitoring and control. A noteworthy W-band GaN-based system-on-chip receiver has been the demonstrated by employing HRL T3 40 nm GaN technology. This receiver chip, compactly designed with dimensions of 3 × 5 mm 2 , incorporates essential components such as the 75–110 GHz RF Low-Noise Amplifier (LNA), mixer, Intermediate Frequency (IF) amplifier, and Local Oscillator (LO) chain. This receiver chip will be packaged as a millimeter-wave receiver module and applied on the DIII-D National Fusion Facility, for fusion plasma edge shape monitoring for operational safety and dangerous disruption prediction. The laboratory measurement results have demonstrated suitable performance. Furthermore, this advancement is pivotal for accurate analysis of plasma behavior in the extreme conditions of burning plasma devices, driving progress in fusion research and technology.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗
NASA NTRS1993

Design of a Low-Light-Level Image Sensor with On-Chip Sigma-Delta Analog-to- Digital Conversion

The design and projected performance of a low-light-level active-pixel-sensor (APS) chip with semi-parallel analog-to-digital (A/D) conversion is presented. The individual elements have been fabricated and tested using MOSIS* 2 micrometer CMOS technology, although the integrated system has not yet been fabricated. The imager consists of a 128 x 128 array of active pixels at a 50 micrometer pitch. Each column of pixels shares a 10-bit A/D converter based on first-order oversampled sigma-delta (Sigma-Delta) modulation. The 10-bit outputs of each converter are multiplexed and read out through a single set of outputs. A semi-parallel architecture is chosen to achieve 30 frames/second operation even at low light levels. The sensor is designed for less than 12 e^- rms noise performance.

Mendis, Sunetra K.↗
DOE OSTI2026

CMS Endcap Timing Layer: System Validation and Assembly

The High-Luminosity Large Hadron Collider (HL-LHC) will operate at unprecedented luminosities, resulting in up to 200 simultaneous interactions per bunch crossing. To mitigate the resulting pileup challenges, the CMS experiment is implementing the MIP Timing Detector (MTD), designed to provide precise timing information with a resolution of 30 – 40 picoseconds per track. The MTD consists of the Barrel Timing Layer (BTL) and the Endcap Timing Layer (ETL), each optimized for different regions of the detector. The ETL, comprising two double-sided disks, utilizes Low-Gain Avalanche Diode (LGAD) sensors coupled with the Endcap Timing Readout Chip (ETROC) to achieve high-precision timing measurements in the forward region. Significant progress has been made toward the realization of the ETL through extensive system-level validation of the ETROC readout chain and the development of scalable module assembly procedures. This presentation will provide a comprehensive overview of the ETL and highlight recent advances in system validation and module assembly, emphasizing their roles in ensuring the detector readiness for HL-LHC operation.

Lee, Dongyub [Kyungpook Natl. U.] (ORCID:000000034↗
NASA NTRS2001

System Miniaturization Via Heterogeneous Integration of Electronic Devices for Deep Space Missions

The scientific devices designed for each of the Outer Planets Program Focuses will likely be groundbreaking not only with respect to their scientific role but also regarding the electronics required to perform such investigations. In the past, the performance of packaged electronics was limited by the components themselves, with minimal influence of the packaging technology. The rapid development of integrated circuit technology, however, has drastically increased the importance of packaging technology in the ultimate performance of devices. If not carefully considered in the overall design, the packaging may become the limiting factor in the operation of the system. Although industry is responsible for several significant accomplishments in the field of electronics packaging, deep space/outer planet missions must take into account additional requirements such as extremely low temperatures, high radiation levels, hermetic sealing, and severe size and weight limitations. Therefore, the present investigation has been designed to meet the needs of NASA's sensor intensive outer planets program by combining (using flip chip technology) an array of devices (including analog, digital, power volt-age, passives, and MEMS) into a miniaturized heterogeneous system and utilizing optical buses to enable autonomy. Additional information is contained in the original extended abstract.

DelCastillo, L.↗
DOE OSTI2025

The GREEN ‘omics of Nutrient Feedbacks to Soil Warming

The GREEN ‘omics of Nutrient Feedbacks in Soil project advanced the DOE Biological and Environmental Research (BER) mission by developing and applying isotope-enabled ’omics tools to understand how soil microbes regulate carbon and nutrient cycling. Guided by the Growth Rate, growth Efficiency, and stoichiometry of Essential Nutrients (GREEN ’omics) framework, the project aimed to build a predictive, systems-level understanding of microbial traits that control ecosystem biogeochemistry. In a collaboration among Northern Arizona University (lead), West Virginia University, Lawrence Livermore National Laboratory, and Pacific Northwest National Laboratory, we combined quantitative stable isotope probing (qSIP), Chip-SIP, NanoSIMS, and genome-resolved metagenomics across long-term experiments in Arctic, boreal, temperate, and tropical ecosystems. The project produced three key outcomes: 1) We showed that community-weighted temperature sensitivities of bacterial growth (Q10) can predict ecosystem-scale soil respiration responses across diverse soils. 2) We provided the first in situ evidence for density-dependent population dynamics in soil bacteria and demonstrated that nutrient additions intensify competition, concentrating carbon use into fewer taxa. 3) We improved and extended isotope-enabled ’omics methods by quantifying qSIP measurement error to guide experimental design and coupling SIP with genome-resolved metagenomics to reveal cross-kingdom interactions among bacteria, fungi, and viruses. Together, these results show that a small number of microbial traits and taxa exert disproportionate control over soil carbon and nutrient cycling, providing critical data and methods to improve representation of microbial processes in Earth system models.

54 ENVIRONMENTAL SCIENCES↗