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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 757 records · Page 42
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DOE OSTI2017

Argo NodeOS: Toward Unified Resource Management for Exascale

Exascale systems are expected to feature hundreds of thousands of compute nodes with hundreds of hardware threads and complex memory hierarchies with a mix of on-package and persistent memory modules. In this context, the Argo project is developing a new operating system for exascale machines. Targeting production workloads using workflows or coupled codes, we improve the Linux kernel on several fronts. We extend the memory management of Linux to be able to subdivide NUMA memory nodes, allowing better resource partitioning among processes running on the same node. We also add support for memory-mapped access to node- local, PCIe-attached NVRAM devices and introduce a new scheduling class targeted at parallel runtimes supporting user- level load balancing.

Perarnau, Swann↗
DOE OSTI2017

Towards Highly Scalable Ab Initio Molecular Dynamics (AIMD) Simulations on the Intel Knights Landing Manycore Processor

The Ab Initio Molecular Dynamics (AIMD) method allows scientists to treat the dynamics of molecular and condensed phase systems while retaining a first-principles-based description of their interactions. This extremely important method has tremendous computational requirements, because the electronic Schr¨odinger equation, approximated using Kohn-Sham Density Functional Theory (DFT), is solved at every time step. With the advent of manycore architectures, application developers have a significant amount of processing power within each compute node that can only be exploited through massive parallelism. A compute intensive application such as AIMD forms a good candidate to leverage this processing power. In this paper, we focus on adding thread level parallelism to the plane wave DFT methodology implemented in NWChem. Through a careful optimization of tall-skinny matrix products, which are at the heart of the Lagrange multiplier and nonlocal pseudopotential kernels, as well as 3D FFTs, our OpenMP implementation delivers excellent strong scaling on the latest Intel Knights Landing (KNL) processor. We assess the efficiency of our Lagrange multiplier kernels by building a Roofline model of the platform, and verify that our implementation is close to the roofline for various problem sizes. Finally, we present strong scaling results on the complete AIMD simulation for a 64 water molecules test case, that scales up to all 68 cores of the Knights Landing processor.

Environmental Molecular Sciences Laboratory↗
DOE OSTI2017

Localized Fault Recovery for Nested Fork-Join Programs

Nested fork-join programs scheduled using work stealing can automatically balance load and adapt to changes in the execution environment. In this paper, we design an approach to efficiently recover from faults encountered by these programs. Specifically, we focus on localized recovery of the task space in the presence of fail-stop failures. We present an approach to efficiently track, under work stealing, the relationships between the work executed by various threads. This information is used to identify and schedule the tasks to be re-executed without interfering with normal task execution. The algorithm precisely computes the work lost, incurs minimal re-execution overhead, and can recover from an arbitrary number of failures. Experimental evaluation demonstrates low overheads in the absence of failures, recovery overheads on the same order as the lost work, and much lower recovery costs than alternative strategies.

Kestor, Gokcen↗
DOE OSTI2018

Distributed Louvain Algorithm for Graph Community Detection

In most real-world networks, the nodes/vertices tend to be organized into tightly-knit modules known as communities or clusters, such that nodes within a community are more likely to be “related” to one another than they are to the rest of the network. The goodness of partitioning into communities is typically measured using a well known measure called modularity. However, modularity optimization is an NP-complete problem. In 2008, Blondel, et al. introduced a multi-phase, iterative heuristic for modularity optimization, called the Louvain method. Owing to its speed and ability to yield high quality communities, the Louvain method continues to be one of the most widely used tools for serial community detection. In this paper, we present the design of a distributed memory implementation of the Louvain algorithm for parallel community detection. Our approach begins with an arbitrarily partitioned distributed graph input, and employs several heuristics to speedup the computation of the different steps of the Louvain algorithm. We evaluate our implementation and its different variants using real-world networks from various application domains (including internet, biology, social networks). Our MPI+OpenMP implementation yields about 7x speedup (on 4K processes) for soc-friendster network (1.8B edges) over a state-of-the-art shared-memory multicore implementation (on 64 threads), without compromising output quality. Furthermore, our distributed implementation was able to process a larger graph (uk-2007; 3.3B edges) in 32 seconds on 1K cores (64 nodes) of NERSC Cori, when the state-of-the-art shared-memory implementation failed to run due to insufficient memory on a single Cori node containing 128 GB.

High performance computing, graph algorithms, Dist↗
DOE OSTI2019

Runtime Concurrency Control and Operation Scheduling for High Performance Neural Network Training

In this paper, we extend an existing runtime system (the TensorFlow runtime) to enable automatic concurrency control and scheduling of operations. We explore performance modeling to predict the performance of operations with various thread- level parallelism. Our performance model is highly accurate and lightweight. Leveraging the performance model, our runtime system employs a set of scheduling strategies that co-run opera- tions to improve hardware utilization and system throughput. Our runtime system demonstrates a significant performance benefit. Comparing with using the recommended configurations for concurrency control and operation scheduling in TensorFlow, our approach achieves 36% performance (execution time) im- provement on average (up to 49%) for four neural network models, and achieves high performance close to the optimal one manually obtained by the user.

Liu, Jiawen↗
DOE OSTI2020

LOGAN: High-Performance GPU-Based X-Drop Long-Read Alignment

Pairwise sequence alignment is one of the most computationally intensive kernels in genomic data analysis, accounting for more than 90% of the runtime for key bioinformatics applications. This method is particularly expensive for third-generation sequences due to the high computational cost of analyzing sequences of length between 1Kb and 1Mb. Given the quadratic overhead of exact pairwise algorithms for long alignments, the community primarily relies on approximate algorithms that search only for high-quality alignments and stop early when one is not found. In this work, we present the first GPU optimization of the popular X-drop alignment algorithm, that we named LOGAN. Results show that our high-performance multi-GPU implementation achieves up to 181.6 GCUPS and speed-ups up to 6.6× and 30.7× using 1 and 6 NVIDIA Tesla V100, respectively, over the state-of-the-art software running on two IBM Power9 processors using 168 CPU threads, with equivalent accuracy. We also demonstrate a 2.3× LOGAN speed-up versus ksw2, a state-of-art vectorized algorithm for sequence alignment implemented in minimap2, a long-read mapping software. Furthermore, to highlight the impact of our work on a real-world application, we couple LOGAN with a many-to-many long-read alignment software called BELLA, and demonstrate that our implementation improves the overall BELLA runtime by up to 10.6×. Finally, we adapt the Roofline model for LOGAN and demonstrate that our implementation is near optimal on the NVIDIA Tesla V100s.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2021

Communication-Avoiding and Memory-Constrained Sparse Matrix-Matrix Multiplication at Extreme Scale

Sparse matrix-matrix multiplication (SpGEMM) is a widely used kernel in various graph, scientific computing and machine learning algorithms. In this paper, we consider SpGEMMs performed on hundreds of thousands of processors generating trillions of nonzeros in the output matrix. Distributed SpGEMM at this extreme scale faces two key challenges: (1) high communication cost and (2) inadequate memory to generate the output. Furthermore, we address these challenges with an integrated communication-avoiding and memory-constrained SpGEMM algorithm that scales to 262,144 cores (more than 1 million hardware threads) and can multiply sparse matrices of any size as long as inputs and a fraction of output fit in the aggregated memory. As we go from 16,384 cores to 262,144 cores on a Cray XC40 supercomputer, the new SpGEMM algorithm runs 10x faster when multiplying large-scale protein-similarity matrices.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2018

Multijunction Solar Cells With Graded Buffer Bragg Reflectors

Metamorphic solar cells can have optimal bandgap combinations through the use of compositionally graded buffers, where the lattice constant is slowly varied over several microns of growth. Bragg reflectors consist of several microns of alternating layers with refractive index contrast and provide a useful internal reflection to multijunction solar cells with optically thin subcells. In this work, we implement distributed Bragg reflectors within the compositionally graded buffers of inverted metamorphic solar cells to add functionality to the buffer. The reflectance of this AlGaInAs 'graded buffer Bragg reflector' is very similar to the reflectance of a similar AlGaAs Bragg reflector external to a buffer as well as the reflectance predicted by the transfer matrix model, indicating that the roughness of the buffer does not drastically reduce the reflection. Reflectance of 72%, 91%, and 98% is achieved in 2, 4, and 8 um buffers using AlGaInAs layers that alternate between 30% and 70% aluminum content. Using a 2 um graded buffer Bragg reflector, the 1.0-eV mismatched subcell of a GaAs/GaInAs tandem has a minor increase in threading dislocation density compared to a standard graded buffer and a small, 20 mV, loss in voltage. As the buffer is thickened, the voltage loss is recuperated and excellent subcell voltages are achieved, indicating that the Bragg reflector is not severely hindering dislocation glide. We demonstrate that the benefits of the graded buffer Bragg reflector for optically thin subcells and subcells containing quantum wells, and conclude that Bragg reflectors can effectively be implemented within graded buffers, adding functionality without adding cost.

14 SOLAR ENERGY↗
DOE OSTI2018

GaAs Solar Cells on Nanopatterned Si Substrates

Integrating III-Vs onto Si is a promising route toward tandem photovoltaics and cost mitigation of III-V substrates. While many III-V/Si photovoltaic integration approaches have been studied, epitaxial growth on Si allows for fewer processing steps compared to other approaches. However, current epitaxial pathways utilize expensive techniques, such as thermal cycle annealing or thick buffer layers to control defect densities, undermining the low-cost goal of integrating III-Vs with Si. Here, we present single-junction GaAs solar cells grown directly on Si using selective area growth as an alternative low-cost technique to control material quality with a much thinner buffer. We demonstrate a 10.4%-efficient GaAs device grown on a V-grooved Si substrate, which achieved an antiphase domain-free III-V/Si interface and a threading dislocation density of 2 x 107 cm-2, despite the lack of a graded buffer. We compare this growth on V-grooved Si to solar cells grown on polished Si with and without a patterned silica buffer layer, which demonstrate efficiencies of 6.5% and 6.8%, respectively; the polished Si was patterned using nanoimprint lithography, which is a low-cost patterning technique compatible with III-V selective area growth. Cracking is found to be a critical challenge that hinders solar cell performance and is exacerbated by the V-grooved Si surface topography. The results in this paper provide a promising pathway toward high-efficiency, low-cost III-V/Si tandem photovoltaics.

14 SOLAR ENERGY↗
DOE OSTI2019

Investigation of Rear-Emitter GaAs 0.75 P 0.25 Top Cells for Application to III–V/Si Tandem Photovoltaics

A rear-emitter (rear-junction) n-on-p+ device design was investigated for use in metamorphic monolithic III-V/Si tandem solar cells as an alternative to the traditional front-emitter (front-junction) n+-on-p design for potentially greater resistance to threading dislocation-induced performance degradation. A comparison of MOCVD-grown rearversus front-emitter 1.7-eV bandgap GaAs 0.75 P 0.25 top cell isotypes demonstrated as 30-mV advantage in WOC for the rear-emitter design. Here, this reduction in WOC was determined to be nearly equally caused by a reduction in junction recombination current as well as reduced reverse saturation current from improved quasi-neutral region transport. These results suggest that the rear-emitter design may indeed be a promising pathway for application to metamorphic cells, including III-V/Si tandems, where achieving maximum voltage output is often hindered by elevated dislocation densities. However, further optimization of short-circuit current collection is needed to overcome suboptimal collection probability profiles that could limit the efficacy of such structures.

14 SOLAR ENERGY↗
DOE OSTI2017

The Trinity Center of Excellence Co-Design Best Practices

Co-design between application developers and the vendors providing high-performance computing systems is essential to efficiently using current-generation HPC systems and shaping next-generation architectures. Application developers are faced with the challenge of effectively orchestrating many hardware threads and exploiting vector instructions, which can require code modifications. Will refactoring applications for current-generation systems apply to future-generation systems? Is there help available for this enormous task? Over the past 10 years, a partnership has evolved to address these issues. Centers of Excellence are mutually beneficial collaborations between application developers and vendors; vendors receive a better understanding of the needs of their users, and users receive a better understanding of the characteristics of the hardware, system software, and tools available to address their challenges. Lastly, this article describes the partnership between two vendors, Cray and Intel, and the application teams working together in the Trinity Center of Excellence.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2019

Accelerating DCA++ (Dynamical Cluster Approximation) Scientific Application on the Summit supercomputer

Optimizing scientific applications on today’s accelerator-based high performance computing systems can be challenging, especially when multiple GPUs and CPUs with heterogeneous memories and persistent non-volatile memories are present. An example is Summit, an accelerator-based system at the Oak Ridge Leadership Computing Facility (OLCF) that is rated as the world’s fastest supercomputer to-date. New strategies are thus needed to expose the parallelism in legacy applications, while being amenable to efficient mapping to the underlying architecture.In this paper we discuss our experiences and strategies to port a scientific application, DCA++, to Summit. DCA++ is a highperformance research application that solves quantum manybody problems with a cutting edge quantum cluster algorithm, the dynamical cluster approximation.Our strategies aim to synergize the strengths of the different programming models in the code. These include: (a) streamlining the interactions between the CPU threads and the GPUs, (b) implementing computing kernels on the GPUs and decreasing CPU-GPU memory transfers, (c) allowing asynchronous GPU communications, and (d) increasing compute intensity by combining linear algebraic operations.Full-scale production runs using all 4600 Summit nodes attained a peak performance of 73.5 PFLOPS with a mixed precision implementation.We observed a perfect strong and weak scaling for the quantum Monte Carlo solver in DCA++, while encountering about 2× input/output (I/O) and MPI communication overhead on the time-to-solution for the full machine run. Our hardware agnostic optimizations are designed to alleviate the communication and I/O challenges observed, while improving the compute intensity and obtaining optimal performance on a complex, hybrid architecture like Summit.

Balduzzi, Giovanni↗
DOE OSTI2018

SharP Data Constructs: Data Constructs to Enable Data-Centric Computing

Extreme-scale applications (i.e., Big-Compute) are becoming increasingly data-intensive, i.e., producing and consuming increasingly large amounts of data. The HPC systems traditionally used for these applications are now used for Big-Data applications such as data analytics, social network analysis, machine learning, and genomics. As a consequence of these trends, the system architecture should be flexible and data-centric. This can already be witnessed in the pre-exascale systems with TBs of on-node hierarchical and heterogeneous memories, PBs of system memory, low-latency, high-throughput networks, and many threaded cores. As such, the pre-exascale systems suit the needs of both Big-Compute and Big-Data applications. Though the system architecture is flexible enough to support both Big-Compute and Big-Data, we argue there is a software gap. Particularly, we need data-centric abstractions to leverage the full potential of the system, i.e., there is a need for native support for data resilience, the ability to express data locality and affinity, mechanisms to reduce data movement, the ability to share data, and abstractions to express User's data usage and data access patterns. In this paper, we (i) show the need for taking a holistic approach towards data-centric abstractions, (ii) show how these approaches were realized in the SHARed data-structure centric Programming abstraction (SharP) library, a data-structure centric programming abstraction, and (iii) apply these approaches to a variety of applications that demonstrate its usefulness. Particularly, we apply these approaches to QMCPack and the Graph500 benchmark and demonstrate the advantages of this approach on extreme-scale systems.

Aderholdt, William Ferrol↗
DOE OSTI2023

AMG Preconditioners based on parallel hybrid coarsening and multi-objective graph matching

We describe preliminary results from a multi-objective graph matching algorithm, in the coarsening step of an aggregation-based Algebraic MultiGrid (AMG) preconditioner, for solving large and sparse linear systems of equations on high-end parallel computers. We have two objectives. First, we wish to improve the convergence behavior of the AMG method when applied to highly anisotropic problems. Second, we wish to extend the parallel package \texttt{PSCToolkit} to exploit multi-threaded parallelism at the node level on multi-core processors. Our matching proposal balances the need to simultaneously compute high weights and large cardinalities by a new formulation of the weighted matching problem combining both these objectives using a parameter $\lambda$. We compute the matching by a parallel $2/3-\varepsilon$-approximation algorithm for maximum weight matchings. Results with the new matching algorithm show that for a suitable choice of the parameter $\lambda$ we compute effective preconditioners in the presence of anisotropy, i.e., smaller solve times, setup times, iterations counts, and operator complexity.

D'Ambra, Pasqua↗
DOE OSTI2021

Towards a III-V Solar Cell with a Metamorphic Graded Buffer Directly Grown on V-Groove Si Substrates

V-groove Si substrates offer a promising route for the direct growth of III-V solar cells on low-cost, photovoltaic-grade Si. In this work, we develop a method for coalescing GaP nucleated on V-groove substrates into thin films suitable for the growth of III-V solar cells. We demonstrate the ability to suppress nucleation-related defects by modifying the V-groove substrate to cover the (0 0 1)-oriented Si V-groove tops with SiN x . A threading dislocation density (TDD) of 5 × 10 7 cm -2 was measured with electron channeling contrast imaging. Continuing work will focus on further reducing the TDD and the growth of a GaAs solar cell on a GaP on V-groove Si template.

41 EE - Solar Energy Technologies Office (EE-4S)↗
DOE OSTI2024

1.1 eV GaInAs Cell Development for Dual-Use Solar and 1070 nm Laser Power Converters

Dual-use power converter cells can receive solar and laser power simultaneously to generate current, an application relevant to space and terrestrial industries. This study investigates two concepts of solar cells optimized for dual-use 1070 nm laser and solar power conversion, a single-junction and triple-junction cell. Because it is bandgap-tuned for a 1070 nm laser, the 1.1 eV junction is incorporated into each of the two designs, making its development key to the success of both concepts. Efficiency data for a one junction GaInAs cell demonstrates a laser conversion efficiency of 38% at 1070nm wavelength without an anti-reflection coating. However, the single-junction device requires optimization to reduce short wavelength absorption of the broad solar spectrum. In both devices, the graded buffer layers in the GaInAs cell affects the cell's performance by reducing threading dislocations in the active junction. However, the buffer in the three-junction device also acts as a lateral transport layer and so affects the fill factor depending on its sheet resistance. By varying the buffer thickness, we demonstrate a direct relationship between buffer thickness and sheet resistance reduction, while considering implications to open-circuit voltages. We also performed resistance modeling to determine the optimal grid spacing and thickness of the grid fingers to minimize losses due to sheet resistance and grid shading.

junctions↗
DOE OSTI2019

CosmoFlow: Using Deep Learning to Learn the Universe at Scale

Deep learning is a promising tool to determine the physical model that describes our universe. To handle the considerable computational cost of this problem, we present CosmoFlow: a highly scalable deep learning application built on top of the TensorFlow framework. CosmoFlow uses efficient implementations of 3D convolution and pooling primitives, together with improvements in threading for many element-wise operations, to improve training performance on Intel ® Xeon Phi™ processors. We also utilize the Cray PE Machine Learning Plugin for efficient scaling to multiple nodes. We demonstrate fully synchronous data-parallel training on 8192 nodes of Cori with 77% parallel efficiency, achieving 3.5 Pflop/s sustained performance. To our knowledge, this is the first large-scale science application of the TensorFlow framework at supercomputer scale with fully-synchronous training. Here, these enhancements enable us to process large 3D dark matter distribution and predict the cosmological parameters Ω M , σ 8 and n s with unprecedented accuracy.

98 NUCLEAR DISARMAMENT, SAFEGUARDS, AND PHYSICAL P↗
DOE OSTI2018

Symmetric Indefinite Linear Solver Using OpenMP Task on Multicore Architectures

Recently, the Open Multi-Processing (OpenMP) standard has incorporated task-based programming, where a function call with input and output data is treated as a task. At run time, OpenMP's superscalar scheduler tracks the data dependencies among the tasks and executes the tasks as their dependencies are resolved. On a shared-memory architecture with multiple cores, the independent tasks are executed on different cores in parallel, thereby enabling parallel execution of a seemingly sequential code. With the emergence of many-core architectures, this type of programming paradigm is gaining attention-not only because of its simplicity, but also because it breaks the artificial synchronization points of the program and improves its thread-level parallelization. In this paper, we use these new OpenMP features to develop a portable high-performance implementation of a dense symmetric indefinite linear solver. Obtaining high performance from this kind of solver is a challenge because the symmetric pivoting, which is required to maintain numerical stability, leads to data dependencies that prevent us from using some common performance-improving techniques. To fully utilize a large number of cores through tasking, while conforming to the OpenMP standard, we describe several techniques. Our performance results on current many-core architectures-including Intel's Broadwell, Intel's Knights Landing, IBM's Power8, and Arm's ARMv8-demonstrate the portable and superior performance of our implementation compared with the Linear Algebra PACKage (LAPACK). The resulting solver is now available as a part of the PLASMA software package.

Computer Science↗