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At least 811 records · Page 45

Offset Compound Gear Drive

The Offset Compound Gear Drive is an in-line, discrete, two-speed device utilizing a special offset compound gear that has both an internal tooth configuration on the input end and external tooth configuration on the output end, thus allowing it to mesh in series, simultaneously, with both a smaller external tooth input gear and a larger internal tooth output gear. This unique geometry and offset axis permits the compound gear to mesh with the smaller diameter input gear and the larger diameter output gear, both of which are on the same central, or primary, centerline. This configuration results in a compact in-line reduction gear set consisting of fewer gears and bearings than a conventional planetary gear train. Switching between the two output ratios is accomplished through a main control clutch and sprag. Power flow to the above is transmitted through concentric power paths. Low-speed operation is accomplished in two meshes. For the purpose of illustrating the low-speed output operation, the following example pitch diameters are given. A 5.0 pitch diameter (PD) input gear to 7.50 PD (internal tooth) intermediate gear (0.667 reduction mesh), and a 7.50 PD (external tooth) intermediate gear to a 10.00 PD output gear (0.750 reduction mesh). Note that it is not required that the intermediate gears on the offset axis be of the same diameter. For this example, the resultant low-speed ratio is 2:1 (output speed = 0.500; product of stage one 0.667 reduction and stage two 0.750 stage reduction). The design is not restricted to the example pitch diameters, or output ratio. From the output gear, power is transmitted through a hollow drive shaft, which, in turn, drives a sprag during which time the main clutch is disengaged.

Stevens, Mark A.↗

Concentric differential gearing arrangement

Two input members and two concentric rotatable output members are interconnected by a planetary gear arrangement. The first input drives directly the first output. The second input engages a carrier having the planetary gears affixed thereto. Rotation of the carriage causes rotation of the central sun gear of the planetary gear system. The sun gear is journaled to the carriage and is drivingly connected to the second output through a direction reversing set of bevel gears. The first input drive member includes a ring gear drivingly connected to the planetary gears for driving the second output member in the same direction and by the same amount as the first output member. Motion of the first input results in equal motion of the two outputs while input motion of the second input results in movement of the second output relative to the first output. This device is useful where non-interacting two-axis control of remote gimbaled systems is required.

Zeiger, R. J.↗

Multiple symbol differential detection

A differential detection technique for multiple phase shift keying (MPSK) signals is provided which uses a multiple symbol observation interval on the basis of which a joint decision is made regarding the phase of the received symbols. In accordance with the invention, a first difference phase is created between first and second received symbols. Next, the first difference phase is correlated with the possible values thereof to provide a first plurality of intermediate output signals. A second difference phase is next created between second and third received symbols. The second difference phase is correlated with plural possible values thereof to provide a second plurality of intermediate output signals. Next, a third difference phase is created between the first and third symbols. The third difference phase is correlated with plural possible values thereof to provide a third plurality of intermediate output signals. Each of the first plurality of intermediate outputs are combined with each of the second plurality of intermediate outputs and each of the third plurality of intermediate outputs to provide a plurality of possible output values. Finally, a joint decision is made by choosing from the plurality of possible output values the value which represents the best combined correlation of the first, second and third difference values with the possible values thereof.

Divsalar, Dariush↗

Shape Optimization by Bayesian-Validated Computer-Simulation Surrogates

A nonparametric-validated, surrogate approach to optimization has been applied to the computational optimization of eddy-promoter heat exchangers and to the experimental optimization of a multielement airfoil. In addition to the baseline surrogate framework, a surrogate-Pareto framework has been applied to the two-criteria, eddy-promoter design problem. The Pareto analysis improves the predictability of the surrogate results, preserves generality, and provides a means to rapidly determine design trade-offs. Significant contributions have been made in the geometric description used for the eddy-promoter inclusions as well as to the surrogate framework itself. A level-set based, geometric description has been developed to define the shape of the eddy-promoter inclusions. The level-set technique allows for topology changes (from single-body,eddy-promoter configurations to two-body configurations) without requiring any additional logic. The continuity of the output responses for input variations that cross the boundary between topologies has been demonstrated. Input-output continuity is required for the straightforward application of surrogate techniques in which simplified, interpolative models are fitted through a construction set of data. The surrogate framework developed previously has been extended in a number of ways. First, the formulation for a general, two-output, two-performance metric problem is presented. Surrogates are constructed and validated for the outputs. The performance metrics can be functions of both outputs, as well as explicitly of the inputs, and serve to characterize the design preferences. By segregating the outputs and the performance metrics, an additional level of flexibility is provided to the designer. The validated outputs can be used in future design studies and the error estimates provided by the output validation step still apply, and require no additional appeals to the expensive analysis. Second, a candidate-based a posteriori error analysis capability has been developed which provides probabilistic error estimates on the true performance for a design randomly selected near the surrogate-predicted optimal design.

Patera, Anthony T.↗

Dual Brushless Resolver Rate Sensor

A resolver rate sensor is disclosed in which dual brushless resolvers are mechanically coupled to the same output shaft. Diverse inputs are provided to each resolver by providing the first resolver with a DC input and the second resolver with an AC sinusoidal input. A trigonometric identity in which the sum of the squares of the sin and cosine components equal one is used to advantage in providing a sensor of increased accuracy. The first resolver may have a fixed or variable DC input to permit dynamic adjustment of resolver sensitivity thus permitting a wide range of coverage. In one embodiment of the invention the outputs of the first resolver are directly inputted into two separate multipliers and the outputs of the second resolver are inputted into the two separate multipliers, after being demodulated in a pair of demodulator circuits. The multiplied signals are then added in an adder circuit to provide a directional sensitive output. In another embodiment the outputs from the first resolver is modulated in separate modulator circuits and the output from the modulator circuits are used to excite the second resolver. The outputs from the second resolver are demodulated in separate demodulator circuit and added in an adder circuit to provide a direction sensitive rate output.

Howard, David E.↗

Rodent Studies of Cardiovascular Deconditioning

Changes in blood pressure can occur for two reasons: 1) A decrease in cardiac output resulting from the altered contractility of the heart or through changes in venous filling pressure via the Frank Starling mechanism or; 2) A change in systemic vascular resistance. The observed changes in cardiac output and blood pressure after long term space flight cannot be entirely explained through changes in contractility or heart rate alone. Therefore, alterations in filling pressure mediated through changes in systemic venous capacitance and arterial resistance function may be important determinants of cardiac output and blood pressure after long term space flight. Our laboratory and previous studies have shown the importance of veno-constriction mediated by the carotid sinus baroreceptor reflex system on overall circulatory homeostasis and in the regulation of cardiac output. Our proposed experiments test the overall hypothesis that alterations in venous capacitance function and arterial resistance by the carotid sinus baroreceptor reflex system are an important determinant of the cardiac output and blood pressure response seen in astronauts after returning to earth from long term exposure to microgravity. This hypothesis is important to our overall understanding of circulatory adjustments made during long term space flight. It also provides a framework for investigating counter measures to reduce the incidence of orthostatic hypotension caused by an attenuation of cardiac output. We continue to use hind limb unweighted (HLU) rat model to simulate the patho physiological effects as they relate to cardiovascular deconditioning in microgravity. We have used this model to address the hypothesis that microgravity induced cardiovascular deconditioning results in impaired vascular responses and that these impaired vascular responses result from abnormal alpha-1 AR signaling. The impaired vascular reactivity results in attenuated blood pressure and cardiac output responses to an orthostatic challenge. We have used in vitro vascular reactivity assays to explore abnormalities in vascular responses in vessels from HLU animals and, cardiac output (CO), blood pressure (BP) and heart rate (HR) measurements to characterize changes in hemodynamics following HLU.

Shoukas, Artin A.↗

Apparatus and Method for Effecting Data Transfer Between Data Systems

An apparatus for effecting data transfer between data systems comprising a first transceiver and a second transceiver. The first transceiver has an input for receiving digital data from one of the data systems, an output for serially outputting digital data to one of the data systems, at least one transmitter for converting digital data received at the input into optical signals, and at least one receiver for receiving optical signals and serially converting the received optical signals to digital data for output to the data output. The second transceiver has an input for receiving digital data from another one of the data systems, an output for serially outputting digital data to the another one of the data systems, at least one transmitter for serially converting digital data received at the input of the second transceiver into optical signals, and at least one receiver for receiving optical signals and serially converting the received optical signals to digital data for output to the output of the second transceiver. The apparatus further comprises an optical link connecting the first and second transceivers. The optical link comprising a pair of optical fibers. One of the optical fibers optically links the transmitter of the first transceiver to the receiver of the second transceiver. The other optical fiber optically links the receiver of the first transceiver to the transmitter of the second transceiver.

Kirkpatrick, Joey V.↗

Method and Apparatus for Reducing the Vulnerability of Latches to Single Event Upsets

A delay circuit includes a first network having an input and an output node, a second network having an input and an output, the input of the second network being coupled to the output node of the first network. The first network and the second network are configured such that: a glitch at the input to the first network having a length of approximately one-half of a standard glitch time or less does not cause the voltage at the output of the second network to cross a threshold, a glitch at the input to the first network having a length of between approximately one-half and two standard glitch times causes the voltage at the output of the second network to cross the threshold for less than the length of the glitch, and a glitch at the input to the first network having a length of greater than approximately two standard glitch times causes the voltage at the output of the second network to cross the threshold for approximately the time of the glitch. The method reduces the vulnerability of a latch to single event upsets. The latch includes a gate having an input and an output and a feedback path from the output to the input of the gate. The method includes inserting a delay into the feedback path and providing a delay in the gate.

Robert L Shuler, Jr.↗

Method and Apparatus for Reducing the Vulnerability of Latches to Single Event Upsets

A delay circuit includes a first network having an input and an output node, a second network having an input and an output, the input of the second network being coupled to the output node of the first network. The first network and the second network are configured such that: a glitch at the input to the first network having a length of approximately one-half of a standard glitch time or less does not cause tile voltage at the output of the second network to cross a threshold, a glitch at the input to the first network having a length of between approximately one-half and two standard glitch times causes the voltage at the output of the second network to cross the threshold for less than the length of the glitch, and a glitch at the input to the first network having a length of greater than approximately two standard glitch times causes the voltage at the output of the second network to cross the threshold for approximately the time of the glitch. A method reduces the vulnerability of a latch to single event upsets. The latch includes a gate having an input and an output and a feedback path from the output to the input of the gate. The method includes inserting a delay into the feedback path and providing a delay in the gate.

Robert L Shuler Jr.↗

Ferroresonant flux coupled battery charger

A battery charger for incorporation into an electric-powered vehicle is disclosed. The charger includes a ferroresonant voltage-regulating circuit for providing an output voltage proportional to the frequency of an input AC voltage. A high frequency converter converts a DC voltage supplied, for example, from a rectifier connected to a standard AC outlet, to a controlled frequency AC voltage which is supplied to the input of the ferroresonant circuit. The ferroresonant circuit includes an output, a saturable core transformer connected across the output, and a first linear inductor and a capacitor connected in series across the saturable core transformer and tuned to resonate at the third harmonic of the AC voltage from the high frequency converter. The ferroresonant circuit further includes a second linear inductor connected between the input of the ferroresonant circuit and the saturable core transformer. The output voltage from the ferroresonant circuit is rectified and applied across a pair of output terminals adapted to be connected to the battery to be charged. A feedback circuit compares the voltage across the output terminals with a reference voltage and controls the frequency of the AC voltage produced by the high frequency converter to maintain the voltage across the output terminals at a predetermined value. The second linear inductor provides a highly reactive load in the event of a fault across the output terminals to render the charger short-circuit proof.

McLyman, Colonel W. T.↗

Multiloop Rapid-Rise/Rapid Fall High-Voltage Power Supply

A proposed multiloop power supply would generate a potential as high as 1.25 kV with rise and fall times <100 s. This power supply would, moreover, be programmable to generate output potentials from 20 to 1,250 V and would be capable of supplying a current of at least 300 A at 1,250 V. This power supply is intended to be a means of electronic shuttering of a microchannel plate that would be used to intensify the output of a charge-coupled-device imager to obtain exposure times as short as 1 ms. The basic design of this power supply could also be adapted to other applications in which high voltages and high slew rates are needed. At the time of reporting the information for this article, there was no commercially available power supply capable of satisfying the stated combination of voltage, rise-time, and fall-time requirements. The power supply would include a preregulator that would be used to program a voltage 1/30 of the desired output voltage. By means of a circuit that would include a pulse-width modulator (PWM), two voltage doublers, and a transformer having two primary and two secondary windings, the preregulator output voltage would be amplified by a factor of 30. A resistor would limit the current by controlling a drive voltage applied to field-effect transistors (FETs) during turn-on of the PWM. Two feedback loops would be used to regulate the high output voltage. A pulse transformer would be used to turn on four FETs to short-circuit output capacitors when the outputs of the PWM were disabled. Application of a 0-to-5-V square to a PWM shut-down pin would cause a 20-to-1,250-V square wave to appear at the output.

Bearden, Douglas↗

Efficient Switching Arrangement for (N + 1)/N Redundancy

An efficient arrangement of four switches has been conceived for coupling, to four output ports, the output powers of any subset of four devices that are members of a redundant set of five devices. In normal operation, the output power of each of four of the devices would be coupled to one of the four output ports. The remaining device would be kept as a spare: normally, its output power would be coupled to a load, wherein that power would be dissipated. In the event of failure of one of the four normally used devices, that device would be disconnected from its output port and connected to the load, and the spare device would be connected to the output from which the failed device was disconnected. Alternatively or in addition, the outputs of one or more devices could be sent to ports other than the ones originally assigned to them.

Lux, James↗

Ka-Band TWT High-Efficiency Power Combiner for High-Rate Data Transmission

A four-port magic-T hybrid waveguide junction serves as the central component of a high-efficiency two-way power combiner circuit for transmitting a high-rate phase-modulated digital signal at a carrier frequency in the Ka-band (between 27 and 40 GHz). This power combiner was developed to satisfy a specific requirement to efficiently combine the coherent outputs of two traveling-wavetube (TWT) amplifiers that are typically characterized by power levels on the order of 100 W or more. In this application, the use of a waveguide-based power combiner (instead of a coaxial-cable- or microstrip-based power combiner, for example) is dictated by requirements for low loss, high power-handling capability, and broadband response. Combiner efficiencies were typically 90 percent or more over both the linear and saturated output power regions of operation of the TWTs . Figure 1 depicts the basic configuration of the magic-T hybrid junction. The coherent outputs of the two TWTs enter through ports 1 and 4. As a result of the orientations of the electromagnetic fields, which also provides a needed high port-to-port isolation, of these two input signals and the interior design of the magic-T junction, the input powers are divided so as to add in phase at one output port (port 2), and to be opposite in phase and hence cancel each other at the opposite coplanar output port (port 3). The net result is that the output power at port 2 is essentially double that of the output of one TWT, minus the power lost in the magic-T hybrid junction. Optimum performance as a high-efficiency power combiner thus requires a balance of both power and phase at the input ports of the magic-T. Replicas of this two-way combiner can be arranged in a binary configuration to obtain a 2n-way (where n is an integer) combiner. For example, Figure 2 illustrates the use of three two-way combiners to combine the outputs of four TWTs.

Wintucky, Edwin G.↗

X-Band, 17-Watt Solid-State Power Amplifier

An advanced solid-state power amplifier that can generate an output power of as much as 17 W at a design operating frequency of 8.4 GHz has been designed and constructed as a smaller, lighter, less expensive alternative to traveling-wave-tube X-band amplifiers and to prior solid-state X-band power amplifiers of equivalent output power. This amplifier comprises a monolithic microwave integrated circuit (MMIC) amplifier module and a power-converter module integrated into a compact package (see Figure 1). The amplifier module contains an input variable-gain amplifier (VGA), an intermediate driver stage, a final power stage, and input and output power monitors (see Figure 2). The VGA and the driver amplifier are 0.5-m GaAs-based metal semiconductor field-effect transistors (MESFETs). The final power stage contains four parallel high-efficiency, GaAs-based pseudomorphic high-electron-mobility transistors (PHEMTs). The gain of the VGA is voltage-variable over a range of 10 to 24 dB. To provide for temperature compensation of the overall amplifier gain, the gain-control voltage is generated by an operational-amplifier circuit that includes a resistor/thermistor temperature-sensing network. The driver amplifier provides a gain of 14 dB to an output power of 27 dBm to drive the four parallel output PHEMTs, each of which is nominally capable of putting out as much as 5 W. The driver output is sent to the input terminals of the four parallel PHEMTs through microstrip power dividers; the outputs of these PHEMTs are combined by microstrip power combiners (which are similar to the microstrip power dividers) to obtain the final output power of 17 W.

Mittskus, Anthony↗

Inverter ratio failure detector

A failure detector which detects the failure of a dc to ac inverter is disclosed. The inverter under failureless conditions is characterized by a known linear relationship of its input and output voltages and by a known linear relationship of its input and output currents. The detector includes circuitry which is responsive to the detector's input and output voltages and which provides a failure-indicating signal only when the monitored output voltage is less by a selected factor, than the expected output voltage for the monitored input voltage, based on the known voltages' relationship. Similarly, the detector includes circuitry which is responsive to the input and output currents and provides a failure-indicating signal only when the input current exceeds by a selected factor the expected input current for the monitored output current based on the known currents' relationship.

Wagner, A. P.↗

Digital phase-locked loop

An digital phase-locked loop is provided for deriving a loop output signal from an accumulator output terminal. A phase detecting exclusive OR gate is fed by the loop digital input and output signals. The output of the phase detector is a bi-level digital signal having a duty cycle indicative of the relative phase of the input and output signals. The accumulator is incremented at a first rate in response to a first output level of the phase detector and at a second rate in response to a second output level of the phase detector.

Cliff, R. A.↗

Design and analysis of optically pumped submillimeter waveguide maser amplifiers and oscillators

The design and experimental measurements are described of an optically pumped far-infrared (FIR) waveguide maser; preliminary measurements on a FIR waveguide amplifier are presented. The FIR maser was found to operate satisfactorily in a chopped CW mode using either methanol (CH3OH) or acetonitrile (CH3CN) as the active molecule. Two other gases, difluoroethane and difluoroethylene, produced an unstable output with high threshold and low output power when operated in the chopped CW mode. Experimental measurements include FIR output versus cavity length, output beam pattern, output power versus pressure, and input power. The FIR output was the input to an amplifier which was constructed similar to the oscillator. An increase of 10% in output power was noted on the 118.8 microns line of methanol.

Galantowicz, T. A.↗

Prototype laser-diode-pumped solid state laser transmitters

Monolithic, diode-pumped Nd:YAG ring lasers can provide diffraction-limited, single-frequency, narrow-linewidth, tunable output which is adequate for use as a local oscillator in a coherent communication system. A laser was built which had a linewidth of about 2 kHz, a power of 5 milliwatts, and which was tunable over a range of 30 MHz in a few microseconds. This laser was phase-locked to a second, similar laser. This demonstrates that the powerful technique of heterodyne detection is possible with a diode-pumped laser used as the local oscillator. Laser diode pumping of monolithic Nd:YAG rings can lead to output powers of hundreds of milliwatts from a single laser. A laser was built with a single-mode output of 310 mW. Several lasers can be chained together to sum their power, while maintaining diffraction-limited, single frequency operation. This technique was demonstrated with two lasers, with a total output of 340 mW, and is expected to be practical for up to about ten lasers. Thus with lasers of 310 mW, output of up to 3 W is possible. The chaining technique, if properly engineered, results in redundancy. The technique of resonant external modulation and doubling is designed to efficiently convert the continuous wave, infrared output of our lasers into low duty-cycle pulsed green output. This technique was verified through both computer modeling and experimentation. Further work would be necessary to develop a deliverable system using this technique.

Kane, Thomas J.↗