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At least 811 records · Page 45

Image synthesis for SAR system, calibration and processor design

The Point Scattering Method of simulating radar imagery rigorously models all aspects of the imaging radar phenomena. Its computational algorithms operate on a symbolic representation of the terrain test site to calculate such parameters as range, angle of incidence, resolution cell size, etc. Empirical backscatter data and elevation data are utilized to model the terrain. Additionally, the important geometrical/propagation effects such as shadow, foreshortening, layover, and local angle of incidence are rigorously treated. Applications of radar image simulation to a proposed calibrated SAR system are highlighted: soil moisture detection and vegetation discrimination.

Holtzman, J. C.↗

Effects of range bin shape and Doppler filter response in a digital SAR data processor

In calibrating the backscatter coefficient obtained with an imaging synthetic aperture radar (SAR) system to determine absolute values of radar cross-section and reflectivity it is common practice to use a target of known radar cross-section placed within the scene. A corner reflector acts as a point target, but the return from it may not be centered in the resolution cell. It is important, for accurate calibration, to perform straddling corrections based on the range bin and Doppler filter response curves.

Griffin, C. R.↗

Microcomputer technology applications: Charger and regulator software for a breadboard programmable power processor

Software programs are described, one which implements a voltage regulation function, and one which implements a charger function with peak-power tracking of its input. The software, written in modular fashion, is intended as a vehicle for further experimentation with the P-3 system. A control teleprinter allows an operator to make parameter modifications to the control algorithm during experiments. The programs require 3K ROM and 2K ram each. User manuals for each system are included as well as a third program for simple I/O control.

Green, D. M.↗

Custom large scale integrated circuits for spaceborne SAR processors

The application of modern LSI technology to the development of a time-domain azimuth correlator for SAR processing is discussed. General design requirements for azimuth correlators for such missions as Seasat-A, Venus Orbital Imaging Radar, and Shuttle Imaging Radar are summarized. Several azimuth correlator architectures suitable for implementation using custom LSI devices are described. Technical factors pertaining to selection of appropriate LSI technologies are discussed, and the maturity of alternative technologies for spacecraft application is examined in the context of the expected launch dates. In particular, it is demonstrated that a custom LSI device is practical for a system as complex as the DMSP.

Tyree, V. C.↗

Vector processor algorithms for transonic flow calculations

This paper discusses a number of algorithms for solving the transonic full-potential equation in conservative form on a vector computer, such as the CDC STAR-100 or the CRAY-1. Recent research with the 'artificial density' method for transonics has led to development of some new iteration schemes which take advantage of vector-computer architecture without suffering significant loss of convergence rate. Several of these more promising schemes are described and 2-D and 3-D results are shown comparing the computational rates on the STAR and CRAY vector computers, and the CYBER-175 serial computer. Schemes included are: (1) Checkerboard SOR, (2) Checkerboard Leapfrog, (3) odd-even vertical line SOR, and (4) odd-even horizontal line SOR.

South, J. C., Jr.↗

Online assessment of a distributed processor

ORT (Operational Readiness Test) software allows one engineer to test readiness of 64 minicomputers and their peripherals from single console. Software makes roll call of computers and peripherals via common data buffer to check readiness of system in morning "wake up" or at other important times. Subsystems are tested in parallel to save time. "Watchdog" terminates test of any system that does not respond in time, so one failed system does not halt test sequence. Entire rollcall is complete in about 15 minutes. Software is designed for Space Shuttle prelaunch checkout, but approach should interest users of similar equipment.

Ehrlich, L. F.↗

MBASIC processor

MBASIC is high-level, interactive computer language that reduces time of computer task programming. Outstanding features of MBASIC include: multiple assignments or statements in single instruction; conditional, assignment, and repetitive statement modifiers; and excellent string-handling capabilities. Two machine versions are available: UNIVAC (written in reentrant Assembler code for execution under EXEC 8) AND DEC-10 (written in Assembler code for execution under TOPS-10).

Hartley, R. B.↗

Cartography: LACIE's spatial processor

The spatial processing needs of LACIE include the location of agricultural test sites, and the registration of ground truth to LANDSAT imagery. The technological aspects of LACIE cartographic support, the need for cartography in satellite crop surveys, and proposed improvements which would enhance support of future programs are discussed.

Rader, M. L.↗

Orbit attitude processor. STS-1 bench program verification test plan

A plan for the static verification of the STS-1 ATT PROC ORBIT software requirements is presented. The orbit version of the SAPIENS bench program is used to generate the verification data. A brief discussion of the simulation software and flight software modules is presented along with a description of the test cases.

Mcclain, C. R.↗

Correlator computer interface and module implementation: Mark 3 processor

Two hardware aspects of the Mark 3 correlator are briefly described. The first area concerns the choice of interface to the controlling minicomputer and the second area concerns the implementation of the correlator module. Multiple computer automated measurement and control (CAMAC) modules and a single large CAMAC module were considered as possible packaging forms for the correlator. The large CAMAC module approach was chosen because of the difficulty in partitioning the correlator with minimum interconnections, the fabrication economy of a single large planar assembly, and the desire to minimize the number of modules.

Nesman, E. F.↗

Concerning the feasibility of a real time SAR digital processor for VOIR low resolution imaging modes

The feasibility of real time digital processing of synthetic aperture radar data for Venus orbiting imaging radar low resolution modes was investigated. First, it is shown that range migration is not a problem for these modes. Then, under the assumption of no range migration, fast Fourier transform implementations for accomplishing both range and azimuth correlation in real time are shown to be feasible with current technology.

Truong, T. K.↗