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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 847 records · Page 47

Advanced techniques in reliability model representation and solution

The current tendency of flight control system designs is towards increased integration of applications and increased distribution of computational elements. The reliability analysis of such systems is difficult because subsystem interactions are increasingly interdependent. Researchers at NASA Langley Research Center have been working for several years to extend the capability of Markov modeling techniques to address these problems. This effort has been focused in the areas of increased model abstraction and increased computational capability. The reliability model generator (RMG) is a software tool that uses as input a graphical object-oriented block diagram of the system. RMG uses a failure-effects algorithm to produce the reliability model from the graphical description. The ASSURE software tool is a parallel processing program that uses the semi-Markov unreliability range evaluator (SURE) solution technique and the abstract semi-Markov specification interface to the SURE tool (ASSIST) modeling language. A failure modes-effects simulation is used by ASSURE. These tools were used to analyze a significant portion of a complex flight control system. The successful combination of the power of graphical representation, automated model generation, and parallel computation leads to the conclusion that distributed fault-tolerant system architectures can now be analyzed.

Palumbo, Daniel L.↗

Flexible high speed CODEC (FHSC)

This paper describes the on going NASA/Harris FHSC CODEC program. The program objectives are to design and build an encoder decoder that allows operation in either burst or continuous modes at data rates of up to 300 megabits per second. The decoder handles both hard and soft decision decoding and can switch between modes on a burst by burst basis. Bandspreading is low since the code rate is greater than or equal to 7/8. The encoder and a hard decision decoder fit on a single application specific integrated circuit (ASIC) chip. A soft decision applique is implemented using 300 K ECL logic which can be easily translated to an ECL gate array.

Segallis, G. P.↗

Imaging pulse-counting detector systems for space ultraviolet astrophysics missions

A family of imaging, pulse-counting, photoelectric detector systems, the Multi-Anode Microchannel Arrays (MAMAs), are now under active development for use on a number of space ultraviolet astrophysics missions at far-ultraviolet (FUV) and extreme-ultraviolet wavelengths between about 300 and 28 nm. Specifically, MAMA detectors are being fabricated and tested for use in two instruments on the ESA/NASA Solar and Heliospheric Observatory mission, for the NASA Goddard Space Flight Center's Hubble Space Telescope Imaging Spectrograph, and for the prime FUV spectrograph of the Far Ultraviolet Spectroscopic Explorer FUSE/Lyman mission. The construction and performance characteristics of the different MAMA detector systems are described, and techniques for improving the spatial resolution of each of the detector systems by the use of custom application specific integrated circuits in the electronics are discussed.

Timothy, J. G.↗

Predicting Lifetimes Of CMOS ASIC's From Test Data

Concise report discusses recent developments in use of semiempirical mathematical models to predict rates of failure and operating lifetimes of complementary metal oxide/semiconductor (CMOS) application-specific integrated circuits (ASIC's). Each model represents specific mechanism of failure. Once failure mechanisms and models relevant to given ASIC chosen, adjustable parameters in models fitted to life-test data acquired from representative integrated-circuit structures on test coupons fabricated along with ASIC's. Then design parameters of ASIC's incorporated into models, and models yield lifetimes.

Buehler, Martin G.↗

Spacecraft optical disk recorder memory buffer control

The goal of this project is to develop an Application Specific Integrated Circuit (ASIC) for use in the control electronics of the Spacecraft Optical Disk Recorder (SODR). Specifically, this project is to design an extendable memory buffer controller ASIC for rate matching between a system Input/Output port and the SODR's device interface. The aforementioned goal can be partitioned into the following sub-goals: (1) completion of ASIC design and simulation (on-going via ASEE fellowship); (2) ASIC Fabrication (at ASIC manufacturer); and (3) ASIC Testing (NASA/LaRC, Christopher Newport University).

Hodson, Robert F.↗

Scheduling lessons learned from the Autonomous Power System

The Autonomous Power System (APS) project at NASA LeRC is designed to demonstrate the applications of integrated intelligent diagnosis, control, and scheduling techniques to space power distribution systems. The project consists of three elements: the Autonomous Power Expert System (APEX) for Fault Diagnosis, Isolation, and Recovery (FDIR); the Autonomous Intelligent Power Scheduler (AIPS) to efficiently assign activities start times and resources; and power hardware (Brassboard) to emulate a space-based power system. The AIPS scheduler was tested within the APS system. This scheduler is able to efficiently assign available power to the requesting activities and share this information with other software agents within the APS system in order to implement the generated schedule. The AIPS scheduler is also able to cooperatively recover from fault situations by rescheduling the affected loads on the Brassboard in conjunction with the APEX FDIR system. AIPS served as a learning tool and an initial scheduling testbed for the integration of FDIR and automated scheduling systems. Many lessons were learned from the AIPS scheduler and are now being integrated into a new scheduler called SCRAP (Scheduler for Continuous Resource Allocation and Planning). This paper will service three purposes: an overview of the AIPS implementation, lessons learned from the AIPS scheduler, and a brief section on how these lessons are being applied to the new SCRAP scheduler.

Ringer, Mark J.↗

Fuzzy efficiency optimization of AC induction motors

This paper describes the early states of work to implement a fuzzy logic controller to optimize the efficiency of AC induction motor/adjustable speed drive (ASD) systems running at less than optimal speed and torque conditions. In this paper, the process by which the membership functions of the controller were tuned is discussed and a controller which operates on frequency as well as voltage is proposed. The membership functions for this dual-variable controller are sketched. Additional topics include an approach for fuzzy logic to motor current control which can be used with vector-controlled drives. Incorporation of a fuzzy controller as an application-specific integrated circuit (ASIC) microchip is planned.

Jani, Yashvant↗

Mixed application MMIC technologies - Progress in combining RF, digital and photonic circuits

Approaches for future 'mixed application' monolithic integrated circuits (ICs) employing optical receive/transmit, RF amplification and modulation and digital control functions are discussed. We focus on compatibility of the photonic component fabrication with conventional RF and digital IC technologies. Recent progress at Honeywell in integrating several parts of the desired RF/digital/photonic circuit integration suite required for construction of a future millimeter-wave optically-controlled phased-array element are illustrated.

Swirhun, S.↗

Lessons learned from the Autonomous Power System

The Autonomous Power System (APS) project at the NASA Lewis Research Center is designed to demonstrate the applications of integrated intelligent diagnosis, control and scheduling techniques to space power distribution systems. The project consists of three elements: the Autonomous Power Expert System (APEX) for Fault Diagnosis, Isolation, and Recovery (FDIR); the Autonomous Intelligent Power Scheduler (AIPS) to efficiently assign activities start times and resources; and power hardware (Brassboard) to emulate a space-based power system. The APS project had been through one design iteration. Each of the three elements of the APS project has been designed, tested, and integrated into a complete working system. After these three portions were completed, an evaluation period was initiated. Each piece of the system was critiqued based on individual performance as well as the ability to interact with the other portions of the APS project. These critiques were then used to determine guidelines for new and improved components of the APS system.

Ringer, Mark J.↗

Design challenges for tomorrow's manned launch systems

This paper attempts to capture some of the technical and national challenges facing the design of America's next manned launch system (MLS). There are three basic paths for pursuing tomorrow's MLS; each with variations. Some characteristics that will be sought regardless of the concept selected include low development (or front-end) and life-cycle costs, safety, operability, availability, and a host of other 'ilities'. In order to discriminate among the concepts, a robust design environment and a variety of new and improved analysis tools are needed that produce critical metrics in a timely, efficient manner from a large study space. This paper presents some of the challenges in development, integration, and application of optimization, costing, operations modeling, and several engineering disciplinary tools including geometry modeling, structures, aerodynamics/aeroheating, and trajectory/performance.

Rowell, Lawrence F.↗

Sensitivity analysis of Lyapunov and Riccati equations with application to controls-structures integrated design

Controls-structure integrated design is a complicated multidisciplinary design optimization problem which involves the state equations pertaining to open-loop eigenvalues and control laws. In order to alleviate the intensity of the computation, this study uses the adjoint variable method to derive sensitivity equations for the eigenvalue, Liapunov, and Riccati equations. These individual sensitivity equations are then combined together to form the multidisciplinary sensitivity equations for the control structure integrated design problems. A set of linear sensitivity equations, proportional in number to the number of performance functions involved in the optimization process, are solved. This proposed approach may provide a great saving in computer resources. The validity of the newly developed sensitivity equations is verified by numerical examples.

Hou, Gene↗

High resolution decoding of Multi-Anode Microchannel Array detectors

The Multi-Anode Microchannel Array (MAMA) is a photon counting detector which utilizes a photocathode for photon to electron conversion, a microchannel plate (MCP) for signal amplification and a proximity focused anode array for position sensitivity. The detector electronics decode the position of an event through coincidence discrimination. The decoding algorithm which associates a given event with the appropriate pixel is determined by the geometry of the array. A new algorithm incorporated into a CMOS Application Specific Integrated Circuit (ASIC) decoder which improves the pixel spatial resolution is described. The new algorithm does not degrade the detector throughput and does not require any modifications to the detector tube. The standard MAMA detector has a pixel size of 25 x 25 square microns, but with the new decoder circuit the pixel size is reduced to 12.5 x 12.5 square microns. We have built the first set of decode electronics utilizing the new ASIC chips and report here on the first imaging tests of this system.

Kasle, David B.↗

Preliminary results from the MAMA detectors for the SOHO mission

Multi-Anode Microchannel Array (MAMA) detector systems are being fabricated and tested for use in the Solar Ultraviolet Measurements of Emitted Radiation (SUMER) and the Ultraviolet Coronagraph Spectrometer (UVCS) instruments on the ESA/NASA Solar and Heliospheric Observatory (SOHO) mission. The SOHO MAMA detector systems have formats of 360 x 1024 pixels and pixel dimensions of 25 x 25 sq microns and are optimized for operation at Extreme Ultraviolet (EUV) wavelengths between 40 and 160 nm. In this paper we report on the initial results of measurements of the performance characteristics of the first flight-configuration detector system employing the new custom Application Specific Integrated Circuits (ASICs) which are designed to improve both the dynamic range and the uniformity of response. The performance characteristics of this detector system are compared with those of earlier breadboard systems employing discrete-component electronics circuits.

Slater, David C.↗

A study of flying-boat take-off

It is shown that the normal resistance curve for a flying boat may be approximated by two straight lines. The equations for take-off distance and time, derived from this approximation, are applied to a series of flying boats and the resulting factors are plotted in non dimensional form in a series of charts. Take-off performances from the charts are shown to be in good agreement with step-by-step integrations. Some applications of the charts to the solution of general design problems are included.

Diehl, Walter S↗

A Motion-Compensating Image-Compression Scheme

Chrominance used (in addition to luminance) in estimating motion. Variable-rate digital coding scheme for compression of color-video-image data designed to deliver pictures of good quality at moderate compressed-data rate of 1 to 2 bits per pixel, or of fair quality at rate less than 1 bit per pixel. Scheme, in principle, implemented by use of commercially available application-specific integrated circuits. Incorporates elements of some prior coding schemes, including motion compensation (MC) and discrete cosine transform (DCT).

Wong, Carol↗

Estimating Delays In ASIC's

Verification is important aspect of process of designing application-specific integrated circuit (ASIC). Design must not only be functionally accurate, but must also maintain correct timing. IFA, Intelligent Front Annotation program, assists in verifying timing of ASIC early in design process. This program speeds design-and-verification cycle by estimating delays before layouts completed. Written in C language.

Burke, Gary↗

High performance VLSI telemetry data systems

NASA's deployment of major space complexes such as Space Station Freedom (SSF) and the Earth Observing System (EOS) will demand increased functionality and performance from ground based telemetry acquisition systems well above current system capabilities. Adaptation of space telemetry data transport and processing standards such as those specified by the Consultative Committee for Space Data Systems (CCSDS) standards and those required for commercial ground distribution of telemetry data, will drive these functional and performance requirements. In addition, budget limitations will force the requirement for higher modularity, flexibility, and interchangeability at lower cost in new ground telemetry data system elements. At NASA's Goddard Space Flight Center (GSFC), the design and development of generic ground telemetry data system elements, over the last five years, has resulted in significant solutions to these problems. This solution, referred to as the functional components approach includes both hardware and software components ready for end user application. The hardware functional components consist of modern data flow architectures utilizing Application Specific Integrated Circuits (ASIC's) developed specifically to support NASA's telemetry data systems needs and designed to meet a range of data rate requirements up to 300 Mbps. Real-time operating system software components support both embedded local software intelligence, and overall system control, status, processing, and interface requirements. These components, hardware and software, form the superstructure upon which project specific elements are added to complete a telemetry ground data system installation. This paper describes the functional components approach, some specific component examples, and a project example of the evolution from VLSI component, to basic board level functional component, to integrated telemetry data system.

Chesney, J.↗