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At least 847 records · Page 47

Development of land based radar polarimeter processor system

The processing subsystem of a land based radar polarimeter was designed and constructed. This subsystem is labeled the remote data acquisition and distribution system (RDADS). The radar polarimeter, an experimental remote sensor, incorporates the RDADS to control all operations of the sensor. The RDADS uses industrial standard components including an 8-bit microprocessor based single board computer, analog input/output boards, a dynamic random access memory board, and power supplis. A high-speed digital electronics board was specially designed and constructed to control range-gating for the radar. A complete system of software programs was developed to operate the RDADS. The software uses a powerful real time, multi-tasking, executive package as an operating system. The hardware and software used in the RDADS are detailed. Future system improvements are recommended.

Kronke, C. W.↗

Signal processor architecture for backscatter radars

Real time signal processing for backscatter radars which requires computational throughput and I/O rates is discussed. The operations that are usually performed in real time are highly repetitive simple accumulations of samples or of products of samples. The control logic does not depend on the values of the data and general purpose computers are not required for the initial high speed processing. The implications of these facts on the architectures of preprocessors for backscatter radars are explored and applied to the design of the Radar Signal Compender.

Swartz, W. E.↗

Operational characteristics of the dispersed sensor processor mesh

The dispersed sensor processing mesh (DSPM) is part of an experimental system used to pursue a proof of concept for an advanced fault-tolerant communication strategy. The DSPM experiments incorporate sensors and effectors into an ultra-reliable nodal network in which a central bus controller performs algorithms to grow and maintain the network. The experiments demonstrate that DSPM is an achievable communication network that can sustain failures and continue to function properly. The results of the experiment give insights into the unique characteristics of the DSPM network and the network's capacity to limit physical damage propagation, limit damaged-data propagation, and to survive cyclic communication paths. This paper describes the concept, mechanization, and performance of the DSPM system in a real-time flight-critical environment.

Abbott, L. W.↗

Signal Processor for Multirate PSK Signals

Any of six different data formats at any of five different data rates from phase-shift-key (PSK) modulated input signal extracted by digital radio receiver. Subcarrier Demodulator is Costas loop with hard limiter in inphase arm. There are six low-pass filters, each selectable for rate and format of data to be processed.

Helgesen, R. J.↗

Convolver for Pipelined-Image Processor

3 x 3 convolver produces weighted sum of nine contiguous picture elements in square. Data processed through convolver at video scanning rate of current raster line. Two previous lines stored in external buffers (N-3)element delays. Specific choice of convolution weights determines whether convolver performs smoothing, spatial-frequency filtering, edge detection, or other forms of image processing.

Wilcox, B.↗

Function Generator for Image Processor

Basic elements of function generator are memory chips and interpolator chip, which incorporates multipliers and adders. Memory includes CMOS static random-access devices. 120 ns cycle time of devices allows real-time processing of image data.

Gennery, D. B.↗

Restricted access processor - An application of computer security technology

This paper describes a security guard device that is currently being developed by Computer Sciences Corporation (CSC). The methods used to provide assurance that the system meets its security requirements include the system architecture, a system security evaluation, and the application of formal and informal verification techniques. The combination of state-of-the-art technology and the incorporation of new verification procedures results in a demonstration of the feasibility of computer security technology for operational applications.

Mcmahon, E. M.↗

Video Processor for Transponder Pulses

Circuit detects interrogation signals from air-traffic-control station and determines whether transponder of airplane should respond. Circuit examines relative magnitudes of first two pulses in three-pulse sequence of interrogation signal. On basis of relative magnitudes, circuit decides whether main lobe of interrogating radar beam is received (response should be generated) or only side lobe received (and interrogation ignored). Circuit simple and inexpensive.

Byrne, F.↗

SCARE: A post-processor program to MSC/NASTRAN for the reliability analysis of structural ceramic components

A computer program was developed for calculating the statistical fast fracture reliability and failure probability of ceramic components. The program includes the two-parameter Weibull material fracture strength distribution model, using the principle of independent action for polyaxial stress states and Batdorf's shear-sensitive as well as shear-insensitive crack theories, all for volume distributed flaws in macroscopically isotropic solids. Both penny-shaped cracks and Griffith cracks are included in the Batdorf shear-sensitive crack response calculations, using Griffith's maximum tensile stress or critical coplanar strain energy release rate criteria to predict mixed mode fracture. Weibull material parameters can also be calculated from modulus of rupture bar tests, using the least squares method with known specimen geometry and fracture data. The reliability prediction analysis uses MSC/NASTRAN stress, temperature and volume output, obtained from the use of three-dimensional, quadratic, isoparametric, or axisymmetric finite elements. The statistical fast fracture theories employed, along with selected input and output formats and options, are summarized. An example problem to demonstrate various features of the program is included.

Gyekenyesi, J. P.↗

Error propagation in a digital avionic processor: A simulation-based study

An experimental analysis to study error propagation from the gate to the chip level is described. The target system is the CPU in the Bendix BDX-930, an avionic miniprocessor. Error activity data for the study was collected via a gate-level simulation. A family of distributions to characterize the error propagation, both within the chip and at the pins, was then generated. Based on these distributions, measures of error propagation and severity were defined. The analysis quantifies the dependency of the measured error propagation on the location of the fault and the type of instruction/microinstruction executed.

Lomelino, D.↗

Increasing processor utilization during parallel computation rundown

Some parallel processing environments provide for asynchronous execution and completion of general purpose parallel computations from a single computational phase. When all the computations from such a phase are complete, a new parallel computational phase is begun. Depending upon the granularity of the parallel computations to be performed, there may be a shortage of available work as a particular computational phase draws to a close (computational rundown). This can result in the waste of computing resources and the delay of the overall problem. In many practical instances, strict sequential ordering of phases of parallel computation is not totally required. In such cases, the beginning of one phase can be correctly computed before the end of a previous phase is completed. This allows additional work to be generated somewhat earlier to keep computing resources busy during each computational rundown. The conditions under which this can occur are identified and the frequency of occurrence of such overlapping in an actual parallel Navier-Stokes code is reported. A language construct is suggested and possible control strategies for the management of such computational phase overlapping are discussed.

Jones, W. H.↗

Resonant power processors. I - State plane analysis

State-plane techniques in conjunction with piecewise-linear analysis is employed to study the steady-state and transient characteristics of a series resonant converter. With the direct viewing of the resonant tank energy and the device switching instants, the state portrayal provides unique insights into the complex behavior of the converter. Operation of the converter under both continuous and discontinuous current modes and at frequencies both below and above resonant frequency are discussed.

Oruganti, R.↗

Resonant power processors. II - Methods of control

The nature of resonant converter control is discussed. Employing the state-portrait, different control methods for series resonant converter are identified and their performance evaluated based on their stability, response to control and load changes and range of operation. A new control method, optimal-trajectory control, is proposed which, by utilizing the state trajectories as control laws, continuously monitors the energy level of the resonant tank. The method is shown to have superior control properties especially under transient operation.

Oruganti, R.↗

Microcomputer-based programmable optical signal processor

A microcomputer-based real-time programmable optical signal processing system utilizing a magneto-optic spatial light modulator (MOSLM) and a liquid crystal light valve (LCLV) is described. This system can perform a myriad of complicated optical operations, such as image correlation, image subtraction, and matrix multiplication. Its important asserts are its programmability and the capability of real-time addressing. These are important for telerobotic vision in space automation applications. Design specifications and suggestions for practical implementation of the system are discussed. Some preliminary experimental demonstrations are conducted to demonstrate applications of the proposed system to image correlation for optical pattern recognition, image subtraction for lC chip inspection, and matrix multiplication for optical computing.

Yu, F. T. S.↗

Optical Interferometric Parallel Data Processor

Image data processed faster than in present electronic systems. Optical parallel-processing system effectively calculates two-dimensional Fourier transforms in time required by light to travel from plane 1 to plane 8. Coherence interferometer at plane 4 splits light into parts that form double image at plane 6 if projection screen placed there.

Breckinridge, J. B.↗

Baseband Processor for Communication Satellites

Baseband processing (BBP) system for advanced satellite communications successfully demonstrated. Provides increased data capacity through frequency-reusing multibeam antenna systems, using time-division multiple access (TDMA) and onboard satellite switching. Large numbers of thin-route trunking stations and user-based Earth terminals handled efficiently by satellite baseband switching. With BBP system, satellite routes data messages individually among locations anywhere in continental United States. Processes, controls, and routes message traffic among users. Time-division multiple access and baseband switching used.

Jirberg, Russell J.↗

Parallel processors and nonlinear structural dynamics algorithms and software

A nonlinear structural dynamics program with an element library that exploits parallel processing is under development. The aim is to exploit scheduling-allocation so that parallel processing and vectorization can effectively be treated in a general purpose program. As a byproduct an automatic scheme for assigning time steps was devised. A rudimentary form of the program is complete and has been tested; it shows substantial advantage can be taken of parallelism. In addition, a stability proof for the subcycling algorithm has been developed.

Belytschko, T.↗

The SIR-C ground data system: Digital processor, data products, information flow

The SIR-C (Shuttle Imaging Radar) instrument will collect both C-Band and L-Band data with each frequency band consisting of direct (HH or VV) and cross-polarized (HV or VH) data. Considering all possible combinations as many as eight different data channels will be available for any given target area. This data will be digitized and formatted on-board for direct downlink via the Tracking and Data Relay Satellite System (TDRSS), or it will be buffered through on-board high density digital recorders for storage or transmission when TDRSS is available. The data is received by the TDRSS ground station at White Sands and is nominally relayed via DOMSAT to the high data rate recording facility at GSFC. The tapes are then shipped to JPL for processing into imagery and eventual distribution to the SIR-C investigators.

Curlander, John C.↗