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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 91 records · Page 5
All sourcesNASA NTRSDOE OSTI
NASA NTRS1984

The 3SPACE digitizer: A new input device for solid geometry modeling

The 3SPACE Digitizer is a derivation of SPASYN, which is a patented magnetic transducing system offering an accurate method of calculating the location of one object relative to another. SPASYN uses low-frequency magnetic fields to measure both the position and orientation of its sensor relative to its transmitter. The 3SPACE Digitizer unit consists of a system's electronics unit, a model table, a stylus, and a keypad. In operation, the 3SPACE Digitizer determines the X, Y, Z coordinates of any point located on a low-conductive, three-dimensional model. This data, along with the orientation of the Digitizer's stylus, is immediately available for transmission to a host computer or graphics terminal. Digitization is effected by touching the point to be measured with the tip of a handheld stylus. The 3SPACE Digitizer presents new opportunities for interacting with computers in a large number of engineering and scientific applications. Developed from proven military technology, the 3SPACE Digitizer significantly simplifies three-dimensional digitization and overcomes many of the problems that once plagued such procedures. Its ability to digitize solid objects makes it a valuable new tool for computer-aided design and manufacturing.

Scully, J.↗
NASA NTRS1976

Two-dimensional radiant energy array computers and computing devices

Two dimensional digital computers and computer devices operate in parallel on rectangular arrays of digital radiant energy optical signal elements which are arranged in ordered rows and columns. Logic gate devices receive two input arrays and provide an output array having digital states dependent only on the digital states of the signal elements of the two input arrays at corresponding row and column positions. The logic devices include an array of photoconductors responsive to at least one of the input arrays for either selectively accelerating electrons to a phosphor output surface, applying potentials to an electroluminescent output layer, exciting an array of discrete radiant energy sources, or exciting a liquid crystal to influence crystal transparency or reflectivity.

Schaefer, D. H.↗
NASA NTRS1977

Angle-indicating digital servo

Device determines position of capacitive pickup relative to gravity-stabilized inductive element. Self nulling bridge with digital readout is faster and more accurate than electromechanical equivalent.

Parra, G. T.↗
DOE OSTI2025

Characterization of Peripheral Neurophotonic Systems for High-Performance Human-Computer Interfaces (CRADA Final Report)

As part of the Cyclotron Road program, Morphosis Inc. sought to investigate a non-invasive neuromuscular sensing approach for use as an intuitive and secure human–computer interface. These highly miniaturized, wearable neural interfaces were completely non-invasive and maintained stable, high-bandwidth, long-term access to a user’s actions, intent, and identity, while offering an exceptionally high signal-to-noise ratio compared to contemporary neural recording technologies. The widespread adoption of neural interfaces had the potential to reshape how people interact with technology, with profound societal impacts. Millions worldwide suffered from movement and/or speech disabilities, and these tools had the potential to democratize access to technology to enhance autonomy and quality of life. More broadly, interfaces capable of accurately conveying intentions and safeguarding identities could serve as a cornerstone for privacy, trust, and personal authenticity in digital environments. The use of thought-driven control of digitally enabled devices and governance of digital identities had the potential to revolutionize relationships with technology, transforming how people learn, communicate, and interact with the world.

42 ENGINEERING↗
DOE OSTI2023

Discrete offset dithered waveform averaging for high-fidelity digitization of repetitive signals

Methods and devices for digitizing an analog repetitive signal using waveform averaging are described. An example method includes generating a discrete set of analog dither offset voltages, wherein at least two of the discrete set of analog dither offset voltages are different from each other, receiving the analog repetitive signal comprising multiple instances of a waveform, wherein the waveform has a waveform duration, generate a timing alignment to align each waveform of the analog repetitive signal and the corresponding analog dither offset voltage over the waveform duration, combining, based on the timing alignment, each waveform and the corresponding analog dither offset voltage over the waveform duration to produce an analog output signal, converting the analog output signal to a digital output signal, and producing, based on the timing alignment, a digital averaged signal based on averaging the multiple instances of the waveform in the analog output signal.

Buckley, Brandon Walter↗
DOE OSTI2023

Continuous dithered waveform averaging for high-fidelity digitization of repetitive signals

Methods and devices for digitizing an analog repetitive signal using waveform averaging are described. An example method includes generating a time-varying dither signal, receiving the analog repetitive signal comprising multiple instances of a waveform, wherein each waveform has a waveform duration, wherein an average of the time-varying dither signal over multiple waveform durations is substantially zero, and wherein the time-varying dither signal varies over each waveform duration, generating a timing alignment, combining each waveform with the corresponding portion of the time-varying dither signal over each waveform duration to produce an analog output signal, converting the analog output signal to a digital output signal, and producing, based on the timing alignment, a digital averaged signal based on averaging the multiple instances of the waveform in the analog output signal, wherein the timing alignment is used to align the multiple instances of the waveform in the analog output signal.

Buckley, Brandon Walter↗
NASA NTRS2017

Rapid Optical Shutter, Chopper, Modulator and Deflector

An optical device with a light source and a detector is provided. A digital micromirror device positioned between the detector and the light source may deflect light beams projected from the light source. An aperture in front of the detector may block an incoming light beam from the detector when the incoming light beam is incident on the detector outside of a passable incident range and including an aperture opening configured to pass the incoming light beam to the detector when the incoming light beam is incident on the detector within a passable incident range. The digital micromirror device may rotate between a first position causing the light beam to pass through the aperture opening and a second position causing the light beam to be blocked by the aperture. The optical device may be configured to operate as a shutter, chopper, modulator and/or deflector.

Danehy, Paul M.↗
NASA NTRS1975

Highly stable analog-to-digital converter

Device has been developed for use in pulse-height analyzer of gamma-ray telescope. Unit shows integral linearity of 0.05 percent and differential linearity of less than 2 percent.

Lucas, C. H.↗
NASA NTRS1977

Time-division multiplexer uses digital gates

Device eliminates errors caused by analog gates in multiplexing a large number of channels at high frequency. System was designed for use in aerospace work to multiplex signals for monitoring such variables as fuel consumption, pressure, temperature, strain, and stress. Circuit may be useful in monitoring variables in process control and medicine as well.

Myers, C. E.↗
NASA NTRS2008

Logic Gates Made of N-Channel JFETs and Epitaxial Resistors

Prototype logic gates made of n-channel junction field-effect transistors (JFETs) and epitaxial resistors have been demonstrated, with a view toward eventual implementation of digital logic devices and systems in silicon carbide (SiC) integrated circuits (ICs). This development is intended to exploit the inherent ability of SiC electronic devices to function at temperatures from 300 to somewhat above 500 C and withstand large doses of ionizing radiation. SiC-based digital logic devices and systems could enable operation of sensors and robots in nuclear reactors, in jet engines, near hydrothermal vents, and in other environments that are so hot or radioactive as to cause conventional silicon electronic devices to fail. At present, current needs for digital processing at high temperatures exceed SiC integrated circuit production capabilities, which do not allow for highly integrated circuits. Only single to small number component production of depletion mode n-channel JFETs and epitaxial resistors on a single substrate is possible. As a consequence, the fine matching of components is impossible, resulting in rather large direct-current parameter distributions within a group of transistors typically spanning multiples of 5 to 10. Add to this the lack of p-channel devices to complement the n-channel FETs, the lack of precise dropping diodes, and the lack of enhancement mode devices at these elevated temperatures and the use of conventional direct coupled and buffered direct coupled logic gate design techniques is impossible. The presented logic gate design is tolerant of device parameter distributions and is not hampered by the lack of complementary devices or dropping diodes. In addition to n-channel JFETs, these gates include level-shifting and load resistors (see figure). Instead of relying on precise matching of parameters among individual JFETS, these designs rely on choosing the values of these resistors and of supply potentials so as to make the circuits perform the desired functions throughout the ranges over which the parameters of the JFETs are distributed. The supply rails V(sub dd) and V(sub ss) and the resistors R are chosen as functions of the distribution of direct-current operating parameters of the group of transistors used.

Krasowski, Michael J.↗
DOE OSTI2024

Benchmarking highly entangled states on a 60-atom analogue quantum simulator

Abstract Quantum systems have entered a competitive regime in which classical computers must make approximations to represent highly entangled quantum states 1,2 . However, in this beyond-classically-exact regime, fidelity comparisons between quantum and classical systems have so far been limited to digital quantum devices 2–5 , and it remains unsolved how to estimate the actual entanglement content of experiments 6 . Here, we perform fidelity benchmarking and mixed-state entanglement estimation with a 60-atom analogue Rydberg quantum simulator, reaching a high-entanglement entropy regime in which exact classical simulation becomes impractical. Our benchmarking protocol involves extrapolation from comparisons against an approximate classical algorithm, introduced here, with varying entanglement limits. We then develop and demonstrate an estimator of the experimental mixed-state entanglement 6 , finding our experiment is competitive with state-of-the-art digital quantum devices performing random circuit evolution 2–5 . Finally, we compare the experimental fidelity against that achieved by various approximate classical algorithms, and find that only the algorithm we introduce is able to keep pace with the experiment on the classical hardware we use. Our results enable a new model for evaluating the ability of both analogue and digital quantum devices to generate entanglement in the beyond-classically-exact regime, and highlight the evolving divide between quantum and classical systems.

Science & Technology - Other Topics↗
NASA NTRS2002

Implementation of Adaptive Digital Controllers on Programmable Logic Devices

Much has been made of the capabilities of Field Programmable Gate Arrays (FPGA's) in the hardware implementation of fast digital signal processing functions. Such capability also makes an FPGA a suitable platform for the digital implementation of closed loop controllers. Other researchers have implemented a variety of closed-loop digital controllers on FPGA's. Some of these controllers include the widely used Proportional-Integral-Derivative (PID) controller, state space controllers, neural network and fuzzy logic based controllers. There are myriad advantages to utilizing an FPGA for discrete-time control functions which include the capability for reconfiguration when SRAM- based FPGA's are employed, fast parallel implementation of multiple control loops and implementations that can meet space level radiation tolerance requirements in a compact form-factor. Generally, a software implementation on a Digital Signal Processor (DSP) device or microcontroller is used to implement digital controllers. At Marshall Space Flight Center, the Control Electronics Group has been studying adaptive discrete-time control of motor driven actuator systems using DSP devices. While small form factor, commercial DSP devices are now available with event capture, data conversion, Pulse Width Modulated (PWM) outputs and communication peripherals, these devices are not currently available in designs and packages which meet space level radiation requirements. In general, very few DSP devices are produced that are designed to meet any level of radiation tolerance or hardness. An alternative is required for compact implementation of such functionality to withstand the harsh environment encountered on spacemap. The goal of this effort is to create a fully digital, flight ready controller design that utilizes an FPGA for implementation of signal conditioning for control feedback signals, generation of commands to the controlled system, and hardware insertion of adaptive-control algorithm approaches. Radiation tolerant FPGA's are a feasible option for reaching this goal.

Gwaltney, David A.↗
NASA NTRS1998

Digital Mammography with a Mosaic of CCD Arrays

A digital mammography device uses a mosaic of electronic digital imaging arrays to scan an x-ray image is discussed. The mosaic of arrays is repositioned several times to expose different portions of the image, until the entire image is scanned. The data generated by the arrays during each exposure is stored in a computer. After the final exposure, the computer combines data of the several partial images to produce a composite of the original x-ray image. An aperture plate is used to reduce scatter and the overall exposure of the patient to x-rays.

Jalink, Antony, Jr.↗
NASA NTRS2002

Implementation of Adaptive Digital Controllers on Programmable Logic Devices

Much has been made of the capabilities of FPGA's (Field Programmable Gate Arrays) in the hardware implementation of fast digital signal processing (DSP) functions. Such capability also makes and FPGA a suitable platform for the digital implementation of closed loop controllers. There are myriad advantages to utilizing an FPGA for discrete-time control functions which include the capability for reconfiguration when SRAM- based FPGA's are employed, fast parallel implementation of multiple control loops and implementations that can meet space level radiation tolerance in a compact form-factor. Other researchers have presented the notion that a second order digital filter with proportional-integral-derivative (PID) control functionality can be implemented in an FPGA. At Marshall Space Flight Center, the Control Electronics Group has been studying adaptive discrete-time control of motor driven actuator systems using digital signal processor (DSF) devices. Our goal is to create a fully digital, flight ready controller design that utilizes an FPGA for implementation of signal conditioning for control feedback signals, generation of commands to the controlled system, and hardware insertion of adaptive control algorithm approaches. While small form factor, commercial DSP devices are now available with event capture, data conversion, pulse width modulated outputs and communication peripherals, these devices are not currently available in designs and packages which meet space level radiation requirements. Meeting our goals requires alternative compact implementation of such functionality to withstand the harsh environment encountered on spacecraft. Radiation tolerant FPGA's are a feasible option for reaching these goals.

Gwaltney, David A.↗