The Application of High Density Electronic Packaging for Spacecraft Cost and Mass Reduction
Explore the source record for details and available documents.
spacecraft electyronic systems system performance ↗
SEARCH · Search NASA
Results for “Electronics Packaging”
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.
Reliability assessment of advanced flip-chip interconnect electronic package assemblies under extreme cold temperatures (-190 degrees C and -120 degrees C)
Explore the source record for details and available documents.
extreme temperatures↗
Deep Impact Delta II Launch Vehicle Cracked Thick Film Coating on Electronic Packages Technical Consultation Report
The Deep Impact spacecraft was launched on a Boeing Delta II rocket from Cape Canaveral Air Force Station (CCAFS) on January 12, 2005. Prior to the launch, the Director of the Office of Safety and Mission Assurance (OS&MA) requested the NASA Engineering and Safety Center (NESC) lead a team to render an independent opinion on the rationale for flight and the risk code assignments for the hazard of cracked Thick Film Assemblies (TFAs) in the E-packages of the Delta II launch vehicle for the Deep Impact Mission. The results of the evaluation are contained in this report.
Cameron, Kenneth D.↗
New Millennium DS-2 Electronic Packaging Smaller, Faster with Managed Risk
New Millennium DS-2 is the second project of the New Millennium Program series, managed by the Jet Propulsion Laboratory (JPL). The project consists of a pair of probes, that will be carried by the Mars '98 spacecraft.
New↗
Electrical and Dielectric Characterizations of HTCC Electronic Packages for High Temperature Harsh Environment Applications
A prototype high temperature co-fired ceramic (HTCC) alumina packaging system composed of a 32-I/Os package and a compatible circuit board was previously developed and demonstrated for long term operation in 500 °C environments. The electrical / dielectric parasitic parameters of that chip level package were characterized and reported. This co-fired packaging system with platinum (Pt) conductor has successfully facilitated tests of silicon carbide (SiC) analog and digital integrated circuits (ICs) developed at NASA GRC at 500°C for up to 10,000 hours in ambient oven environment and 60 earth days in Venus surface environment with simulated temperature, pressure, and chemical constituents. Based on these previous results, this paper introduces new designs of Pt-HTCC packages with 16, 24, and 44 I/Os for packaging a new generation SiC ICs with 8, 24, 56, 62, and 72 I/Os to be tested in high temperature harsh environments. The package with 44 I/Os is specifically designed for the new SiC ICs with 56, 62, and 72-I/Os and electrical connection needs, the power pads of this package are consolidated, and an array of I/O pads distributed on separated vertical levels (inside the package) is used to control the overall package dimensions and mitigate the parasitic effects at high temperatures. This paper will present the detailed design of these chip-level packages and results of electrical and dielectric characterization of these newly fabricated chip-level Pt-HTCC packages.
High temperature↗
Electrical and Dielectric Characterizations of HTCC Electronic Packages for High Temperature Harsh Environment Applications
A prototype high temperature co-fired ceramic (HTCC) alumina packaging system composed of a 32-I/Os package and a compatible circuit board was previously developed and demonstrated for long term operation in 500 °C environments. The electrical / dielectric parasitic parameters of that chip level package were characterized and reported. This co-fired packaging system with platinum (Pt) conductor has successfully facilitated tests of silicon carbide (SiC) analog and digital integrated circuits (ICs) developed at NASA GRC at 500°C for up to 10,000 hours in ambient oven environment and 60 earth days in Venus surface environment with simulated temperature, pressure, and chemical constituents. Based on these previous results, this paper introduces new designs of Pt-HTCC packages with 16, 24, and 44 I/Os for packaging a new generation SiC ICs with 8, 24, 56, 62, and 72 I/Os to be tested in high temperature harsh environments. The package with 44 I/Os is specifically designed for the new SiC ICs with 56, 62, and 72-I/Os and electrical connection needs, the power pads of this package are consolidated, and an array of I/O pads distributed on separated vertical levels (inside the package) is used to control the overall package dimensions and mitigate the parasitic effects at high temperatures. This paper will present the detailed design of these chip-level packages and results of electrical and dielectric characterization of these newly fabricated chip-level Pt-HTCC packages.
High temperature↗
1st NASA Electronic Parts Packaging (NEPP) Program Electronic Technology Workshop (ETW)
NEPP supports all of NASA for >20 years - 7 NASA Centers and JPL actively participate The NEPP Program focuses on the reliability aspects of electronic devices - Three prime technical areas: Parts (die), Packaging, and Radiation Alternately, reliability may be viewed as: -
LaBel, Kenneth A.↗
Packaging and Embedded Electronics for the Next Generation
This viewgraph presentation describes examples of electronic packaging that protects an electronic element from handling, contamination, shock, vibration and light penetration. The use of Hermetic and non-hermetic packaging is also discussed. The topics include: 1) What is Electronic Packaging? 2) Why Package Electronic Parts? 3) Evolution of Packaging; 4) General Packaging Discussion; 5) Advanced non-hermetic packages; 6) Discussion of Hermeticity; 7) The Class Y Concept and Possible Extensions; 8) Embedded Technologies; and 9) NEPP Activities.
Sampson, Michael J.↗
AIN-Based Packaging for SiC High-Temperature Electronics
Packaging made primarily of aluminum nitride has been developed to enclose silicon carbide-based integrated circuits (ICs), including circuits containing SiC-based power diodes, that are capable of operation under conditions more severe than can be withstood by silicon-based integrated circuits. A major objective of this development was to enable packaged SiC electronic circuits to operate continuously at temperatures up to 500 C. AlN-packaged SiC electronic circuits have commercial potential for incorporation into high-power electronic equipment and into sensors that must withstand high temperatures and/or high pressures in diverse applications that include exploration in outer space, well logging, and monitoring of nuclear power systems. This packaging embodies concepts drawn from flip-chip packaging of silicon-based integrated circuits. One or more SiC-based circuit chips are mounted on an aluminum nitride package substrate or sandwiched between two such substrates. Intimate electrical connections between metal conductors on the chip(s) and the metal conductors on external circuits are made by direct bonding to interconnections on the package substrate(s) and/or by use of holes through the package substrate(s). This approach eliminates the need for wire bonds, which have been the most vulnerable links in conventional electronic circuitry in hostile environments. Moreover, the elimination of wire bonds makes it possible to pack chips more densely than was previously possible.
Savrun, Ender↗
Qualification and Reliability for MEMS and IC Packages
Advanced IC electronic packages are moving toward miniaturization from two key different approaches, front and back-end processes, each with their own challenges. Successful use of more of the back-end process front-end, e.g. microelectromechanical systems (MEMS) Wafer Level Package (WLP), enable reducing size and cost. Use of direct flip chip die is the most efficient approach if and when the issues of know good die and board/assembly are resolved. Wafer level package solve the issue of known good die by enabling package test, but it has its own limitation, e.g., the I/O limitation, additional cost, and reliability. From the back-end approach, system-in-a-package (SIAP/SIP) development is a response to an increasing demand for package and die integration of different functions into one unit to reduce size and cost and improve functionality. MEMS add another challenging dimension to electronic packaging since they include moving mechanical elements. Conventional qualification and reliability need to be modified and expanded in most cases in order to detect new unknown failures. This paper will review four standards that already released or being developed that specifically address the issues on qualification and reliability of assembled packages. Exposures to thermal cycles, monotonic bend test, mechanical shock and drop are covered in these specifications. Finally, mechanical and thermal cycle qualification data generated for MEMS accelerometer will be presented. The MEMS was an element of an inertial measurement unit (IMU) qualified for NASA Mars Exploration Rovers (MERs), Spirit and Opportunity that successfully is currently roaring the Martian surface
inertial measurement unit↗
Motor/Generator and Inverter Characterization for Flywheel System Applications
The Advanced Electrical Systems Development Branch at NASA Glenn Research Center (GRC) has been involved in the research and development of high speed flywheels systems for satellite energy storage and attitude applications. These flywheels will serve as replacement for chemical nickel hydrogen, nickel cadmium batteries and gyroscopic wheels. The advantages of using flywheel systems for energy storage on satellites are high energy density, high power density, long life, deep depth of discharge, and broad operating temperature ranges. A flywheel system for space applications consist of a number of flywheel modules, the motor/generator and magnetic bearing, and an electronics package. The motor/generator electronics package includes a pulse-width modulated inverter that drives the flywheel permanent magnet motor/generator located at one end of the shaft. This summer, I worked under the direct supervision of my mentor, Walter Santiago, and the goal for this summer was to characterize motor generator and inverter attributes in order to increase their viability as a more efficient energy storage source for space applications. To achieve this goal, magnetic field measurements around the motor/generator permanent magnet and the impedance of the motor/generator three phase windings were characterized, and a recreation of the inverter pulse width modulated control system was constructed. The Flywheel modules for space use are designed to maximize energy density and minimize loss, and attaining these values will aid in locating and reducing losses within the flywheel system as a whole, making flywheel technology more attractive for use as energy storage in future space applications.
Tamarcus, Jeffries L.↗
High-throughput electronic structure package
We introduce HTESP (High-Throughput Electronic Structure Package), an automated tool designed for high-throughput ab initio calculations. HTESP simplifies the entire workflow, including data extraction, input files generation, calculation submission, result collection, and plotting. The package is implemented in Python and Bash languages. In this paper, we provide detailed information about the package, its installation process and some illustrative examples to demonstrate its usage. Additionally, the package includes comprehensive online documentation on input parameters and tutorials to assist users.
Nepal, NirajK↗
The State of NEPP NASA Electronic Parts & Packaging Program
The presentation is about the NASA Electronic Parts & Packaging (NEPP) Program. The mission statement of NEPP, “Provide NASA’s leadership for developing and maintaining guidance for the screening, qualification, test, and reliable use of EEE parts by NASA, in collaboration with other government agencies and industry” is dissected and explained using examples.
manufacturing↗
Packaging of electronic modules
Study of design approaches that are taken toward optimizing the packaging of electronic modules with respect to size, shape, component orientation, interconnections, and structural support. The study does not present a solution to specific packaging problems, but rather the factors to be considered to achieve optimum packaging designs.
Katzin, L.↗
GPAW: An open Python package for electronic structure calculations
We review the GPAW open-source Python package for electronic structure calculations. GPAW is based on the projector-augmented wave method and can solve the self-consistent density functional theory (DFT) equations using three different wave-function representations, namely real-space grids, plane waves, and numerical atomic orbitals. The three representations are complementary and mutually independent and can be connected by transformations via the real-space grid. This multi-basis feature renders GPAW highly versatile and unique among similar codes. By virtue of its modular structure, the GPAW code constitutes an ideal platform for the implementation of new features and methodologies. Moreover, it is well integrated with the Atomic Simulation Environment (ASE), providing a flexible and dynamic user interface. In addition to ground-state DFT calculations, GPAW supports many-body GW band structures, optical excitations from the Bethe–Salpeter Equation, variational calculations of excited states in molecules and solids via direct optimization, and real-time propagation of the Kohn–Sham equations within time-dependent DFT. A range of more advanced methods to describe magnetic excitations and non-collinear magnetism in solids are also now available. In addition, GPAW can calculate non-linear optical tensors of solids, charged crystal point defects, and much more. Recently, support for graphics processing unit (GPU) acceleration has been achieved with minor modifications to the GPAW code thanks to the CuPy library. We end the review with an outlook, describing some future plans for GPAW.
37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
Custom electronic subsystems for the laboratory telerobotic manipulator
The National Aeronautics and Space Administration (NASA) Space Station Program presents new opportunities for the application of telerobotic and robotic systems. The Laboratory Telerobotic Manipulator (LTM) is a highly advanced 7 degrees-of-freedom (DOF) telerobotic/robotic manipulator. It was developed and built for the Automation Technology Branch at NASA's Langley Research Center (LaRC) for work in research and to demonstrate ground-based telerobotic manipulator system hardware and software systems for future NASA applications in the hazardous environment of space. The LTM manipulator uses an embedded wiring design with all electronics, motor power, and control and communication cables passing through the pitch-yaw differential joints. This design requires the number of cables passing through the pitch/yaw joint to be kept to a minimum. To eliminate the cables needed to carry each pitch-yaw joint's sensor data to the VME control computers, a custom-embedded electronics package for each manipulator joint was developed. The electronics package collects and sends the joint's sensor data to the VME control computers over a fiber optic cable. The electronics package consist of five individual subsystems: the VME Link Processor, the Joint Processor and the Joint Processor power supply in the joint module, the fiber optics communications system, and the electronics and motor power cabling.
Glassell, R. L.↗
NASA Electronic Parts and Packaging (NEPP) Program 2024 Electronics Technology Workshop (ETW): Government Working Group (GWG) Update
Explore the source record for details and available documents.
Electronics parts and packaging↗