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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 91 records · Page 5
All sourcesNASA NTRSDOE OSTI
NASA NTRSDate not supplied

Logical Shadow Tomography: Efficient Estimation of Error-mitigated Observables

In near-term quantum applications, reducing errors and improving device reliability is an essential task. Towards these ends, various techniques have been introduced in recent literature, collectively referred to as quantum error mitigation techniques, for reducing errors in pre-fault-tolerant devices. Here, we introduce logical shadow tomography as a versatile error mitigation method. Our technique uses a stabilizer code to encode information in a logical state. Instead of doing active error correction, quantum states will be measured at the end of computation via shadow tomography and non-logical errors are projected out in the classical post-processing. Relative to quantum subspace expansion which requires O(2(M-1)L) experiments to estimate an logical Pauli observable encoded by an [[M, L, d]] code, our technique only requires 2L experiments, an important practical reduction in resources.

Hong-Ye Hu↗
NASA NTRSDate not supplied

A Temporal Differential Dynamic Logic Formal Embedding

Differential dynamic logic is a formal framework to specify and reason about hybrid programs (HPs). The core of dL is a proof calculus that contains a collection of axioms and rules for the rigorous verification of properties of HPs. Recently, dL has been embedded within the theorem prover Prototype Verification System (PVS) resulting in the tool Plaidypvs2. The integration of dL into PVS expands its expressive power; user defined functions, such as trigonometric and other transcendental functions, can be used inside the dL framework, and meta-reasoning about HPs can be performed, including reasoning about entire classes of HPs, specified using dependent types in PVS. The differential temporal dynamic logic (dTL2) extends dL with temporal logic operators to reason about all the states reachable during the execution of an HP. This paper presents a work in progress focusing on embedding dTL2 in PVS as an extension of Plaidypvs. Plaidypvs is expanded with the formalization of a trace semantics for HPs, the definition of the LTL temporal operators eventually and globally, and the implementation of the proof calculus for dTL2. This new embedding has the same capabilties as Plaidypvs, which allows user defined functions and meta-reasoning of properties of HPs. To the best of the authors’ knowledge this is the first implementation of dTL2.

differential dynamic logic↗
NASA NTRS2017

A Fuzzy Logic Approach for Separation Assurance and Collision Avoidance for Unmanned Aerial Systems

In the coming years, operations in low altitude airspace will vastly increase as the capabilities and applications of small Unmanned Aerial Systems (sUAS) continue to multiply. Therefore, solutions to managing sUAS in highly congested airspace must be explored. In this study, a Fuzzy Logic based approach was used to help mitigate the risk of collisions between aircraft using separation assurance and collision avoidance techniques. The system was evaluated for its effectiveness to mitigate the risk of mid-air collisions between aircraft. This system utilizes only current state information and can resolve potential conflicts without knowledge of intruder intent. The avoidance logic was verified using formal methods and shown to select the correct action in all instances. Additionally, the Fuzzy Logic Controllers were shown to always turn the vehicles in the correct direction. Numerical testing demonstrated that the avoidance system was able to prevent a mid-air collision between two sUAS in all tested cases. Simulations were also performed in a three-dimensional environment with a heterogenous fleet of sUAS performing a variety of realistic missions. Simulations showed that the system was 99.98 effective at preventing mid-air collisions when separation assurance was disabled (unmitigated case) and 100 effective when enabled (mitigated case).

Verification & Validation of a Fuzzy Logic Control↗
DOE OSTI2025

Automated Programmable Logic Controller Memory Forensics Using RGB Image Analysis and Deep Learning

The introduction of Industry 4.0 and Internet-based technologies has enhanced industrial control system operations but have inadvertently increased their vulnerabilities to cyber attacks. When an industrial control system is compromised, security analysts need to identify the root cause quickly to start the recovery process and develop mitigation strategies. Memory forensics is critical in the incident analysis process to ascertain what occurred. Approaches for analyzing the persistent memory in industrial control devices are limited and almost nonexistent for volatile memory. This chapter proposes an automated methodology for programmable logic controller memory dump analysis using computer vision and deep learning techniques. The methodology converts the sequences of bytes in a programmable logic controller memory dump to red-green-blue pixels and employs a deep learning model that learns the underlying patterns and features of pre-labeled forensic artifacts in images and segments them into distinct regions. The trained model is employed to automatically segment new memory images and identify forensic artifacts. Evaluation of the methodology on a Schneider Electric Modicon M221 programmable logic controller under code injection and code modification attacks demonstrates its ability to detect attack artifacts in memory dumps.

Asmar Awad, Rima [ORNL] (ORCID:0000000233407742)↗
DOE OSTI2025

UltraLiM: In-Memory Boolean Logic Architecture Using UltraRAM

Conventional computing architectures encounter ‘von Neumann’ and ‘memory wall’ bottlenecks which arise due to the back-and-forth data movement between the physically separate memory and processing units and the speed mismatch between them, respectively. These bottlenecks hurt both energy efficiency and the throughput of computing systems. To address these challenges, in-memory computing architectures have emerged as a promising alternative. They reduce the need for frequent data movement by executing different computing tasks inside the memory system. Here, we present UltraLiM, a logic-in-memory architecture using the UltraRAM-based memory system. UltraRAM holds the promise of developing a ‘universal memory’, overcoming the limitations of charge-based memories thanks to their non-volatile behavior with lower operating voltage. This work presents an in-memory computing architecture that integrates an UltraRAM-based memory array with a custom-designed peripheral circuitry. With this architecture, we can perform various in-memory Boolean logic operations (such as NOT, NAND, NOR, and XOR) in a single cycle. Leveraging the separate read-write paths in the UltraRAM-based memory array, we optimize read operations without encountering design conflicts. This optimization enhances the sense margin, enabling the use of simpler peripheral circuitry for in-memory logic operations.

Alam, Shamiul [University of Tennessee, Knoxville ↗
DOE OSTI2025

Enhancing EV Motor Design Through Knowledge-Based AI and Hierarchical Fuzzy Logic Model

This work presents a novel approach to optimizing electric vehicle motor design through the integration of Knowledge-Based Artificial Intelligence (KB-AI) and Hierarchical Fuzzy Logic. Traditional motor design processes are time-intensive, relying heavily on iterative simulations and domain-specific expertise. These processes are further complicated by the nonlinear relationships between key design parameters. The proposed framework addresses these challenges by systematically encoding expert knowledge from scientific literature into a fuzzy logic system, allowing for the efficient handling of complex design variables. The hierarchical fuzzy logic model reduces computational complexity by decomposing the nonlinear relationships into manageable rule sets while maintaining design accuracy. The proposed methodology was applied to the design of a 100 kW motor, yielding optimal values for key parameters. This resulted in a compact motor design with a volume of 2.2 liters, showcasing the framework’s ability to deliver high-performance, application-specific motor configurations.

Kumar, Praveen [ORNL] (ORCID:0000000291877857)↗
DOE OSTI2025

Rapid Inference of Logic Gate Neural Networks for Anomaly Detection in High Energy Physics

The increasing data rates and complexity of detectors at the Large Hadron Collider (LHC) necessitate fast and efficient machine learning models, particularly for rapid selection of what data to store, known as triggering. Building on recent work in differentiable logic gates, we present a public implementation of a Convolutional Differentiable Logic Gate Neural Network (CLGN). We apply this to detecting anomalies at the Level-1 Trigger at CMS using public data from the CICADA project. We demonstrate that the CLGN achieves physics performance on par with or superior to conventional quantized neural networks. We also synthesize an LGN for a Field-Programmable Gate Array (FPGA) and show highly promising FPGA characteristics, notably zero Digital Signal Processor (DSP) resource usage. This work highlights the potential of logic gate networks for high-speed, on-detector inference in High Energy Physics and beyond.

FOS: Physical sciences↗
NASA NTRS1966

Logic system aids in evaluation of project readiness

Measurement Operational Readiness Requirements /MORR/ assignments logic is used for determining the readiness of a complex project to go forward as planned. The system used logic network which assigns qualities to all important criteria in a project and establishes a logical sequence of measurements to determine what the conditions are.

Maris, S. J.↗
NASA NTRS1971

DALG: A program for test pattern generation in combinational logical circuits

A user's manual for a computer program DALG which generates test patterns for detecting faults in combinational logic circuits containing up to 200 logical gates is presented. The gates may be of logical types AND, OR, NAND, NOR, NOT, or Exclusive OR is presented. The faults may be any one gate or input struck at a fixed value (0 or 1). In addition to test pattern generation DALG will also determine whether or not the given test pattern will detect given faults in a circuit. Sample problems are given along with input data sheets and printed output to illustrate the capabilities of the program.

Source record↗
NASA NTRS1972

The NAS-PAK Logic System

The design and fabrication of telemetry ground data processing equipment using commercial logic cards or modules are discussed. A microelectronics program was initiated to evaluate circuitry, packaging methods, and fabrication approaches necessary to produce a competitively procured logic system. The NAS-PAK logic system covering all phases of implementation is considered.

Billingsley, J.↗
NASA NTRS1973

Logical-function generator

Apparatus and technique for generating logical functions and circuits have been developed. They provide aid in designing and constructing hardware to generate logic circuits, by defining circuit connections required to generate these functions. With this method, it is possible quickly and automatically to design logic, while eliminating involved and time-consuming mathematical manipulations.

Sivertson, W. E., Jr.↗
NASA NTRS1972

Digital Holographic Logic

The characteristics of the holographic logic computer are discussed. The holographic operation is reviewed from the Fourier transform viewpoint, and the formation of holograms for use in performing digital logic are described. The operation of the computer with an experiment in which the binary identity function is calculated is discussed along with devices for achieving real-time performance. An application in pattern recognition using neighborhood logic is presented.

Preston, K., Jr.↗
NASA NTRS1974

Computerized logic design of digital circuits

Procedure performs all work required for logic design of digital counters or sequential circuits and simplification of Boolean expressions. Program provides simple, accurate, and comprehensive logic design capability to users both experienced and totally inexperienced in logic design

Gussow, S.↗
NASA NTRS1975

An adaptive maneuvering logic computer program for the simulation of one-on-one air-to-air combat. Volume 1: General description

A technique for computer simulation of air combat is described. Volume 1 decribes the computer program and its development in general terms. Two versions of the program exist. Both incorporate a logic for selecting and executing air combat maneuvers with performance models of specific fighter aircraft. In the batch processing version the flight paths of two aircraft engaged in interactive aerial combat and controlled by the same logic are computed. The realtime version permits human pilots to fly air-to-air combat against the adaptive maneuvering logic (AML) in Langley Differential Maneuvering Simulator (DMS). Volume 2 consists of a detailed description of the computer programs.

Burgin, G. H.↗
NASA NTRS1977

Control logic to track the outputs of a command generator or randomly forced target

A procedure is presented for synthesizing time-invariant control logic to cause the outputs of a linear plant to track the outputs of an unforced (or randomly forced) linear dynamic system. The control logic uses feed-forward of the reference system state variables and feedback of the plant state variables. The feed-forward gains are obtained from the solution of a linear algebraic matrix equation of the Liapunov type. The feedback gains are the usual regulator gains, determined to stabilize (or augment the stability of) the plant, possibly including integral control. The method is applied here to the design of control logic for a second-order servomechanism to follow a linearly increasing (ramp) signal, an unstable third-order system with two controls to track two separate ramp signals, and a sixth-order system with two controls to track a constant signal and an exponentially decreasing signal (aircraft landing-flare or glide-slope-capture with constant velocity).

Trankle, T. L.↗
NASA NTRS1985

Optical Logic Gates

Logic gates for light signals constructed from combinations of prisms, polarizing plates, and quarterwave plates. Optical logic gate performs elementary logic operation on light signals received along two optical fibers. Whether gate performs OR function or exclusive-OR function depends on orientation of analyzer. Nonbinary truth tables also obtained by rotating polarizer or analyzer to other positions or inserting other quarter-wave plates.

Du Fresne, E. R.↗
NASA NTRS1984

An adaptive guidance logic for an aeroasisted orbital transfer vehicle

The Orbital Transfer Vehicle (OTV) is to be employed for the delivery of a paylod to a high earth orbit, such as a geosynchronous orbit. Subsequently, the OTV is to return to a low earth parking orbit. The present investigation is concerned with an aeroassisted OTV (AOTV) which achieves the required reduction in velocity on its return to the parking orbit through aerodynamic braking. An adaptive guidance logic is employed to control and AOTV as it passes through the earth's upper atmosphere. Attention is given to details regarding the adaptive guidance logic, and a performance evaluation. It is found that the performance of the adaptive guidance logic is satisfactory for the considered conditions.

Hill, O.↗