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This viewgraph information provides information on how the NASA Electronic Parts and Packaging (NEPP) Program evaluates the reliability of technologies for Electrical, Electronic, and Electromechanical (EEE) parts, and their suitability for spacecraft applications.
NASA policy and procedures are established which govern the selection, testing, and application of electrical, electronic, and electromechanical (EEE) parts. Recent advances in the state-of-the-art of electronic parts and associated technologies can significantly impact the electronic designs and reliability of NASA space transportation avionics. Significant issues that result from these advances are examined, including: recent advances in microelectronics technology (as applied to or considered for use in NASA projects); electron packaging technology advances (concurrent with, and as a result of, the development of the advanced microelectronic devices); availability of parts used in space avionics; and standardization and integration of parts activities between projects, centers, and contractors.
Modern space field programmable gate array (FPGA) devices with increased functional density and operational frequency, such as Xilinx Virtex 4 (V4) and S (V5), are packaged in non-hermetic ceramic flip chip forms. These next generation space parts were not qualified to the MIL-PRF-38535 Qualified Manufacturer Listing (QML) class-V when they were released because class-V was only intended for hermetic parts. In order to bring Xilinx V5 type packages into the QML system, it was suggested that class-Y be set up as a new category. From 2010 through 2014, a JEDEC G12 task group developed screening and qualification requirements for Class-Y products. The Document Standardization Division of the Defense Logistics Agency (DLA) has completed an engineering practice study. In parallel with the class-Y efforts, the NASA Electronic Parts and Packaging (NEPP) program has funded JPL to study potential reliability issues of the class-Y products. The major hurdle of this task was the absence of adequate research samples. Figure 1-1 shows schematic diagrams of typical structures of class-Y type products. Typically, class-Y products are either in ceramic flip chip column grid array (CGA) or land grid array (LGA) form. In class-Y packages, underfill and heat spread adhesive materials are directly exposed to the spacecraft environment due to their non-hermeticity. One of the concerns originally raised was that the underfill material could degrade due to the spacecraft environment and negatively impact the reliability of the package. In order to study such issues, it was necessary to use ceramic daisy chain flip chip package samples so that continuity of flip chip solder bumps could be monitored during the reliability tests. However, none of the commercially available class-Y daisy chain parts had electrical connections through flip chip solder bumps; only solder columns were daisy chained, which made it impossible to test continuity of flip chip solder bumps without using extremely costly functional parts. Among space parts manufacturers who were interested in producing class-Y products, Aeroflex Microelectronic Solutions-HiRel had been developing assembly processes using their internal R&D classy type samples. In early 2012, JPL and Aeroflex initiated a collaboration to study reliability of the Aeroflex technology as a class-Y demonstrator.
The laser has proven its worth in numerous high reliability electronic packaging applications ranging from medical to missile electronics. In particular, the pulsed YAG laser is an extremely flexible and versatile too] capable of hermetically sealing microelectronics packages containing sensitive components without damaging them. This paper presents an overview of details that must be considered for successful use of laser welding when addressing electronic package sealing. These include; metallurgical considerations such as alloy and plating selection, weld joint configuration, design of optics, use of protective gases and control of thermal distortions. The primary limitations on use of laser welding electronic for packaging applications are economic ones. The laser itself is a relatively costly device when compared to competing welding equipment. Further, the cost of consumables and repairs can be significant. These facts have relegated laser welding to use only where it presents a distinct quality or reliability advantages over other techniques of electronic package sealing. Because of the unique noncontact and low heat inputs characteristics of laser welding, it is an ideal candidate for sealing electronic packages containing MEMS devices (microelectromechanical systems). This paper addresses how the unique advantages of the pulsed YAG laser can be used to simplify MEMS packaging and deliver a product of improved quality.
Those factors affecting the cost of electronic subsystems utilizing LSI microcircuits were determined and the most efficient methods for low cost packaging of LSI devices as a function of density and reliability were developed.
In order to meet NASA's requirements for the rapid development and validation of future generation electronic devices as well as associated materials and processes, enabling technologies are being developed at NASA-Ames Research Center using a multi-discipline approach. The first step is to understand the basic physics of the chemical reactions in the area of plasma reactors and processes. Low pressure glow discharges are indispensable in the fabrication of microelectronic circuits. These plasmas are used to deposit materials and also etch fine features in device fabrication. However, many plasma-based processes suffer from stability and reliability problems leading to a compromise in performance and a potentially increased cost for the semiconductor manufacturing industry. Although a great deal of laboratory-scale research has been performed on many of these processing plasmas, little is known about the gas-phase and surface chemical reactions that are critical in many etch and deposition processes, and how these reactions are influenced by the variation in operating conditions. Such a lack of understanding has hindered the development of process models that can aid in the scaling and improvement of plasma etch and deposition systems. Our present research involves the study of such plasmas. An inductively-coupled plasma (ICP) source in place of the standard upper electrode assembly of the Gaseous Electronics Conference (GEC) radio-frequency (RF) Reference Cell is used to investigate the discharge characteristics. This ICP source generates plasmas with higher electron densities and lower operating pressures than obtainable with the original parallel-plate version of the GEC Cell. This expanded operating regime is more relevant to new generations of industrial plasma systems being used by the microelectronics industry. The research goal is to develop an understanding of the physical phenomena involved in plasma processing and to measure much needed fundamental parameters, such as gas phase and surface reaction rates, species concentration, temperature, ion energy distribution, and electron number density.
This paper presents data that has been generated within NASA, especially the Marshall Space Flight Center, concerning several failure mechanisms that have occurred with microelectronic packages. The types of packages that will be discussed are primarily flat packs with 14-24 exit leads that are composed of Kovar electro-deposited nickel and finally gold plated.
Technology for interconnecting monolithic integrated circuit chips with other components is investigated. The advantages and disadvantages of the current flip-chip approach as compared to other interconnection methods are outlined. A fluxless solder-bump contact technology is evaluated. Multiple solder-bump contacts were formed on silicon integrated circuit chips. The solder-bumps, comprised of a rigid nickel under layer and a compliant solder overlayer, were electroformed onto gold device pads with the aid of thick dry film photomasks. Different solder alloys and the use of conductive epoxy for bonding were explored. Fluxless solder-bump bond quality and reliability were evaluated by measuring the effects of centrifuge, thermal cycling, and high temperature storage on bond visual characteristics, bond electrical continuity, and bond shear tests. The applicability and suitability of this technology for hybrid microelectronic packaging is discussed.
In this paper we provide a snapshot of the commericial industry trends and how they may impact electronics in the aerospace environment. Impacts will be felt in the areas of: reliability, assembly methods, cost drivers, supply chain selection and alternate materials selection.
Radiation Effects Group investigates the effects of space radiation on present and future microelectronic and optoelectronic technologies, evaluate the risk of using them in specific space missions, and recommend component and design techniques for JPL and NASA programs to reduce reliability risk from space radiation.
Spacecraft must survive and operate reliably in the space environment for long periods of time. Radiation, temperature variations, spacecraft charging, surface contamination, and micrometeoroids/space debris all present environmental challenges to spacecraft missions. The environmental issues associated with these effects require in-situ space experiments to properly quantify the environment and its effects. To obtain data on specific microelectronic and sensor systems in the space environment, several engineering experiments were developed for the Clementine spacecraft and the Clementine lunar transfer booster or Interstage Adapter Satellite (ISAS). These platforms allowed testing of advanced spacecraft microelectronic and sensor devices in a lunar transfer orbit that intersects Earth's radiation belts and debris environment and in interplanetary space where direct exposure to solar flares, Galactic Cosmic Rays, and micrometeoroids was possible. A suite of experiments was developed by the Naval Research Laboratory (NRL), the Jet Propulsion Laboratory (JPL), NASA Langley Research Center (LaRC), the Aerospace Corporation, and NASA Goddard Space Flight Center (GSFC) to investigate in detail specific radiation and environmental reliability issues. This paper presents an introduction to the issues being investigated, the instruments provided for the mission, and the rationale for the engineering program.
With the advent of high-strength composite materials and microelectronics, flywheels are becoming attractive as a means of storing electrical energy. In addition to the high energy density that flywheels provide, other advantages over conventional electrochemical batteries include long life, high reliability, high efficiency, greater operational flexibility, and higher depths of discharge. High pulse energy is another capability that flywheels can provide. These attributes are favorable for satellites as well as terrestrial energy storage applications. In addition to energy storage for satellites, the several flywheels operating concurrently can provide attitude control, thus combine two functions into one system. This translates into significant weight savings. The NASA Glenn Research Center is involved in the development of this technology for space and terrestrial applications. Glenn is well suited for this research because of its world-class expertise in power electronics design, rotor dynamics, composite material research, magnetic bearings, and motor design and control. Several Glenn organizations are working together on this program. The Structural Mechanics and Dynamics Branch is providing magnetic bearing, controls, and mechanical engineering skills. It is working with the Electrical Systems Development Branch, which has expertise in motors and generators, controls, and avionics systems. Facility support is being provided by the Space Electronic Test Engineering Branch, and the program is being managed by the Space Flight Project Branch. NASA is funding an Aerospace Flywheel Technology Development Program to design, fabricate, and test the Attitude Control/Energy Storage Experiment (ACESE). Two flywheels will be integrated onto a single power bus and run simultaneously to demonstrate a combined energy storage and 1-degree-of-freedom momentum control system. An algorithm that independently regulates direct-current bus voltage and net torque output will be experimentally demonstrated.
Improved methods of heat dissipation are required for modern, high-power density electronic systems. As increased functionality is progressively compacted into decreasing volumes, this need will be exacerbated. High-performance chip power is predicted to increase monotonically and rapidly with time. Systems utilizing these chips are currently reliant upon decades of old cooling technology. Heat pipes offer a solution to this problem. Heat pipes are passive, self-contained, two-phase heat dissipation devices. Heat conducted into the device through a wick structure converts the working fluid into a vapor, which then releases the heat via condensation after being transported away from the heat source. Heat pipes have high thermal conductivities, are inexpensive, and have been utilized in previous space missions. However, the cylindrical geometry of commercial heat pipes is a poor fit to the planar geometries of microelectronic assemblies, the copper that commercial heat pipes are typically constructed of is a poor CTE (coefficient of thermal expansion) match to the semiconductor die utilized in these assemblies, and the functionality and reliability of heat pipes in general is strongly dependent on the orientation of the assembly with respect to the gravity vector. What is needed is a planar, semiconductor-based heat pipe array that can be used for cooling of generic MCM (multichip module) assemblies that can also function in all orientations. Such a structure would not only have applications in the cooling of space electronics, but would have commercial applications as well (e.g. cooling of microprocessors and high-power laser diodes). This technology is an improvement over existing heat pipe designs due to the finer porosity of the wick, which enhances capillary pumping pressure, resulting in greater effective thermal conductivity and performance in any orientation with respect to the gravity vector. In addition, it is constructed of silicon, and thus is better suited for the cooling of semiconductor devices.
Future small satellite systems for both Earth observation as well as deep-space exploration are greatly enabled by the technological advances in deep sub-micron microelectronics technologies. Whereas these technological advances are being fueled by the commercial (non-space) industries, more recently there has been an exciting new synergism evolving between the two otherwise disjointed markets. In other words, both the commercial and space industries are enabled by advances in low-power, highly integrated, miniaturized (low-volume), lightweight, and reliable real-time embedded systems. Recent announcements by commercial semiconductor manufacturers to introduce Silicon On Insulator (SOI) technology into their commercial product lines is driven by the need for high-performance low-power integrated devices. Moreover, SOI has been the technology of choice for many space semiconductor manufacturers where radiation requirements are critical. This technology has inherent radiation latch-up immunity built into the process, which makes it very attractive to space applications. In this paper, we describe the advanced microelectronics and avionics technologies under development by NASA's Deep Space Systems Technology Program (also known as X2000). These technologies are of significant benefit to both the commercial satellite as well as the deep-space and Earth orbiting science missions. Such a synergistic technology roadmap may truly enable quick turn-around, low-cost, and highly capable small satellite systems for both Earth observation as well as deep-space missions.
This viewgraph presentation reviews NASA's Electronic Parts and Packaging (NEPP) Program. The NEPP mission is to provide guidance to NASA for the selection and and application of microelectronics technologies, to improve understanding of the risks related to the use of these technologies in the space environment and to ensure that appropriate research is performed to meet NASA mission needs. The NEPP Program focuses on the reliability aspects of electronic devices. Three principal aspects to this reliability: (1) lifetime, (2) effects of space radiation and the space environment, and (3) creation and maintenance of the assurance support infrastructure required for success.
Proton-induced fission of high-Z (Atomic Number) materials can produce high fluxes of high-LET (Linear Energy Transfer) ions in microelectronics. We develop methods to evaluate risks for a range of destructive and nondestructive SEE (Single-Event Effects) modes caused by this threat.
Mathematical cost factors were generated for both hybrid microcircuit and printed wiring board packaging methods. A mathematical cost model was created for analysis of microcircuit fabrication costs. The costing factors were refined and reduced to formulae for computerization. Efficient methods were investigated for low cost packaging of LSI devices as a function of density and reliability. Technical problem areas such as wafer bumping, inner/outer leading bonding, testing on tape, and tape processing, were investigated.
The approach taken by NASA and JPL (Jet Propulsion Laboratory) in the development of a MIL-STD-975 section which contains advanced technology such as Large Scale Integration and Very Large Scale Integration (LSI/VLSI) microelectronic devices is described. The parts listed in this section are recommended as satisfactory for NASA flight applications, in the absence of alternate qualified devices, based on satisfactory results of a vendor capability audit, the availability of sufficient characterization and reliability data from the manufacturers and users and negotiated detail procurement specifications. The criteria used in the selection and evaluation of the vendors and candidate parts, the preparation of procurement specifications, and the status of this activity are discussed.