Search NASA⌕ Search

SEARCH · Search NASA

Results for “PHASE DEMODULATOR”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 91 records · Page 5

Modulation/demodulation techniques for satellite communications. Part 4: Appendices

The use of the Viterbi algorithm in a general context is examined. The generalized transfer function bounds are given which permit the following applications to be carried out: maximum likelihood demodulation of such bandwidth modulations as minimum-shift-keying and continuous phase frequency-shift-keying, demodulation of intersymbol interference and partial response signals, estimation and smoothing, and simultaneous phase synchronization, and data detection. Sufficient conditions are reviewed for tightening Chernoff and Rhattacharyya bounds.

Omura, J. K.↗

Pseudocoherent Demodulation Of DPSK Radio Signals

Three schemes for pseudocoherent demodulation of differential-phase-shift keyed (DPSK) radio signals proposed for use in land-mobile/satellite communications. Enables fast reacquisition. Also amounts to compromise between two extremes of coherent demodulation and differentially coherent demodulation, for which bit-error rates greater than those of coherent demodulation by amounts corresponding to difference of about 1 dB in bit-energy/noise-energy ratio. Based on maximum-likelihood estimation and detection during N-symbol observation periods, where N integer typically chosen between 5 and 15.

Divsalar, Dariush↗

Real-time Signal-to-noise Ratio (SNR) Estimation for BPSK and QPSK Modulation Using the Active Communications Channel

Method and apparatus for estimating signal-to-noise ratio (SNR) gamma of a composite input signal e(t) on a phase modulated (e.g., BPSK) communications link. A first demodulator receives the composite input signal and a stable carrier signal and outputs an in-phase output signal; a second demodulator receives the composite input signal and a phase-shifted version of the carrier signal and outputs a quadrature-phase output signal; and phase error theta(sub E)(t) contained within the composite input signal e(t) is calculated from the outputs of the first and second demodulators. A time series of statistically independent phase error measurements theta(sub E)(t(sub 1)), theta (sub E)(t(sub 2)),..., theta (sub E)(t(sub k)) is obtained from the composite input signal subtending a time interval delta t = t(sub k) - t(sub 1) whose value is small enough such that gamma(t) and sigma(t) can be taken to be constant in delta t. A biased estimate gamma(sup *) for the signal-to-noise ratio (SNR) gamma if the composite input signal is calculated using maximum likelihood (ML) estimation techniques, and an unbiased estimate gamma(sup ^) for the signal-to-noise ratio (SNR) gamma of the composite input signal is determined from the biased estimate gamma(sup *), such as by use of a look-up table.

Manning, Robert M.↗

Digital PSK to BiO-L demodulator for 2 sup nx(bit rate) carrier

A phase shift key (PSK) to BiO-L demodulator which uses standard digital integrated circuits is discussed. The demodulator produces NRZ-L, bit clock, and BiO-L outputs from digital PSK input signals for which the carrier is a 2 to the Nth multiple of the bit rate. Various bit and carrier rates which are accommodated by changing various component values within the demodulator are described. The use of the unit for sinusoidal inputs as well as digital inputs is discussed.

Shull, T. A.↗

Improved performance of a digital phase-locked loop combined with a frequency/frequency-rate estimator

When a digital phase-locked loop with a long loop update time tracks a signal with high Doppler, the demodualtion losses due to frequency mismatch can become very significant. One way of reducing these Doppler-related losses is to compensate for the Doppler effect using some kind of frequency-rate estimator. The performance of the fixed-window least-squares estimator and the Kalman filter is investigated; several Doppler compensating techniques are proposed. It is shown that the variance of the frequency estimator can be made as small as desired, and with this, the Doppler effect can be effectively compensated. The remaining demodulation losses due to phase jitter in the loop can be less than 0.1 dB.

Mileant, A.↗

Phase-ambiguity resolution for QPSK modulation systems. Part 2: A method to resolve offset QPSK

Part 2 presents a new method to resolve the phase-ambiguity for Offset QPSK modulation systems. When an Offset Quaternary Phase-Shift-Keyed (OQPSK) communications link is utilized, the phase ambiguity of the reference carrier must be resolved. At the transmitter, two different unique words are separately modulated onto the quadrature carriers. At the receiver, the recovered carrier may have one of four possible phases, 0, 90, 180, or 270 degrees, referenced to the nominally correct phase. The IF portion of the channel may cause a phase-sense reversal, i.e., a reversal in the direction of phase rotation for a specified bit pattern. Hence, eight possible phase relationships (the so-called eight ambiguous phase conditions) between input and output of the demodulator must be resolved. Using the In-phase (I)/Quadrature (Q) channel reversal correcting property of an OQPSK Costas loop with integrated symbol synchronization, four ambiguous phase conditions are eliminated. Thus, only four possible ambiguous phase conditions remain. The errors caused by the remaining ambiguous phase conditions can be corrected by monitoring and detecting the polarity of the two unique words. The correction of the unique word polarities results in the complete phase-ambiguity resolution for the OQPSK system.

Nguyen, Tien Manh↗

An 8-PSK TDMA uplink modulation and coding system

The combination of 8-phase shift keying (8PSK) modulation and greater than 2 bits/sec/Hz drove the design of the Nyquist filter to one specified to have a rolloff factor of 0.2. This filter when built and tested was found to produce too much intersymbol interference and was abandoned for a design with a rolloff factor of 0.4. The preamble is limited to 100 bit periods of the uncoded bit period of 5 ns for a maximum preamble length of 500 ns or 40 8PSK symbol times at 12.5 ns per symbol. For 8PSK modulation, the required maximum degradation of 1 dB in -20 dB cochannel interference (CCI) drove the requirement for forward error correction coding. In this contract, the funding was not sufficient to develop the proposed codec so the codec was limited to a paper design during the preliminary design phase. The mechanization of the demodulator is digital, starting from the output of the analog to digital converters which quantize the outputs of the quadrature phase detectors. This approach is amenable to an application specific integrated circuit (ASIC) replacement in the next phase of development.

Ames, S. A.↗

High speed hardware development for FDMA/TDM system

The development of a transmultiplexor and a quadrature phase shift keying (QPSK) demodulator is discussed. The system is designed to meet real time signal processing requirements of future satellite systems and should consume very little power. The architectures of the transmultiplexor and the demodulator are designed for the pipelining of all the modules, namely the commutator, the filter bank fast fourier transform (FFT), and the internal modules of the QPSK. The architecture is designed for the case of 800 channels. Each channel is to have a bandwidth of 45 KHz and a bit rate of 64 Kb/s. In this case each module will have 22.22 micro seconds to complete a computation.

Kwatra, S. C.↗

Digital Beamforming Scatterometer

This paper discusses scatterometer measurements collected with multi-mode Digital Beamforming Synthetic Aperture Radar (DBSAR) during the SMAP-VEX 2008 campaign. The 2008 SMAP Validation Experiment was conducted to address a number of specific questions related to the soil moisture retrieval algorithms. SMAP-VEX 2008 consisted on a series of aircraft-based.flights conducted on the Eastern Shore of Maryland and Delaware in the fall of 2008. Several other instruments participated in the campaign including the Passive Active L-Band System (PALS), the Marshall Airborne Polarimetric Imaging Radiometer (MAPIR), and the Global Positioning System Reflectometer (GPSR). This campaign was the first SMAP Validation Experiment. DBSAR is a multimode radar system developed at NASA/Goddard Space Flight Center that combines state-of-the-art radar technologies, on-board processing, and advances in signal processing techniques in order to enable new remote sensing capabilities applicable to Earth science and planetary applications [l]. The instrument can be configured to operate in scatterometer, Synthetic Aperture Radar (SAR), or altimeter mode. The system builds upon the L-band Imaging Scatterometer (LIS) developed as part of the RadSTAR program. The radar is a phased array system designed to fly on the NASA P3 aircraft. The instrument consists of a programmable waveform generator, eight transmit/receive (T/R) channels, a microstrip antenna, and a reconfigurable data acquisition and processor system. Each transmit channel incorporates a digital attenuator, and digital phase shifter that enables amplitude and phase modulation on transmit. The attenuators, phase shifters, and calibration switches are digitally controlled by the radar control card (RCC) on a pulse by pulse basis. The antenna is a corporate fed microstrip patch-array centered at 1.26 GHz with a 20 MHz bandwidth. Although only one feed is used with the present configuration, a provision was made for separate corporate feeds for vertical and horizontal polarization. System upgrades to dual polarization are currently under way. The DBSAR processor is a reconfigurable data acquisition and processor system capable of real-time, high-speed data processing. DBSAR uses an FPGA-based architecture to implement digitally down-conversion, in-phase and quadrature (I/Q) demodulation, and subsequent radar specific algorithms. The core of the processor board consists of an analog-to-digital (AID) section, three Altera Stratix field programmable gate arrays (FPGAs), an ARM microcontroller, several memory devices, and an Ethernet interface. The processor also interfaces with a navigation board consisting of a GPS and a MEMS gyro. The processor has been configured to operate in scatterometer, Synthetic Aperture Radar (SAR), and altimeter modes. All the modes are based on digital beamforming which is a digital process that generates the far-field beam patterns at various scan angles from voltages sampled in the antenna array. This technique allows steering the received beam and controlling its beam-width and side-lobe. Several beamforming techniques can be implemented each characterized by unique strengths and weaknesses, and each applicable to different measurement scenarios. In Scatterometer mode, the radar is capable to.generate a wide beam or scan a narrow beam on transmit, and to steer the received beam on processing while controlling its beamwidth and side-lobe level. Table I lists some important radar characteristics

Rincon, Rafael F.↗

Low distortion automatic phase control circuit

Circuit for generation and demodulation of quadrature double side band signals in frequency division multiplexing system is described. Circuit is designed to produce low distortion automatic phase control. Illustration of circuit and components is included.

Hauge, G.↗

Parameter region for proper operation of a multifilter phase-lock loop.

Parameter regions for proper operation of multifilter phase-lock loops used for demodulation are determined utilizing digital and analog computers. Experimental models are used to study these regions of proper operation. Generalized state models are developed for the multifilter phase-lock loop.

Carden, F.↗

Synthesis and evaluation of phase detectors for active bit synchronizers

Self-synchronizing digital data communication systems usually use active or phase-locked loop (PLL) bit synchronizers. The three main elements of PLL synchronizers are the phase detector, loop filter, and the voltage controlled oscillator. Of these three elements, phase detector synthesis is the main source of difficulty, particularly when the received signals are demodulated square-wave signals. A phase detector synthesis technique is reviewed that provides a physically realizable design for bit synchronizer phase detectors. The development is based upon nonlinear recursive estimation methods. The phase detector portion of the algorithm is isolated and analyzed.

Mcbride, A. L.↗

Baseband pulse shaping techniques for nonlinearly amplified pi/4-QPSK and QAM systems

A new generation of multi-stage pi/4-shifted QPSK and of superposed quadrature-amplitude-modulated (SQAM) modulators-coherent demodulators (modems) and of continuous phase modulated (CPM)-gaussian premodulation filtered minimum-shift-keying (MGMSK) systems is proposed and studied. These modems will lead to bandwidth and power efficient satellite communications systems designs. As an illustrative application, a baseband processing technique pi/4-controlled transition PSK (pi/4-CTPSK) is described. To develop a cost and power efficient design strategy, we assume that nonlinear, fully saturated high power amplifiers (HPA) are utilized in the satellite earth station transmitter and in the satellite transponder. Modem structures which could lead to application specific integrated circuit (ASIC) satellite on-board processing universal modem applications are also considered. Multistate GMSK (i.e., MGMSK) signal generation methods by means of two or more RF combined nonlinearly amplified SQAM modems and by one multistate (in-phase and quadrature-baseband premodulation filtered-superposed) SQAM architecture and one RF nonlinear amplifier are studied. During the SQAM modem development phase we investigate the potential system advantages of the pi/4-shifted logic. The bandwidth efficiency of the proposed multistate GMSK and baseband filtered PAM-FM modulator (a new class in the CPM family) will be significantly higher than that of conventional G-MSK systems. To optimize the practical P(sub e) = f((E sub b)/(N sub o)) performance we consider improved coherent demodulation MGMSK structures such as deviated-frequency locking coherent demodulators. For relative low bit rate SATCOM applications, e.g., bit rates less than 300 kb/s, phase noise tracking cancellation (for fixed site earth station) and phase noise cancellation as well as Doppler compensation (for satellite to mobile earth station) applications may be required. We study digital channel sounding methods which could cancel the phase noise-caused degradations of CPM and GMSK modems.

Feher, Kamilo↗