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Communications system maintains phase lock of weak telemetry signals with a minimal expenditure of power and bandwidth. An estimate of the frequency variation as a function of time is used to achieve coherent phase demodulation.
The probe-to-orbiter data link for the Jovian mission uses a Manchester encoded BPSK waveform which is demodulated by the Galileo probe relay receiver. Signal acquisition and tracking consists of a sequential probability ratio signal search, frequency acquisition with a least-squares estimator, wide-band phase lock acquisition, and a self-regulating mode control. A discrete Fourier transform serves as the basic mechanism to generate the algorithms that provide this orderly transition to phase tracking. Acquisition and tracking is addressed in this paper with emphasis on key algorithms, rationale, and theoretical/measured performance.
To demodulate a communication signal, a receiver must recover and synchronize to the symbol timing of a received waveform. In a system that utilizes digital sampling, the fidelity of synchronization is limited by the time between the symbol boundary and closest sample time location. To reduce this error, one typically uses a sample clock in excess of the symbol rate in order to provide multiple samples per symbol, thereby lowering the error limit to a fraction of a symbol time. For systems with a large modulation bandwidth, the required sample clock rate is prohibitive due to current technological barriers and processing complexity. With precise control of the phase of the sample clock, one can sample the received signal at times arbitrarily close to the symbol boundary, thus obviating the need, from a synchronization perspective, for multiple samples per symbol. Sample-clock phase-control feedback was developed for use in the demodulation of an optical communication signal, where multi-GHz modulation bandwidths would require prohibitively large sample clock frequencies for rates in excess of the symbol rate. A custom mixedsignal (RF/digital) offset phase-locked loop circuit was developed to control the phase of the 6.4-GHz clock that samples the photon-counting detector output. The offset phase-locked loop is driven by a feedback mechanism that continuously corrects for variation in the symbol time due to motion between the transmitter and receiver as well as oscillator instability. This innovation will allow significant improvements in receiver throughput; for example, the throughput of a pulse-position modulation (PPM) with 16 slots can increase from 188 Mb/s to 1.5 Gb/s.
A multi-rate digital command system is disclosed which uses the composite signal of a mu-type ranging system as a subcarrier to transmit range codes and data from a station to a receiver where the range codes are sequentially phase modulated on a subcarrier of frequency by one of its own subharmonics and data is phase modulated on a selected ranging component. A range cleanup loop in a spacecraft locks the phase of a locally generated reference component to a received ranging component and retransmits the component to a ground station. When the inverse phase of a ranging component is received and detected, the cleanup loop is modified to demodulate phase modulated command symbols while continuing tracking the same ranging component. The command symbol rate is coherently related to the ranging signal component bit rate.
Signal is demodulated and synchronized by three loop circuits: ''Q'' loop uses quadrature signal to stabilize frequency; ''B'' loop acts on baseboard signal to stabilize phase; and decoding ''I'' loop acts on in-phase signal. Synchronizer may be used to eliminate false-lock.
Self-synchronizing digital data communication systems usually use active or phase-locked loop (PLL) bit synchronizers. The three main elements of PLL synchronizers are the phase detector, loop filter, and the voltage controlled oscillator. Of these three elements, phase detector synthesis is the main source of difficulty, particularly when the received signals are demodulated square-wave signals. A phase detector synthesis technique is reviewed that provides a physically realizable design for bit synchronizer phase detectors. The development is based upon nonlinear recursive estimation methods. The phase detector portion of the algorithm is isolated and analyzed.
Results pertinent to predicting the performance of convolutionally encoded binary phase-shift keyed communication links were presented. The details of the development are provided in four sections. These sections are concerned with developing the bit error probability performance degradations due to PN despreading by a time-shared delay locked loop, the Costas demodulation process, symbol synchronization effects and cycle slipping phenomena in the Costas loop. In addition, Costas cycle slipping probabilities are studied as functions of Doppler count time and signal-to-noise conditions. The effect of cycle slipping in the symbol synchronizer is also studied as a function of channel Doppler and other frequency uncertainties.
State-of-the art on phase locked loops PLL is reported by summarizing some specific results. Following a statement of the overall analysis and design objectives, results are presented in a format identifying working terminology, inherent assumptions, and references for each result. The use of PLL in tracking, synchronization, and demodulation is reemphasized, as well as the mathematical challenge involved in solving nonlinear stochastic differential equations.
A proof-of-concept demodulator for TDMA applications requiring high total data rates composed of many low data rate users is proposed. High-spectrum efficiency is obtained via a bandwidth efficient combined modulation and coding system, and low TDMA overhead is obtained via a fast acquiring digital phase lock loop. The system employs a data rate of 200 Mb/s with a bit error rate of better than 5 x 10 to the -7th in the presence of adjacent channel interference 20 dB above the weakest user. The 8-PSK modulation combined with the rate 5/6 forward error correction coding results in a bandwidth efficiency of better than 2 bits/second per Hz.
Results of theoretical analyses of 12 problems are presented and comparisons of theoretical and experimental results are given. The investigations covered were: (1) techniques for improving the Saturn radar altimeter, (2) performance of the phase lock loop of the offset Doppler transponder, (3) signal processing equipment design for an orbital altitude radar return experiment, (4) spectral studies of signals present in the command and communication system (CCS) up-link transmitter, (5) intermodulation in the CCS down-link data demodulators, (6) error rate performance of the CCS transponder command demodulator, (7) flame attenuation effects on telemetry transmissions during Saturn launches, (8) design of a digital television system which converts a standard monochrome picture to a slow-scan picture, (9) methods of obtaining an additional CCS 72-kilobit/sec telemetry channel, (10) computation of the CCS S-band down-link spectra, (11) modeling of portions of the communications systems, and (12) modeling of a telemetry transmitter.
A one-page document describes a Ka-band transponder being developed for use in deep-space radio science. The transponder receives in the Deep Space Network (DSN) uplink frequency band of 34.2 to 34.7 GHz, transmits in the 31.8- to 32.3 GHz DSN downlink band, and performs regenerative ranging on a DSN standard 4-MHz ranging tone subcarrier phase-modulated onto the uplink carrier signal. A primary consideration in this development is reduction in size, relative to other such transponders. The transponder design is all-analog, chosen to minimize not only the size but also the number of parts and the design time and, thus, the cost. The receiver features two stages of frequency down-conversion. The receiver locks onto the uplink carrier signal. The exciter signal for the transmitter is derived from the same source as that used to generate the first-stage local-oscillator signal. The ranging-tone subcarrier is down-converted along with the carrier to the second intermediate frequency, where the 4-MHz tone is demodulated from the composite signal and fed into a ranging-tone-tracking loop, which regenerates the tone. The regenerated tone is linearly phase-modulated onto the downlink carrier.
When a digital phase-locked loop with a long loop update time tracks a signal with high Doppler, the demodualtion losses due to frequency mismatch can become very significant. One way of reducing these Doppler-related losses is to compensate for the Doppler effect using some kind of frequency-rate estimator. The performance of the fixed-window least-squares estimator and the Kalman filter is investigated; several Doppler compensating techniques are proposed. It is shown that the variance of the frequency estimator can be made as small as desired, and with this, the Doppler effect can be effectively compensated. The remaining demodulation losses due to phase jitter in the loop can be less than 0.1 dB.
This work details a study of robust synchronization schemes suitable for satellite to mobile aeronautical applications. A new scheme, the Modified Sliding Window Synchronizer (MSWS), is devised and compared with existing schemes, including the traditional Early-Late Gate Synchronizer (ELGS), the Gardner Zero-Crossing Detector (GZCD), and the Sliding Window Synchronizer (SWS). Performance of the synchronization schemes is evaluated by a set of metrics that indicate performance in digital communications systems. The metrics are convergence time, mean square phase error (or root mean-square phase error), lowest SNR for locking, initial frequency offset performance, midstream frequency offset performance, and system complexity. The performance of the synchronizers is evaluated by means of Matlab simulation models. A simulation platform is devised to model the satellite to mobile aeronautical channel, consisting of a Quadrature Phase Shift Keying modulator, an additive white Gaussian noise channel, and a demodulator front end. Simulation results show that the MSWS provides the most robust performance at the cost of system complexity. The GZCD provides a good tradeoff between robustness and system complexity for communication systems that require high symbol rates or low overall system costs. The ELGS has a high system complexity despite its average performance. Overall, the SWS, originally designed for multi-carrier systems, performs very poorly in single-carrier communications systems. Table 5.1 in Section 5 provides a ranking of each of the synchronization schemes in terms of the metrics set forth in Section 4.1. Details of comparison are given in Section 5. Based on the results presented in Table 5, it is safe to say that the most robust synchronization scheme examined in this work is the high-sample-rate Modified Sliding Window Synchronizer. A close second is its low-sample-rate cousin. The tradeoff between complexity and lowest mean-square phase error determines the rankings of the Gardner Zero-Crossing Detector and both versions of the Early-Late Gate Synchronizer. The least robust models are the high and low-sample-rate Sliding Window Synchronizers. Consequently, the recommended replacement synchronizer for NASA's Advanced Air Transportation Technologies mobile aeronautical communications system is the high-sample-rate Modified Sliding Window Synchronizer. By incorporating this synchronizer into their system, NASA can be assured that their system will be operational in extremely adverse conditions. The quick convergence time of the MSWS should allow the use of high-level protocols. However, if NASA feels that reduced system complexity is the most important aspect of their replacement synchronizer, the Gardner Zero-Crossing Detector would be the best choice.
A demodulator for Offset Quaternary Phase Shift Keyed (OQPSK) signals modulated with two words resolves eight possible combinations of phase ambiguity which may produce data error by first processing received I(sub R) and Q(sub R) data in an integrated carrier loop/symbol synchronizer using a digital Costas loop with matched filters for correcting four of eight possible phase lock errors, and then the remaining four using a phase ambiguity resolver which detects the words to not only reverse the received I(sub R) and Q(sub R) data channels, but to also invert (complement) the I(sub R) and/or Q(sub R) data, or to at least complement the I(sub R) and Q(sub R) data for systems using nontransparent codes that do not have rotation direction ambiguity.
A type II 1.06-micron optical phase-locked loop (OPLL) for use in a coherent homodyne receiver is discussed. Diode-laser-pumped solid-state lasers are used for both the local oscillator and transmitter, because their phase noise is significantly lower than that of diode lasers. Closed-loop RMS phase noise of less than 12 mrad (0.69 deg) is achieved, and modulation-demodulation in bulk modulators at rates from 20 kHz to 20 MHz with less than 19 deg of modulation depth is demonstrated.
Figure 1 shows a simplified block diagram of an improved optoelectronic system for locking the phase of one laser to that of another laser with an adjustable offset frequency specified by the user. In comparison with prior systems, this system exhibits higher performance (including higher stability) and is much easier to use. The system is based on a field-programmable gate array (FPGA) and operates almost entirely digitally; hence, it is easily adaptable to many different systems. The system achieves phase stability of less than a microcycle. It was developed to satisfy the phase-stability requirement for a planned spaceborne gravitational-wave-detecting heterodyne laser interferometer (LISA). The system has potential terrestrial utility in communications, lidar, and other applications. The present system includes a fast phasemeter that is a companion to the microcycle-accurate one described in High-Accuracy, High-Dynamic-Range Phase-Measurement System (NPO-41927), NASA Tech Briefs, Vol. 31, No. 6 (June 2007), page 22. In the present system (as in the previously reported one), beams from the two lasers (here denoted the master and slave lasers) interfere on a photodiode. The heterodyne photodiode output is digitized and fed to the fast phasemeter, which produces suitably conditioned, low-latency analog control signals which lock the phase of the slave laser to that of the master laser. These control signals are used to drive a thermal and a piezoelectric transducer that adjust the frequency and phase of the slave-laser output. The output of the photodiode is a heterodyne signal at the difference between the frequencies of the two lasers. (The difference is currently required to be less than 20 MHz due to the Nyquist limit of the current sampling rate. We foresee few problems in doubling this limit using current equipment.) Within the phasemeter, the photodiode-output signal is digitized to 15 bits at a sampling frequency of 40 MHz by use of the same analog-to-digital converter (ADC) as that of the previously reported phasemeter. The ADC output is passed to the FPGA, wherein the signal is demodulated using a digitally generated oscillator signal at the offset locking frequency specified by the user. The demodulated signal is low-pass filtered, decimated to a sample rate of 1 MHz, then filtered again. The decimated and filtered signal is converted to an analog output by a 1 MHz, 16-bit digital-to-analog converters. After a simple low-pass filter, these analog signals drive the thermal and piezoelectric transducers of the laser.
Hopfield neural networks proposed for demodulating quadrature phase-shift-keyed (QPSK) signals carrying digital information. Networks solve nonlinear integral equations prior demodulation circuits cannot solve. Consists of set of N operational amplifiers connected in parallel, with weighted feedback from output terminal of each amplifier to input terminals of other amplifiers. Used to solve signal processing problems. Implemented as analog very-large-scale integrated circuit that achieves rapid convergence. Alternatively, implemented as digital simulation of such circuit. Also used to improve phase estimation performance over that of phase-locked loop.
Proposed modifications of an offset-quadri-phase-shift keying (offset-QPSK) transmitter and receiver would reduce the amount of signal processing that must be done in the receiver to resolve the QPSK fourfold phase ambiguity. Resolution of the phase ambiguity is necessary in order to synchronize, with the received carrier signal, the signal generated by a local oscillator in a carrier-tracking loop in the receiver. Without resolution of the fourfold phase ambiguity, the loop could lock to any of four possible phase points, only one of which has the proper phase relationship with the carrier. The proposal applies, more specifically, to an offset-QPSK receiver that contains a carrier-tracking loop like that shown in Figure 1. This carrier-tracking loop does not resolve or reduce the phase ambiguity. A carrier-tracking loop of a different design optimized for the reception of offset QPSK could reduce the phase ambiguity from fourfold to twofold, but would be more complex. Alternatively, one could resolve the fourfold phase ambiguity by use of differential coding in the transmitter, at a cost of reduced power efficiency. The proposed modifications would make it possible to reduce the fourfold phase ambiguity to twofold, with no loss in power efficiency and only relatively simple additional signal-processing steps in the transmitter and receiver. The twofold phase ambiguity would then be resolved by use of a unique synchronization word, as is commonly done in binary phase-shift keying (BPSK). Although the mathematical and signal-processing principles underlying the modifications are too complex to explain in detail here, the modifications themselves would be relatively simple and are best described with the help of simple block diagrams (see Figure 2). In the transmitter, one would add a unit that would periodically invert bits going into the QPSK modulator; in the receiver, one would add a unit that would effect different but corresponding inversions of bits coming out of the QPSK demodulator. The net effect of all the inversions would be that depending on which lock point the carrier-tracking loop had selected, all the output bits would be either inverted or non-inverted together; hence, the ambiguity would be reduced from fourfold to twofold, as desired.