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A circuit for suppressing parasitic oscillations across an inductor operating in a resonant mode is described. The circuit includes a switch means and resistive means connected serially across the inductor. A unidirectional resistive-capacitive network is also connected across the inductor and to the switch means to automatically render the switch means conducting when inductive current through the inductor ceases to flow.
Multi-layer ceramic capacitors have been used for high frequency decoupling application due to a lower overall impedance leading to fast current response. However, high parasitic inductance limits the application of these capacitors in ultra-high frequency domain. Thus, Multlayer Ceramic Capacitors (MLCCs) are placed close to the IC to improve circuit efficiency and reduce inductance. With next generation applications, the demand for frequency range has further increased which not only requires enhanced capacitor material but improved manufacturing techniques to limit the inductive path. Here, we demonstrate ALD of two different polymorphs of ultra-thin film lithium phosphorus oxynitride (LiPON) as an inorganic solid state electrolyte (SSE) for on chip capacitors for decoupling application. Both the LiPON capacitors shows an electric double layer behavior with a capacitance of 15 μF/cm 2 and a low leakage current (<20 nA/cm 2 ) at 2V. The LiPON shows EDLC behavior up to 10 kHz and beyond, both the polymorphs show an electrostatic behavior with a high dielectric constant (14). Furthermore, this dual frequency behavior along with low parasitic inductance and on chip integration allows for operation in extended frequency ranges.
An essential ruggedness of power devices is the capability of safely withstanding the surge energy. The surge ruggedness of the GaN high-electron-mobility transistor (HEMT), a power transistor with no or minimal avalanche capability, has not been fully understood. This article unveils the comprehensive physics associated with the surge-energy withstand process and the failure mechanisms of p-gate GaN HEMTs. Two commercial p-gate GaN HEMTs with Ohmic- and Schottky-type gate contacts are studied. Two circuits are developed to study the device surge ruggedness: an unclamped inductive switching circuit is first used to identify the withstand dynamics and failure mechanisms, and a clamped inductive switching circuit with a controllable parasitic inductance is then designed to mimic the surge energy in converter-like switching events. The p-gate GaN HEMT is found to withstand the surge energy through a resonant energy transfer between the device capacitance and the load/parasitic inductance rather than a resistive energy dissipation as occurred in the avalanche. If the device resonant voltage goes below zero, the device reversely turns on and the inductor is discharged. The device failure occurs at the transient of peak resonant voltage and is limited by the device overvoltage capability rather than the surge energy, dV/dt , or overvoltage duration. Almost no energy is dissipated in the resonant withstand process and the device failure is dominated by an electric field rather than a thermal runaway. Furthermore, these results provide critical understandings on the ruggedness of GaN HEMTs and important references for their qualifications and applications.
We demonstrate a monolithic coplanar stripline platform for on-chip terahertz (THz) generation, transmission, and detection, addressing key challenges of mode purity, bandwidth, and referencing. Capacitive coupling of the photoconductive generator switch enforces pure odd-mode propagation, increases THz field strength, and extends the operational frequency range, achieving 0.05–1.4 THz. Our architecture enables fully monolithic fabrication with amorphous silicon switches, in situ field referencing, and galvanic isolation between generation and detection. Finite-element simulations and experiments confirm that suppressing parasitic modes improves signal integrity, providing a robust platform for high-fidelity THz spectroscopy, ultrafast electronics, and nanoscale quantum materials research.
The Plasma Interaction Test performed on two space station solar array panels is addressed. This includes a discussion of the test requirements, test plan, experimental set-up, and test results. It was found that parasitic current collection was insignificant (0.3 percent of the solar array delivered power). The measured arcing threshold ranged from -210 to -457 V with respect to the plasma potential. Furthermore, the dynamic response of the panels showed the panel time constant to range between 1 and 5 microsec, and the panel capacitance to be between .01 and .02 microF.
The plasma Interaction Test performed on two space station solar array panels is addressed. This includes a discussion of the test requirements, test plan, experimental set-up, and test results. It was found that parasitic current collection was insignificant (0.3 percent of the solar array delivered power). The measured arcing threshold ranged from -210 to -457 V with respect to the plasma potential. Furthermore, the dynamic response of the panels showed the panel time constant to range between 1 and 5 microsec, and the panel capacitance to be between .01 and .02 microF.
Design considerations, fabrication techniques, and performance predictions are presented for a planar whiskerless Schottky diode to be used (in radio astronomy applications) at 100-300 GHz. The anode and ohmic contacts are on the same side of the device, and proton bombardment is used to establish the divided surface (by making some regions of the GaAs wafer semiinsulating) prior to definition of a B-doped SiO2 finger, ohmic contacting, anode formation, and anode contact metallization (all using photolithographic techniques). The contributions of parasitic elements are calculated for a device with a 3.5-micron-deep n(+) layer doped at 2 x 10 to the 18th/cu cm, a 250-nm-thick epitaxial layer doped at 5 x 10 to the 16th/cu cm, and a 1-micron-radius anode (providing zero-bias junction capacitance 7 fE). It is predicted that such a device would have total series resistance 12.58 ohm and total shunt capacitance 1.37 fF, compared with 14.27 ohm and 0.93 fF for the corresponding whiskered device.
Improved capacitive sensor used to detect presence and/or measure thickness of layer of liquid. Electrical impedance or admittance of sensor measured at prescribed frequency, and thickness of liquid inferred from predetermined theoretical or experimental relationship between impedance and thickness. Sensor is basically a three-terminal device. Features interdigitated driving and sensing electrodes and peripheral coplanar ground electrode that reduces parasitic effects. Patent-pending because first to utilize ground plane as "shunting" electrode. System less expensive than infrared, microwave, or refractive-index systems. Sensor successfully evaluated in commercial production plants to characterize emulsions, slurries, and solutions.
With the development of wide band-gap (WBG) technology, the switching speed of power semiconductor devices is increased, which makes circuits more sensitive to parasitics. For three-level active neutral point clamped (3L-ANPC) converters, the over-voltage of non-conducting switches can be an issue. This paper analyzes the multiple commutation loops in 3L-ANPC converter and summarizes the impact factors of the over-voltage for the non-conducting switch. It is found that the nonlinearity of the output capacitance of the device can significantly influence the over-voltage. A simple control without introducing any additional hardware circuit is proposed to attenuate the impact of the nonlinearity. With the proposed control, the peak over-voltage of the non-conducting switch can be reduced significantly. Multi-pulse test is conducted for a 3L- ANPC converter built with silicon carbide (SiC) MOSFETs. The testing results show that the peak over-voltage decreases from 892 V to 624 V with the proposed control. More detailed analysis and experimental results will be provided in the final paper.
In this work, the effect of pH and potential is examined for the oxidation of carbon cloth electrodes used in capacitive deionization (CDI) processes. The degree of oxidation of the electrode surface, examined using the electrode's potential of zero charge (E pzc ) and measured using chronoamperometry and cyclic voltammetry, is found to be strongly correlated to the pH of the solution at the interface. Local pH measurements are examined at anodes and cathodes in full CDI and membrane-assisted capacitive deionization (MCDI) cells at cell voltages ranging from 0.3–1.2 V. The cathode is shown to be basic under charging potentials while the anode is found to be acidic. This local pH is found to be highly transient during charging and discharging in CDI cells while the pH is found to be relatively static in the MCDI cells, maintaining a basic pH at the cathode and an acidic pH at the anode even when the cell is discharged. Ion exchange membranes (IEM) are found to have two functions: (1) limiting co-ion expulsion that results from specific ion adsorption and (2) limiting the effects of parasitic Faradaic reactions on the separation process by stabilizing the local pH thereby mitigating dissolved oxygen reduction at the cathode and lessening carbon oxidation at the anode. Performance comparisons including the salt adsorption capacity and charge efficiency are also compared for these systems.
This letter reports the miniaturization of a planar Wilkinson power divider by capacitive loading of the quarter wave transmission lines employed in conventional Wilkinson power dividers. Reduction of the transmission line segments from lambda/4 to between lambda/5 and lambda/12 are reported here. The input and output lines at the three ports and the lines comprising the divider itself are coplanar waveguide (CPW) and asymmetric coplanar stripline (ACPS), respectively. The 10 GHZ power dividers are fabricated on high resistivity silicon (HRS) and alumina wafers. These miniaturized dividers are 74% smaller than conventional Wilkinson power dividers, and have a return loss better than +30 dB and an insertion loss less than 0.55 dB. Design equations and a discussion about the effect of parasitic reactance on the isolation are presented for the first time.
Membrane capacitive deionization (MCDI) is a unique electrochemical separations platform that allows for energy recovery during electrode regeneration. Similar to other electrochemical separation technologies producing deionized water (e.g. electrodialysis), ohmic resistances in the spacer channel significantly hampers the performance and energy efficiency of the process. This work devised a series of ionomer coated nylon mesh nets to address spacer channel resistances in MCDI. Under constant current operation, the ionomer coated nylon meshes displayed a 300 mV lower cell voltage rise during deionization while sustaining the same deionization rate. Furthermore, energy recovery was improved by 1.4x to 5.5x depending on the saline feed concentration. The lower cell voltage rise during deionization combined with the greater energy recovery with ionomer coated meshes resulted in energy normalized adsorbed salt (ENAS) values that were 2x to 3x greater. Addressing the spacer channel resistances in MCDI allowed for 8% to 19% increase in current density without the cell voltage exceeding 1.6 V—the upper bound set for mitigating parasitic reactions. Operating at higher current density leads to smaller MCDI units for a given deionization requirement and has implications for reducing the capital costs of the MCDI unit.
GaAs FET's with gatelengths on a nanometer scale have been designed, fabricated and evaluated in order to investigate the limits of conventional GaAs scaling rules. An optimum layer structure for deep submicron GaAs MESFET's was designed, and a fabrication process that minimizes the effects of extrinsic parasitics was developed. The fabricated FET's were measured and evaluated at DC and at RF frequencies. 0.1 micron and 50 nm gatelength GaAs MESFET's with 2x45 micron wide "T"-shaped gates were fabricated so that a wide range of saturation current was achieved. For the 0.1 micron gatelength FET's, peak g(sub m,ext) varies from 611 mS/mm to 795 mS/mm with an average value of 717 mS/mm, peak f(sub t) varies from 90 GHz to 103 GHz with an average value of 96 GHz, and peak f(sub max) varies from 147 GHz to 172 GHz with an average value of 161 GHz. In comparison, the peak g(sub m,ext) of the 50 nm gatelength FET's is reduced by almost 20%, the peak f(sub t) is increased by 30%, and the peak f(sub max) is about the same as for the 0.1 micron gatelength FET's. The f(sub t) of the 50 nm gatelength FET's is higher than the f(sub t) of the 0.1 micron gatelength FET's because of the reduced gate-source capacitance (C(sub gs)). The peak f(sub max) does not show a similar improvement because of the onset of short channel effects.
Cu(In,Ga)Se 2 -based solar cells typically use a C dS buffer layer, even though its relatively low bandgap causes parasitic absorption. While alternatives to CdS have been explored in other studies, limited results have been shown for Ag-alloyed CIGS (ACIGS). In this study, ACIGS solar cells with both CdS and Zn(O,S) buffer layers were fabricated and compared for solar cell performance. The Zn(O,S) buffer slightly improved J sc through reduced absorption, although surface optimization is necessary. The Zn(O,S) ACIGS also had improved FF through reduced series resistance and ideality factor, which could be improved further through optimization. However, the Voc in the Zn(O,S) samples was reduced, likely due to increased bulk and front interface recombination. This study shows the promise of Zn(O,S) as a buffer layer in ACIGS solar cells and suggests pathways for further improvement.