Exploring Power and Frequency Limits of Printed Circuit Board Dispersive Nonlinear Transmission Lines
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Wright, Travis [Texas Tech University]↗
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Achieving Improved Reliability with Failure Analysis
Reliability is the ability of a product to properly function, within specified performance limits, for a specified period of time, under the life cycle application conditions. Failure analysis is a vital tool in the effort to ensure reliability of electronic products and systems throughout their product lifecycle. Today, organizations involved in activities within the electronics supply chain are facing new challenges, not just from complex assembly styles, harsher lifecycle environments, and sophisticated supply chains, but also from customers who are demanding a quicker turn-around. Unfortunately, root cause failure analysis is often performed incompletely, leading to a poor understanding of failure mechanisms and causes and, customer dissatisfaction due to recurring failures. The PDC (Professional Development Course) starts with an introduction to reliability concepts, physics of failure and an overview of failure mechanisms that affect PCBs (Printed Circuit Boards), PCBAs (Printed Circuit Board Assembly) and components. The PDC then dives into root cause hypothesizing techniques (Pareto, FMEA (Failure Modes and Effects Analysis), fishbone (Cause-And-Effect Diagram), FTA (Fault Tree Analysis)), non-destructive and destructive analysis and, materials characterization will be discussed. Numerous failure analysis case studies will be used to illustrate the techniques and analysis principles to arrive at the root cause(s) of field failures on printed circuit boards, active components, and assemblies. What Attendees will Learn: Topics include: Overview of Reliability Concepts Failure mechanisms of electronic products Root cause analysis Failure analysis techniques -Non-destructive techniques (optical, CSAM (Confocal Scanning Electron Microscopy) etc.) -Destructive analysis (DPA (Destructive Physical Analysis), Decap (Decapsulation), FIB (Focused Ion Beam) etc.) -Materials characterization (XRF (X-Ray Fluorescence) , EDS (Error Detection Sequential), TMA/DSC (Thermal Mechanical Analysis/Differential Scanning Calorimetry) etc.)
PCB quality↗
PSEC5 Physical Verification
Ultra-Fast timing detectors, having a time resolution of 10pSec or less, are becoming increasingly important for many scientific disciplines, including High Energy Physics, Nuclear Physics, Medical Imaging and more. When developing ultra-fast detectors such as MCPs, LAPPDs, LGADs, SNSPDs, it is necessary to have access to a readout system that is low power, can support many channels and is cost effective. The PSEC5 chip was an application specific integrated circuit (ASIC) developed by the pioneering group of Prof. Henry Frisch at University of Chicago and micro electronic engineers at Fermi National Accelerator Laboratory. Three boards were designed, two to implement the readout system for an LAPPD and one to only characterize the PSEC1 chip. The main goal of the project shifted to setting up a testing environment to focus on the characterization of the chip. My student and I tested and characterized this ASIC using the third chip-on-board printed circuit board. Results show the successful fabrication and operation of some of the key building blocks and lead to the suggestions on modification for the second iteration of the chip.
Rico Aniles, H. D. [Unlisted]↗
Board Saver for Use with Developmental FPGAs
A device denoted a board saver has been developed as a means of reducing wear and tear of a printed-circuit board onto which an antifuse field programmable gate array (FPGA) is to be eventually soldered permanently after a number of design iterations. The need for the board saver or a similar device arises because (1) antifuse-FPGA design iterations are common and (2) repeated soldering and unsoldering of FPGAs on the printed-circuit board to accommodate design iterations can wear out the printed-circuit board. The board saver is basically a solderable/unsolderable FPGA receptacle that is installed temporarily on the printed-circuit board. The board saver is, more specifically, a smaller, square-ring-shaped, printed-circuit board (see figure) that contains half via holes one for each contact pad along its periphery. As initially fabricated, the board saver is a wider ring containing full via holes, but then it is milled along its outer edges, cutting the via holes in half and laterally exposing their interiors. The board saver is positioned in registration with the designated FPGA footprint and each via hole is soldered to the outer portion of the corresponding FPGA contact pad on the first-mentioned printed-circuit board. The via-hole/contact joints can be inspected visually and can be easily unsoldered later. The square hole in the middle of the board saver is sized to accommodate the FPGA, and the thickness of the board saver is the same as that of the FPGA. Hence, when a non-final FPGA is placed in the square hole, the combination of the non-final FPGA and the board saver occupy no more area and thickness than would a final FPGA soldered directly into its designated position on the first-mentioned circuit board. The contact leads of a non-final FPGA are not bent and are soldered, at the top of the board saver, to the corresponding via holes. A non-final FPGA can readily be unsoldered from the board saver and replaced by another one. Once the final FPGA design has been determined, the board saver can be unsoldered from the contact pads on the first-mentioned printed-circuit board and replaced by the final FPGA.
Berkun, Andrew↗
Silicon Wafer-Scale Substrate for Microshutters and Detector Arrays
The silicon substrate carrier was created so that a large-area array (in this case 62,000+ elements of a microshutter array) and a variety of discrete passive and active devices could be mounted on a single board, similar to a printed circuit board. However, the density and number of interconnects far exceeds the capabilities of printed circuit board technology. To overcome this hurdle, a method was developed to fabricate this carrier out of silicon and implement silicon integrated circuit (IC) technology. This method achieves a large number of high-density metal interconnects; a 100-percent yield over a 6-in. (approximately equal to 15-cm) diameter wafer (one unit per wafer); a rigid, thermally compatible structure (all components and operating conditions) to cryogenic temperatures; re-workability and component replaceability, if required; and the ability to precisely cut large-area holes through the substrate. A method that would employ indium bump technology along with wafer-scale integration onto a silicon carrier was also developed. By establishing a silicon-based version of a printed circuit board, the objectives could be met with one solution. The silicon substrate would be 2 mm thick to survive the environmental loads of a launch. More than 2,300 metal traces and over 1,500 individual wire bonds are required. To mate the microshutter array to the silicon substrate, more than 10,000 indium bumps are required. A window was cut in the substrate to allow the light signal to pass through the substrate and reach the microshutter array. The substrate was also the receptacle for multiple unpackaged IC die wire-bonded directly to the substrate (thus conserving space over conventionally packaged die). Unique features of this technology include the implementation of a 2-mmthick silicon wafer to withstand extreme mechanical loads (from a rocket launch); integrated polysilicon resistor heaters directly on the substrate; the precise formation of an open aperture (approximately equal to 3x3cm) without any crack propagation; implementation of IR transmission blocking techniques; and compatibility with indium bump bonding. Although designed for the microshutter arrays for the NIRSpec instrument on the James Webb Space Telescope, these substrates can be linked to microshutter applications in the photomask generation and stepper equipment used to make ICs and microelectromechanical system (MEMS) devices.
Jhabvala, Murzy↗
Inexpensive Implementation of Many Strain Gauges
It has been proposed to develop arrays of strain gauges as arrays of ordinary metal film resistors and associated electronic readout circuitry on printed circuit boards or other suitable substrates. This proposal is a by-product of a development of instrumentation utilizing metal film resistors on printed-circuit boards to measure temperatures at multiple locations. In the course of that development, it was observed that in addition to being sensitive to temperature, the metal film resistors were also sensitive to strains in the printed-circuit boards to which they were attached. Because of the low cost of ordinary metal film resistors (typically <$0.01 apiece at 2007 prices), the proposal could enable inexpensive implementation of arrays of many (e.g., 100 or more) strain gauges, possibly concentrated in small areas. For example, such an array could be designed for use as a computer keyboard with no moving parts, as a device for sensing the shape of an object resting on a surface, or as a device for measuring strains at many points on a mirror, a fuel tank, an airplane wing, or other large object. Ordinarily, the effect of strain on resistance would be regarded as a nuisance in a temperature-measuring application, and the effect of temperature on resistance would be regarded as a nuisance in a strain-measuring application. The strain-induced changes in resistance of the metal film resistors in question are less than those of films in traditional strain gauges. The main novel aspect of present proposal lies in the use of circuitry affording sufficient sensitivity to measure strain plus means for compensating for the effect of temperature. For an array of metal film resistors used as proposed, the readout circuits would include a high-accuracy analog-to-digital converter fed by a low noise current source, amplifier chain, and an analog multiplexer chain. Corrections would be provided by use of high-accuracy calibration resistors and a temperature sensor. By use of such readout circuitry, it would be possible to read the resistances of as many as 100 fixed resistors in a time interval of 1 second at a resolution much greater than 16 bits. The readout data would be processed, along with temperature calibration data, to deduce the strain on the printed-circuit board or other substrate in the areas around the resistors. It should also be possible to also deduce the temperature from the readings.
Berkun, Andrew C.↗
Factors in designing printed circuits for space
Guide for designing printed circuits and circuit boards
HANDBOOK↗
Industrial Applications of Graphite Fluoride Fibers
Based on fluorination technology developed during 1934 to 1959, and the fiber technology developed during the 1970s, a new process was developed to produce graphite fluoride fibers. In the process, pitch based graphitized carbon fibers are at first intercalated and deintercalated several times by bromine and iodine, followed by several cycles of nitrogen heating and fluorination at 350 to 370 C. Electrical, mechanical, and thermal properties of this fiber depend on the fluorination process and the fluorine content of the graphite fluoride product. However, these properties are between those of graphite and those of PTFE (Teflon). Therefore, it is considered to be a semiplastic. The physical properties suggest that this new material may have many new and unexplored applications. For example, it can be a thermally conductive electrical insulator. Its coefficient of thermal expansion (CTE) can be adjusted to match that of silicon, and therefore, it can be a heat sinking printed circuit board which is CTE compatible with silicon. Using these fibers in printed circuit boards may provide improved electrical performance and reliability of the electronics on the board over existing designs. Also, since it releases fluorine at 300 C or higher, it can be used as a material to store fluorine and to conduct fluorination. This application may simplify the fluorination process and reduce the risk of handling fluorine.
Hung, Ching-Cheh↗
Application of PoF Based Virtual Qualification Methods for Reliability Assessment of Mission Critical PCBs
Reliability is the ability of a product to perform the function for which it was intended for a specified period of time (or cycles) for a given set of life cycle conditions. In today's compressed mission development cycles where designing, building and testing the physical models has to occur in a matter of months not years, Projects don't have the luxury of iteratively building and testing those models. Physics of failure (PoF) is an engineering-based approach to reliability that begins with an understanding of materials, processes, physical interactions, degradation and failure mechanisms, as well as identifying failure models. The PoF approach uses modeling and simulation to qualify a design and manufacturing process, with the ultimate intent of eliminating failures early in the design process by addressing the root cause. The physics-of-failure analysis proactively incorporates reliability into the design process by establishing a scientific basis for evaluating new materials, structures and technologies. Virtual physics-of-failure modeling allows engineers to determine if new technological node can be added to an existing system. This presentation will illustrate an application of a PoF based tool during the initial phases of a printed circuit board assembly development and how the NASA GSFC team was able to dynamically study the effects of electronics parts and printed circuit board material configuration changes under simulated thermal and vibrational stresses.
Physics of Failure↗
Advanced sensor systems for biotelemetry
The present invention relates to telemetry-based sensing systems that continuously measures physical, chemical and biological parameters. More specifically, these sensing systems comprise a small, modular, low-power implantable biotelemetry system capable of continuously sensing physiological characteristics using implantable transmitters, a receiver, and a data acquisition system to analyze and record the transmitted signal over several months. The preferred embodiment is a preterm labor and fetal monitoring system. Key features of the invention include Pulse Interval Modulation (PIM) that is used to send temperature and pressure information out of the biological environment. The RF carrier frequency is 174-216 MHz and a pair of RF bursts (pulses) is transmitted at a frequency of about 1-2 Hz. The transmission range is 3 to 10 feet, depending on the position of the transmitter in the body and its biological environment. The entire transmitter is encapsulated in biocompatible silicone rubber. Power is supplied by on-board silver-oxide batteries. The average power consumption of the current design is less than 30 .mu.W., which yields a lifetime of approximately 6-9 months. Chip-on-Board technology (COB) drastically reduces the size of the printed circuit board from 38.times.28 mm to 22.times.8 mm. Unpackaged dies are flip-chip bonded directly onto the printed circuit board, along with surface mount resistors and capacitors. The invention can monitor additional physiological parameters including, but not limited to, ECG, blood gases, glucose, and ions such as calcium, potassium, and sodium.
Hines, John W.↗
Application of PoF Based Virtual Qualification Methods for Reliability Assessment of Mission Critical PCBs
Reliability is the ability of a product to perform the function for which it was intended for a specified period of time (or cycles) for a given set of life cycle conditions. In today's compressed mission development cycles where designing, building and testing the physical models has to occur in a matter of months not years, Projects don't have the luxury of iteratively building and testing those models. Physics of failure (PoF) is an engineering-based approach to reliability that begins with an understanding of materials, processes, physical interactions, degradation and failure mechanisms, as well as identifying failure models. The PoF approach uses modeling and simulation to qualify a design and manufacturing process, with the ultimate intent of eliminating failures early in the design process by addressing the root cause. The physics-of-failure analysis proactively incorporates reliability into the design process by establishing a scientific basis for evaluating new materials, structures and technologies. Virtual physics-of-failure modeling allows engineers to determine if new technological node can be added to an existing system. This presentation will illustrate an application of a PoF based tool during the initial phases of a printed circuit board assembly development and how the NASA GSFC team was able to dynamically study the effects of electronics parts and printed circuit board material configuration changes under simulated thermal and vibrational stresses
Electronics packaging↗
Advanced Sensor Systems for Biotelemetry
The present invention relates to telemetry-based sensing systems that continuously measures physical, chemical and biological parameters. More specifically, these sensing systems comprise a small, modular, low-power implantable biotelemetry system capable of continuously sensing physiological characteristics using implantable transmitters, a receiver, and a data acquisition system to analyze and record the transmitted signal over several months. The preferred embodiment is a preterm labor and fetal monitoring system. Key features of the invention include Pulse Interval Modulation (PIM) that is used to send temperature and pressure information out of the biological environment. The RF carrier frequency is 174-216 MHz and a pair of RF bursts (pulses) is transmitted at a frequency of about 1-2 Hz. The transmission range is 3 to 10 feet, depending on the position of the transmitter in the body and its biological environment. The entire transmitter is encapsulated in biocompatible silicone rubber. Power is supplied by on-board silver-oxide batteries. The average power consumption of the current design is less than 30 microW, which yields a lifetime of approximately 6 - 9 months. Chip-on-Board technology (COB) drastically reduces the size of the printed circuit board from 38 x 28 mm to 22 x 8 mm. Unpackaged dies are flip-chip bonded directly onto the printed circuit board, along with surface mount resistors and capacitors. The invention can monitor additional physiological parameters including, but not limited to, ECG, blood gases, glucose, and ions such as calcium, potassium, and sodium.
Hines, John W.↗
Hand tool bends component leads accurately
Hand-operated die set bends, without damage, electrical component leads to perfectly match holes in printed circuit board. This tool speeds up printed circuit fabrication and reduces the number of component rejections.
Source record↗
Radial/Axial Microwave Power Divider/Combiner
Parts made on printed-circuit boards. Impedance-matching and power-dividing transmission-line strips formed on insulation disks and on board by printed-circuit techniques. Power from input transmission line sent equally through radial output conductors to radial output transmission lines and/or coupled in varying degrees to axial output transmission line.
Vaddiparty, Verriah P.↗
Unitary Shaft-Angle and Shaft-Speed Sensor Assemblies
The figure depicts a unit that contains a rotary-position or a rotary-speed sensor, plus electronic circuitry necessary for its operation, all enclosed in a single housing with a shaft for coupling to an external rotary machine. This rotation sensor unit is complete: when its shaft is mechanically connected to that of the rotary machine and it is supplied with electric power, it generates an output signal directly indicative of the rotary position or speed, without need for additional processing by other circuitry. The incorporation of all of the necessary excitatory and readout circuitry into the housing (in contradistinction to using externally located excitatory and/or readout circuitry) in a compact arrangement is the major difference between this unit and prior rotation-sensor units. The sensor assembly inside the housing includes excitatory and readout integrated circuits mounted on a circular printed-circuit board. In a typical case in which the angle or speed transducer(s) utilize electromagnetic induction, the assembly also includes another circular printed-circuit board on which the transducer windings are mounted. A sheet of high-magnetic permeability metal ("mu metal") is placed between the winding board and the electronic-circuit board to prevent spurious coupling of excitatory signals from the transducer windings to the readout circuits. The housing and most of the other mechanical hardware can be common to a variety of different sensor designs. Hence, the unit can be configured to generate any of variety of outputs by changing the interior sensor assembly. For example, the sensor assembly could contain an analog tachometer circuit that generates an output proportional (in both magnitude and sign or in magnitude only) to the speed of rotation.
Alhorn, Dean C.↗
Investigation of the development of cracks in solder joints
Study consisted of an analytical approach, in which a mathematical model of existing printed circuit board component mounting techniques was analyzed, and an empirical investigation was performed to determine the extent of damage caused by temperature cycling of the printed circuit boards.
Moore, R. L.↗
Demonstrating the Effect of Particle Impact Dampers on the Random Vibration Response and Fatigue Life of Printed Wiring Assemblies
In a recent experimental study, small Particle Impact Dampers (PID) were bonded directly to the surface of printed circuit board (PCB) or printed wiring assemblies (PWA), reducing the random vibration response and increasing the fatigue life. This study provides data verifying practicality of this approach. The measured peak strain and acceleration response of the fundamental out of plane bending mode was significantly attenuated by adding a PID device. Attenuation of this mode is most relevant to the fatigue life of a PWA because the local relative displacements between the board and the supported components, which ultimately cause fatigue failures of the electrical leads of the board-mounted components are dominated by this mode. Applying PID damping at the board-level of assembly provides mitigation with a very small mass impact, especially as compared to isolation at an avionics box or shelf level of assembly. When compared with other mitigation techniques at the PWA level (board thickness, stiffeners, constrained layer damping), a compact PID device has the additional advantage of not needing to be an integral part of the design. A PID can simply be bonded to heritage or commercial off the shelf (COTS) hardware to facilitate its use in environments beyond which it was originally qualified. Finite element analysis and test results show that the beneficial effect is not localized and that the attenuation is not due to the simple addition of mass. No significant, detrimental reduction in frequency was observed. Side-by-side life testing of damped and un-damped boards at two different thicknesses (0.070" and 0.090") has shown that the addition of a PID was much more significant to the fatigue life than increasing the thickness. High speed video, accelerometer, and strain measurements have been collected to correlate with analytical results.
Knight, Brent↗
Testing Services
Trace Laboratories is an independent testing laboratory specializing in testing printed circuit boards, automotive products and military hardware. Technical information from NASA Tech Briefs and two subsequent JPL Technical Support packages have assisted Trace in testing surface insulation resistance on printed circuit board materials. Testing time was reduced and customer service was improved because of Jet Propulsion Laboratory technical support packages.
Source record↗