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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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90 records · Page 5
All sourcesNASA NTRSDOE OSTI
DOE OSTI2023

Bidirectional Three-phase Current Source Converter based Buck-boost AC/DC System using Bidirectional Switches

The 1.2 kV 4H-SiC BiDirectional Field Effect Transistor (BiDFET) is the first monolithic SiC bidirectional switch, which offers a lower voltage drop and semiconductor devices count alternative to the reverse-voltage-blocking (RB) switch used in the current-source converters (CSC). The bidirectional switch based CSC also allows DC-link current reversal for bidirectional power flow and provides multiple system-level benefits in a buck-boost AC/DC system consisting of buck-type DC/DC converter and CSC. This paper discusses the selection of buck converter duty cycle and CSC modulation index for the system’s buck-boost operation with a wide variation in DC voltage. CSC modulation schemes categorized based on the number of hard-turn-on transitions per switching cycle are also analyzed along with the three-step and four-step commutation schemes that are essential for the CSC commutation cells. Finally, the different schemes are evaluated and compared through the experimental results of a 10 kW, 480 VRMS, LL/ (400 − 800) V AC/DC system.

Bidirectional switches, four-quadrant switches, cu↗
DOE OSTI2021

Switching Characteristics of a 1.2 kV, 50 mΩ SiC Monolithic Bidirectional Field Effect Transistor (BiDFET) with Integrated JBS Diodes

—The switching performance of large area (1cm x 1cm) monolithic 1.2 kV 50 mΩ 4H-SiC bidirectional field effect transistor (BiDFET) with integrated JBS diodes is reported for the first time. The devices were fabricated in a 6-inch commercial foundry and then packaged in a custom-designed four-terminal module. The switching performance of the BiDFET has been observed to be 1.4x better than that of its internal JBSFETs. Dynamic characterization was performed at 800 V with different gate resistances, current levels and case temperatures. An increase in switching losses was observed for the BiDFET with increasing gate resistance and current level as observed for SiC power MOSFETs. The BiDFET showed a 9% reduction in total switching loss from 25 °C to 150 °C with a current of 10 A.

Silicon Carbide, Monolithic, Bidirectional, FourQu↗
DOE OSTI2022

An Inrush Current Limiting Method for Grid-Connected Converters Considering Grid Voltage Disturbances

To support the electric power grid, some grid-connected converters are required to ride through abnormal grid conditions, including voltage disturbances. However, at the moment, when a grid voltage disturbance happens, a large inrush current could be induced due to the large difference between the grid and converter output pulsewidth modulation (PWM) voltages. This inrush current could be more severe in the faster switching SiC-based multilevel converter, which only needs a small filter inductance to meet its normal operation requirements, such as harmonics and peak ripple currents. In this article, a PWM mask method is used to limit the inrush current. With this method, the inrush current can be effectively limited to a preset value and can help the converter ride through grid voltage disturbances. Furthermore, the method is validated through experiments conducted on a single-phase SiC-based five-level converter considering low voltage, high voltage, and phase angle disturbances.

42 ENGINEERING↗
DOE OSTI2022

Comparative Analysis of Direct and Indirect Cooling of Wide-Bandgap Power Modules and Performance Enhancement of Jet Impingement-Based Direct Substrate Cooling

With the development of high-power and high-torque machines, requirements for high-power density electronics are increasing. Thermal management of such systems requires high heat extraction. Conventional air cooling based heat sinks and cold plate based liquid cooling have their own benefits for various applications but has limitations for high power density applications. The current study explores a jet impingement based direct substrate cooling system that was implemented for a SiC based direct bonded Cu substrate for various power losses. Numerical comparison between jet impingement cooling and conventional horizontal/indirect cooling (pin fin heat sink and genetic algorithm-optimized heat sink) showed that the area weighted average of the heat transfer coefficient (HTC) is high for both horizontal cooling designs, and the local HTC is higher for jet impingement. Design iterations were undertaken to resolve the bottleneck of this cooling system. Increasing the number of nozzles helped to cover more area at the direct bonded Cu bottom plate, which drops the chip temperature considerably. With a constant flow rate, increasing the number of nozzles would decrease local jet velocity, which reduces the heat extraction by jet impingement. This issue can be addressed by reducing the diameter of nozzle but doing so results in a high pressure drop where the design constraint is 2 psi. A flared nozzle design is proposed, which has a higher spreading angle of the jet that increases the flow coverage and reduces the pressure drop of the coolant loop.

Barua, Himel↗
DOE OSTI2020

Soft Switching Over the Entire Line Cycle for a Quadruple Active Bridge DCX in a DC to Three-Phase AC Module

This paper is focused on a transformer-isolated quadruple active bridge (QAB) dc-dc converter loaded by three full-bridge dc-ac inverters. The QAB functions as a "DC trans-former" (DCX) in the dc-to-three-phase ac module. The QAB outputs provide time-varying power at twice the line frequency, which presents challenges in maintaining zero voltage switching (ZVS) on the secondary sides during low-power portions of the line cycle. It is shown how ZVS can be achieved in a phase, even at zero-power transfer, using a relatively small circulating current provided by the magnetizing inductance of the high-frequency transformer. The approach is particularly effective in high-voltage applications using SiC MOSFETs, where reductions in switching loss outweigh additional conduction losses due to the circulating currents. A detailed analysis of ZVS switching waveforms at the zero power transfer is presented, including effects of nonlinear device capacitances. Analytical expressions are given for the optimal values of the magnetizing inductance and dead times of the QAB primary and secondary bridges. The approach is verified by experimental results on a 600 V, 4 kW prototype, demonstrating greater than 98.5% efficiency from 1 kW to 4 kW, with a peak efficiency of 99.0%. Compared to conventionally operated prototype, a 54% reduction in total loss is achieved at rated power.

41 EE - Solar Energy Technologies Office (EE-4S)↗
DOE OSTI2022

Device Voltage Stress from Ground Leakage Current in Medium-Voltage Solid-State Transformer

Grounding related issues are critical for safe and reliable operation of solid-state transformer (SST) in medium-voltage (MV) applications, e.g., solar photovoltaic and energy storage integration, date center, electric vehicle fast charging, etc. This article presents for the first time the issue of additional device voltage stress due to grounding-loop current in current-source SST, using the soft-switching solid-state transformer (S4T) as an example. The S4T features single-stage isolated AC-AC, AC-DC, or DC-DC conversion with full-range ZVS, derived from flyback converter or current-source converter (CSC). However, the flyback operation for CSC-based SST means that magnetizing current flows through the reverse-blocking devices on only one side of the medium-frequency transformer (MFT) at a time. Then, the voltages across the devices, especially those on the other side of the MFT, can be influenced by parasitic current. A parasitic model of a modular S4T (M-S4T) prototype is developed from direct measurements and datasheets. Using the developed parasitic model and equivalent circuits, the causes of the voltage stress are analyzed. A voltage-stress mitigation scheme of connecting additional grounding capacitors is proposed. Damping resistors are also installed to damp out the grounding-loop resonance. A robust parameter design of the proposed scheme is given. The existence of the voltage stress issue and the effectiveness of the proposed scheme are verified experimentally on an MV SiC M-S4T prototype with inherent parameter variations among the five modules in the prototype. Here, both single-module and stacked-module operation are demonstrated during steady state and dynamic conditions up to 4 kV peak.

42 ENGINEERING↗
DOE OSTI2021

Performance Evaluation and Loss Modeling of WBG Devices based on a Novel Double-Pulse Test Method for Current Source Inverter

Careful measurements of the power device characteristics are necessary to accurately estimate a power converter's losses and efficiency. The conventional double-pulse test (DPT) circuit is a well-known method to implement this laboratory characterization of power devices and power modules. However, the switching characteristics of a power device depend on the power electronics circuit in which it is connected as well as the power circuit's physical layout, in addition to the device's internal structure. Hence, the conventional DPT circuit configuration, which is tailored for a standard voltage-source inverter (VSI), is not well-suited for a current-source inverter (CSI). This paper demonstrates a previously-proposed CSI-based DPT measurement technique that is appropriate for normal CSI operation. The characteristics of SiC MOSFETs and series-connected SiC Schottky diodes used in a CSI are measured using this improved technique while taking temperature effects into account to yield more accurate loss predictions. The CSI losses, including the switching and conduction losses of SiC MOSFETs and SiC Schottky diodes, have been modeled using this approach. The total CSI losses and efficiency have been estimated based on the CSI DPT results and loss models.

42 ENGINEERING↗
DOE OSTI2023

Isolated Single-stage Three-phase AC/DC Converter using Bidirectional Switches

The advent of the SiC Bidirectional FET (BiDFET), a monolithic 1.2 kV bidirectional switch, has rendered the single-stage three-phase AC/DC converter topology a promising approach for implementing AC/DC converters. This topology, which integrates a full-bridge converter with a single-phase to three-phase matrix converter via a high-frequency transformer, is particularly suitable for applications requiring galvanic isolation, buck-boost functionality, and bidirectional power flow. The single-stage design eliminates the need for bulky and unreliable electrolytic capacitors, and utilizes a single magnetic component for power transfer. In the matrix converter, bidirectional switches, which were traditionally implemented using combinations of multiple semiconductor devices such as MOSFETs, IGBTs, and diodes, can now be realized using the single-chip solution, BiDFET. This advancement leads to a lower switch count, compact converter implementation, with lower inductance commutation cells, thereby enhancing the overall efficiency and compactness of the system. The paper presents a unified model of the converter, considering all control parameters, including the duty cycles and phase shift of transformer voltages. Detailed expressions for power transfer, transformer currents, and currents at AC and DC ports are provided. Additionally, the paper outlines the conditions necessary for soft-switching of all switches and the commutation schemes required for the practical implementation of the matrix converter modulation scheme. A hardware prototype of a 10 kW, 480 VRMS, LL/ 800 V AC/DC system has been developed, and experimental results are presented to demonstrate its performance.

BiDFET↗
DOE OSTI2026

MODEL DEVELOPMENT AND VERIFICATION OF A 1,350°C AIR RECEIVER TEST SYSTEM

Open-loop volumetric receivers work with air at atmospheric pressure and are suitable for single-cycle or multicycle power plants. A novel additively manufactured (AM) silicon carbide (SiC), ceramic matrix composite (CMC) volumetric receiver was developed that consisted of a lattice structure, which absorbs solar radiation and converts it into heat energy. Heat energy from the porous receiver was transferred to heated ambient air. The receiver acted as a convective heat exchanger, transferring heat to the fluid through convection. Engineering was facilitated to develop a high-temperature air receiver test bed at Sandia national Laboratories (SNL) capable of demonstrating a 50kWth open-loop volumetric SiC air receiver module developed by General Electric Aerospace Research (GE Aerospace). This paper presents the development of the high temperature AM SiC-CMC air receiver, the test bed, and the first testing operations of this device, which was experimentally demonstrated to achieve 1,350°C for over 3.5 hours of operation, based on input flux levels of 67–91 W/cm2 0.5-2.5 kg/s flow rates. From the test campaign results, based on the measured convective heat transfer to the airflow and bounded radiative-loss assumptions, the solar-thermal efficiency of HOTSSTAR test module was estimated to be approximately as high as 74% for representative test conditions.

14 SOLAR ENERGY↗
DOE OSTI2022

7.2 kV Three-Port SiC Single-Stage Current-Source Solid-State Transformer With 90 kV Lightning Protection

This article proposes a multiport modular single-stage current-source solid-state transformer (SST) for applications like photovoltaic, energy storage integration, electric vehicle fast charging, data center, etc. The 7.2 kV 50 kVA current-source SST consists of five input-series output-parallel modules, each based on 3.3 kV SiC reverse-blocking MOSFET-plus-diode modules. The proposed SST has some unique features. First, compared to the voltage-source or matrix converter-based SSTs, the current-source SST has a unique advantage of single-stage isolated AC/DC or AC/AC conversion with an inductive DC link, but no medium-voltage (MV) AC experiments have been reported. This article for the first time demonstrates MV AC current-source SST up to 7.5 kV peak. Second, the multiport SST has a buffer port for active power decoupling (APD) or energy storage integration. The double-line-frequency power ripple from single-phase AC grid normally results in a large capacitor size in MV SSTs. The APD scheme is proposed in MV applications for the first time to enable a reduced DC link and the electrolytic capacitor-less SST with high reliability. Third, as a direct grid-connected converter without line-frequency transformer, insulation and protection are critical. A medium-frequency transformer design passes 55 kV basic-insulation level (BIL) and 60 kV high potential dielectrics withstand test with only 0.09% leakage inductance. Importantly, a lightning protection scheme is presented to protect the SST itself from 90 kV BIL impulse. Fourth, the proposed current-source SST topology is a modular soft-switching solid-state transformer (M-S4T) with full-range zero-voltage switching and controlled dv/dt for low electromagnetic interference. Furthermore, these concepts are verified in a three-port M-S4T prototype with forced oil cooling under single-module, stacked-module, steady-state, and dynamic operations.

14 SOLAR ENERGY↗
DOE OSTI2021

Design and Optimization of a 200-kW Medium-Frequency Transformer for Medium-Voltage SiC PV Inverters

This paper presents a design and optimization methodology for a 200-kW medium-frequency transformer (MFT) based on low-loss magnetic core (FINEMET FT-3TL). The proposed optimal design methodology consists of predesign, preliminary design, and optimal design. In the preliminary design, the parallel-concentric winding structure is selected to increase the current carrying capability and reduce the leakage inductance. Based on the parallel-concentric winding concept, a novel cooing and insulation structure with 3-D printed bobbins are proposed. The optimal designed MFT prototype achieves a power density higher than 19.23 kW/L. The electrical insulation system is tested at 12 kV ac peak voltage. In addition, the partial discharge (PD) test is conducted at 7.5 kV ac peak voltage to ensure the PD-free design. The high-frequency bipolar pulsewidth modulation voltage insulation (PD) test is the first time applied in MFT design and test process. Finally, the transformer is applied in a dual-active-bridge (DAB) converter with 200 kW rated power. The peak efficiency of the DAB converter is 99.53%, and the efficiency at 200 kW is 98.85%. The peak efficiency of MFT is 99.844%, and the efficiency at 200 kW is 99.842%.

42 ENGINEERING↗
DOE OSTI2025

Design, Fabrication and On-Sun Performance Evaluation of SiC Receiver Feature Specimens for CST Applications Using Additively Manufactured SiC Materials

Increasing operating temperatures of solar receivers is paramount to the efficiency of concentrated solar thermal (CST) and solar power (CSP) systems. Successful development of CST systems to generate heat for industrial applications requires significant increase in temperature capability and techno-economically viability of the receiver systems. Supported by an award from the Solar Technology Office (SETO), US Department of Energy (DOE), GE Aerospace Research in collaboration with Heliogen Holdings Inc and Sandia National Lab, is engaged in the development of ultra-High Operating Temperature SiC-matrix Solar Thermal Air Receiver (HOTSSTAR) enabled by additive manufacturing. The program objective is to demonstrate SiC receiver with air exit temperatures up to 1100 oC and high thermal efficiencies. We report design, fabrication and on-sun test results of SiC components of a prototype 50kW (thermal) HOTSSTAR module. The receiver module architecture is based on a radial airflow design and consists of a series of radial SiC receiver sectors organized around a SiC center absorber. The SiC components are fabricated using binder-jet printed SiC followed by melt-infiltration reaction bonding process. To enhance the reliability and to minimize the risk of cracking damage of SiC test articles in thermal gradient and thermal shock environment of the application, the components were laminated with GE’s MI SiC-SiC CMC. Following extensive design and lab test analyses, selected SiC component designs are tested at Heliogen Lancaster Solar field under highly concentrated solar fluxes around 2000 suns to assess the thermal performance characteristics under realistic field conditions. We report on the test results and compare the thermal performances of different HOTSSTAR SiC absorbers. Finally, we discuss fabrication and initial assembly of a 50kW prototype test module in preparation of on-sun field tests to assess the performance of our final design.

CST, CSP, high temperature, air receiver, SiC, add↗
DOE OSTI2020

Busbar Design and Optimization for Voltage Overshoot Mitigation of a Silicon Carbide High-Power Three-Phase T-Type Inverter

The silicon carbide (SiC) devices have faster switching speed than that of the conventional silicon (Si) devices, which however may cause excessive device voltage overshoot. Larger gate resistance can help to restrain the overshoot, it however slows down the switching speed and increases switching losses. There are other methods that can mitigate the voltage overshoot, e.g., using low-inductance busbars, adding snubber circuits, etc. In this article, the busbar design for a 250-kW SiC three-level T-type inverter is investigated. The current commutation loops (CCLs) are first analyzed using a single-phase equivalent circuit. Then the detailed busbar design methods, especially a 3-D busbar design concept, are proposed to select the optimal stacking order for the multilayer laminated busbar and to address constraints posed by the physical terminal arrangements of SiC modules and dc-link capacitors. The stray inductance in each CCL is extracted via a finite element analysis and validated on the actual inverter busbar prototypes using an impedance analyzer. To further minimize the busbar stray inductance, a hybrid busbar structure with printed circuit board based buffer circuit using high-frequency decoupling capacitors is designed and evaluated in this article. Lastly, the effectiveness of the designed busbars as well as the buffer circuit are validated using experimental studies.

42 ENGINEERING↗
DOE OSTI2020

Methodology of Low Inductance Busbar Design for Three-Level Converters

Three-level (3L) converters are more susceptible to parasitics compared with two-level converters because of their complicated structure with multiple switching loops. In this article, the methodology of busbar layout design for 3L converters based on the magnetic cancellation effect is presented. The methodology can fit for 3L converters with symmetric and asymmetric configurations. A detailed design example is provided for a high-power 3L-active neutral point clamped (ANPC) converter, which includes the module selection, busbar layout, and dc-link capacitor placement. The loop inductance of the busbar is verified with simulation, impedance measurements, and converter experiments. Furthermore, the results match with each other, and the inductances of short and long loops are 6.5 and 17.5 nH, respectively, which are significantly lower than the busbars of NPC-type converters in other references.

42 ENGINEERING↗
DOE OSTI2021

Stacked Low-Inertia Converter or Solid-State Transformer: Modeling and Model Predictive Priority-Shifting Control for Voltage Balance

This paper presents control challenges of stacked low-inertia converter (SLIC) or cascaded reduced dc-link solid-state transformer (SST) and proposes a novel model predictive priority-shifting (MPPS) control with implicit modulator and a discrete-time large-signal model for voltage balancing and dc-link regulation. Low-inertia converters, featuring small electrolytic capacitor-less dc links, dramatically reduce cost, size, and weight compared to conventional solutions. However, without a large dc-link buffer, the input and output are tightly coupled, leading to significant control challenges. The control becomes even more challenging with these converters stacked input-series output-parallel (ISOP) for medium-voltage (MV) grid, which causes coupling between the modules besides the coupling within each module. This paper analyzes the multi-objective, multi-degree of freedom control problem, using the modular soft-switching solid-state transformer (M-S4T) as an example of the SLIC. First, distribution of control efforts under controller saturation is critical because multiple control objectives can be conflicting, especially when the module voltages are unbalanced and are being restored. The MPPS can shift the priorities to address this issue. Second, due to the low inertia and high dc-link ripple, classic space vector pulse-width modulation (SVPWM), average model with small-ripple assumption, and control design based on small-signal model cannot accurately modulate, model, and control the nonlinear reduced dc link. Therefore, a discrete-time large-signal model of the M-S4T is established to derive the predictive control in the MPPS. The MPPS and the PI control are compared in MV simulations to show the issue of applying the PI to the SLIC and the effectiveness of the MPPS for voltage balancing and dc-link regulation in a deadbeat manner. Finally, the proposed control is tested on a 5 kV ISOP SiC SST prototype to verify priority shifting to address controller saturation issue and fast and robust voltage balancing.

14 SOLAR ENERGY↗
DOE OSTI2022

Predictive Direct DC-Link Control for 7.2 kV Three-Port Low-Inertia Solid-State Transformer With Active Power Decoupling

Promising for applications including renewable energy and electric vehicle fast charging, a medium-voltage (MV) solid-state transformer (SST) typically has multiple modules series stacked, which requires the modules to be single phase. One critical issue of the single-phase SST is the double-line-frequency power ripple. Traditionally, large passives are used to buffer the ripple, resulting in significantly increased volume and cost. This article for the first time proposes active power decoupling (APD) for the SST and a predictive direct DC-link control method, using a current-source single-stage SST as an example. An electrolytic capacitor-less buffer port is used to absorb the ripple, which tolerates up to a 30% voltage ripple for small capacitance. The APD SST control is challenging. First, the current-source SST realizes isolation, DC link, and multiport in a single stage. Second, different from conventional SSTs or APD converters, the low-inertia DC link in this SST has a 40% switching ripple, which is difficult to stabilize. To address the control challenge, a direct DC-link control architecture and a predictive control method are proposed. Simulation and experimental results verify the proposed control method on an MV SiC modular soft-switching solid-state transformer (M-S4T) prototype. Here, the proposed APD reduces the SST volume by 53.8%. Importantly, the proposed concept is not limited to the M-S4T but is generic to other SSTs or APD converters.

14 SOLAR ENERGY↗
DOE OSTI2022

Multiport Control with Partial Power Processing in Solid-State Transformer for PV, Storage, and Fast-Charging Electric Vehicle Integration

This article proposes a multiport control method to enable partial power processing (PPP) in a medium-voltage (MV) multiport solid-state transformer (SST). MV multiport SSTs are promising in integrating low-voltage DC sources or loads such as solar photovoltaic, energy storage, and electric vehicles into smart grids without bulky line-frequency transformers. Compared to voltage-source SST, current-source (CS) SST features single-stage isolated bidirectional AC/AC, AC/DC, or DC/DC conversion using an inductive DC link. For a multiport CS SST, it is revealed in this article that the PPP capability can be enabled through the proposed control without extra hardware, different from the case of voltage-source converters where special hardware architecture is required for the PPP. With the PPP, most power exchange between LV ports is processed by only a fraction of the entire conversion stage, leading to reduced DC-link current, volume, loss, and improved efficiency. The proposed multiport PPP control scheme is analyzed to verify the advantages across a wide voltage and power range against conventional full power processing (FPP) multiport control, using the soft-switching solid-state transformer (S4T) with reduced conduction loss as an example. Comparative experimental results based on a SiC three-port S4T prototype verify the effectiveness of the proposed PPP scheme against the FPP scheme under both steady state and dynamic conditions. Here, the DC-link current reduction is measured to be more than 36%. Significantly, the proposed multiport PPP control scheme is generic and applicable to any hard-switching or soft-switching CS SSTs without extra hardware.

14 SOLAR ENERGY↗
DOE OSTI2023

Circulating Current Reduction of Back-to-Back MMC with Advanced Grid-Support Functionalities for Medium-Voltage Applications

A Lyapunov energy function based circulating current reduction scheme for a back to back modular multilevel converter based system for a microgrid application has been proposed in this digest. In order to ensure no circulating or zero sequence currents within the modules, the dynamics from one leg of the converter to the other are evaluated. A Lyapunov energy function is then developed and utilizing the circulating current dynamics of the converter the overall control law is implemented. In this digest a decentralized hierarchical control architecture has been implemented for the main current control; where the outer loop or the central controller implements the higher level grid interconnection functions as per IEEE 1547-2018 standards and the inner loop based on synchronous reference frame implements the current control architecture. The inner loops' outputs are the commanded converter voltages either on either side which are augmented by the Lyapunov energy function based circulating current suppression architecture. To evaluate the efficacy of the overall system, the overall system is modeled around a 300kVA back to back SiC multilevel modular converter used as a direct-connected medium voltage (MV) grid intertie based on MATLAB/Simulink domain. Several important case studies are presented in this paper to prove the effectiveness of the proposed architecture. case study results are presented.

circulating current↗