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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 91 records · Page 5
All sourcesNASA NTRSDOE OSTI
NASA NTRS2004

Advanced Infant Car Seat Would Increase Highway Safety

An advanced infant car seat has been proposed to increase highway safety by reducing the incidence of crying, fussy behavior, and other child-related distractions that divert an adult driver s attention from driving. In addition to a conventional infant car seat with safety restraints, the proposed advanced infant car seat would include a number of components and subsystems that would function together as a comprehensive infant-care system that would keep its occupant safe, comfortable, and entertained, and would enable the driver to monitor the baby without having to either stop the car or turn around to face the infant during driving. The system would include a vibrator with bulb switch to operate; the switch would double as a squeeze toy that would make its own specific sound. A music subsystem would include loudspeakers built into the seat plus digital and analog circuitry that would utilize plug-in memory modules to synthesize music or a variety of other sounds. The music subsystem would include a built-in sound generator that could synthesize white noise or a human heartbeat to calm the baby to sleep. A second bulb switch could be used to control the music subsystem and would double as a squeeze toy that would make a distinct sound. An anti-noise sound-suppression system would isolate the baby from potentially disturbing ambient external noises. This subsystem would include small microphones, placed near the baby s ears, to detect ambient noise. The outputs of the microphone would be amplified and fed to the loudspeakers at appropriate amplitude and in a phase opposite that of the detected ambient noise, such that the net ambient sound arriving at the baby s ears would be almost completely cancelled. A video-camera subsystem would enable the driver to monitor the baby visually while continuing to face forward. One or more portable miniature video cameras could be embedded in the side of the infant car seat (see figure) or in a flip-down handle. The outputs of the video cameras would be transmitted by radio or infrared to a portable, miniature receiver/video monitor unit that would be attached to the dashboard of the car. The video-camera subsystem can also be used within transmission/reception range when the seat was removed from the car. The system would include a biotelemetric and tracking subsystem, which would include a Global Positioning System receiver for measuring its location. This subsystem would transmit the location of the infant car seat (even if the seat were not in a car) along with such biometric data as the baby s heart rate, perspiration rate, urinary status, temperature, and rate of breathing. Upon detecting any anomalies in the biometric data, this subsystem would send a warning to a paging device installed in the car or carried by the driver, so that the driver could pull the car off the road to attend to the baby. A motion detector in this subsystem would send a warning if the infant car seat were to be moved or otherwise disturbed unexpectedly while the infant was seated in it: this warning function, in combination with the position- tracking function, could help in finding a baby who had been kidnapped with the seat. Removable rechargeable batteries would enable uninterrupted functioning of all parts of the system while transporting the baby to and from the car. The batteries could be recharged via the cigarette-lighter outlet in the car or by use of an external AC-powered charger.

Dabney, Richard↗
NASA NTRSDate not supplied

Upscaling of 500 °C Durable SiC JFET-R Integrated Circuits

At HiTEC2018, NASA Glenn Research Center reported the first demonstration of yearlong 500°C operation of ceramic-packaged “Generation 10” ~200-transistor integrated circuits (ICs) based on two-level interconnect silicon carbide (4H-SiC) junction field effect transistors and resistors (JFET-R). This HiTEC 2021submissionupdateson-going efforts at NASA Glenn spanning two subsequent prototype IC generations “11 and 12” to increase both complexity and durability of these ICs. Increased chip complexities of around 1000 transistors/chip for Gen. 11and near 3000 transistors/chip for Gen. 12 aremade possibleby reductions in minimum layout feature sizes (including resistorwidth shrinkage from 6 μm to 2μm) coupled with enlarged die size (from 3x3 mm to 5x5mm). Gen. 11 ICs electrically tested to date include an 8-bit delta-sigma analog to digital converter (ADC) as well as upscaled random access memory (RAM)and nearly 1 kbit read only memory (ROM). However, Gen. 11 prototype ICs exhibited significantly lower yield and durability than Gen. 10 ICs. Development of revised processing is being investigated towards mitigating these issues in subsequentGen. 12 fabrication runcurrentlyin progress.

Silicon Carbide↗
NASA NTRS1985

Fast Dual Analog-to-Digital Converter

Unit delivers blocks of quadrature data to computer memory. Contains 105 integrated circuit packages in 19 by 3 1/2 inch (48.26 by 8.39 cm) rack mounted drawer with internal force air blower. Intended for synchronous sampling of quadrature pairs of data, samples with minimal skew (about 10 nanoseconds) using video-type high-speed sampling technology. Unit equipped for computer controlled self-testing. Originally developed for planetary radar data-acquisition system.

Wallis, D. E.↗
NASA NTRS1984

Summary of workshop on the application of VLSI for robotic sensing

It was one of the objectives of the considered workshop to identify near, mid, and far-term applications of VLSI for robotic sensing and sensor data preprocessing. The workshop was also to indicate areas in which VLSI technology can provide immediate and future payoffs. A third objective is related to the promotion of dialog and collaborative efforts between research communities, industry, and government. The workshop was held on March 24-25, 1983. Conclusions and recommendations are discussed. Attention is given to the need for a pixel correction chip, an image sensor with 10,000 dynamic range, VLSI enhanced architectures, the need for a high-density serpentine memory, an LSI-tactile sensing program, an analog-signal preprocessor chip, a smart strain gage, a protective proximity envelope, a VLSI-proximity sensor program, a robot-net chip, and aspects of silicon micromechanics.

Brooks, T.↗
NASA NTRS1994

Instrument Records And Plays Back Acceleration Signals

Small, battery-powered, hand-held instrument feeds power to accelerometer and records time-varying component of output for 15 seconds in analog form. No power needed to maintain content of memory; memory chip removed after recording and stored indefinitely. Recorded signal plays back at any time up to several years later. Principal advantages: compactness, portability, and low cost.

Bozeman, Richard J.↗
NASA NTRS2011

Characteristics of Radio-Frequency Circuits Utilizing Ferroelectric Capacitors

Ferroelectric capacitors, most commonly used in memory circuits and variable components, were studied in simple analog radio-frequency circuits such as the RLC resonator and Colpitts oscillator. The goal was to characterize the RF circuits in terms of frequency of oscillation, gain, etc, using ferroelectric capacitors. Frequencies of oscillation of both circuits were measured and studied a more accurate resonant frequency can be obtained using the ferroelectric capacitors. Many experiments were conducted and data collected. A model to simulate the experimental results will be developed. Discrepancies in gain and frequency in these RF circuits when conventional capacitors are replaced with ferroelectric ones were studied. These results will enable circuit designers to anticipate the effects of using ferroelectric components in their radio- frequency applications.

Eskridge, Michael↗
NASA NTRS1991

Modeling the behavioral substrates of associate learning and memory - Adaptive neural models

Three adaptive single-neuron models based on neural analogies of behavior modification episodes are proposed, which attempt to bridge the gap between psychology and neurophysiology. The proposed models capture the predictive nature of Pavlovian conditioning, which is essential to the theory of adaptive/learning systems. The models learn to anticipate the occurrence of a conditioned response before the presence of a reinforcing stimulus when training is complete. Furthermore, each model can find the most nonredundant and earliest predictor of reinforcement. The behavior of the models accounts for several aspects of basic animal learning phenomena in Pavlovian conditioning beyond previous related models. Computer simulations show how well the models fit empirical data from various animal learning paradigms.

Lee, Chuen-Chien↗
NASA NTRSDate not supplied

Upscaling of 500 °C Durable SiC JFET-R Integrated Circuits

At HiTEC 2018, NASA Glenn Research Center reported the first demonstration of yearlong 500 °C operation of ceramic-packaged “Generation 10” ~200-transistor integrated circuits (ICs) based on two-level interconnect silicon carbide (4H-SiC) junction field effect transistors and resistors (JFET-R). This HiTEC 2021 submission updates on-going efforts at NASA Glenn spanning two subsequent prototype IC generations “11 and 12” to increase both complexity and durability of these ICs. Increased chip complexities of around 1000 transistors/chip for Gen. 11 and near 3000 transistors/chip for Gen. 12 are made possible by reductions in minimum layout feature sizes (including resistor width shrinkage from 6 µm to 2 µm) coupled with enlarged die size (from 3 x 3 mm to 5 x 5 mm). Gen. 11 ICs electrically tested to date include an 8-bit delta-sigma analog to digital converter (ADC) as well as upscaled random access memory (RAM) and nearly 1 kbit read only memory (ROM). However, Gen. 11 prototype ICs exhibited significantly lower yield and durability than Gen. 10 ICs. Development of revised processing is being investigated towards mitigating these issues in subsequent Gen. 12 fabrication run currently in progress.

silicon carbide↗
NASA NTRS1971

The automation of the stellar proper motion survey

A microdensitometer, scanning pairs of star plates of identical areas of the sky taken a decade apart, is coupled to a magnetic tape unit through a data acquisition system. This system performs an image density threshold level selection for each plate and a buffer memory system to smooth the data flow as well as analog and digital display controls. The data from the tape are processed later by a large scale high speed computer which reconstructs the scanned images, discovers, measures, and documents stellar proper motions by precise comparison of corresponding areas of the two star plates to detect those images which have moved at least 0.10 seconds annually in the time interval between the exposures.

Newcomb, J. S.↗
NASA NTRS1970

Digital input is buffered to real-time analog display

Buffering technique utilizes nine-bit binary counter and holding register of eight flip-flops. These flip-flops form the memory device that allows precise asynchronous conversion of the digital source data. Counter generates a waveform which is passed through a low pass filter to recover data in analog form.

Bower, K. F.↗
NASA NTRS1976

A memory-mapped output interface: Omega navigation output data from the JOLT (TM) microcomputer

A hardware interface which allows both digital and analog data output from the JOLT microcomputer is described in the context of a software-based Omega Navigation receiver. The interface hardware described is designed for output of six (or eight with simple extensions) bits of binary output in response to a memory store command from the microcomputer. The interface was produced in breadboard form and is operational as an evaluation aid for the software Omega receiver.

Lilley, R. W.↗
NASA NTRS1992

Experimental Optoelectronic Associative Memory

Optoelectronic associative memory responds to input image by displaying one of M remembered images. Which image to display determined by optoelectronic analog computation of resemblance between input image and each remembered image. Does not rely on precomputation and storage of outer-product synapse matrix. Size of memory needed to store and process images reduced.

Chao, Tien-Hsin↗
NASA NTRS1970

Computerized spectrum analysis

Automatic spectral data reduction and analysis system consisting of densitometer, analog-digital converter and IBM 1800 process computer with magnetic disk memory

Kylstra, C. D.↗
NASA NTRS1975

Integrating TV/digital data spectrograph system

A 25-mm vidicon camera was previously modified to allow operation in an integration mode for low-light-level astronomical work. The camera was then mated to a low-dispersion spectrograph for obtaining spectral information in the 400 to 750 nm range. A high speed digital video image system was utilized to digitize the analog video signal, place the information directly into computer-type memory, and record data on digital magnetic tape for permanent storage and subsequent analysis.

Duncan, B. J.↗
NASA NTRS1992

Analog hardware for delta-backpropagation neural networks

This is a fully parallel analog backpropagation learning processor which comprises a plurality of programmable resistive memory elements serving as synapse connections whose values can be weighted during learning with buffer amplifiers, summing circuits, and sample-and-hold circuits arranged in a plurality of neuron layers in accordance with delta-backpropagation algorithms modified so as to control weight changes due to circuit drift.

Eberhardt, Silvio P.↗
NASA NTRS2015

Processing and Prolonged 500 C Testing of 4H-SiC JFET Integrated Circuits with Two Levels of Metal Interconnect

Complex integrated circuit (IC) chips rely on more than one level of interconnect metallization for routing of electrical power and signals. This work reports the processing and testing of 4H-SiC junction field effect transistor (JFET) prototype ICs with two levels of metal interconnect capable of prolonged operation at 500 C. Packaged functional circuits including 3-and 11-stage ring oscillators, a 4-bit digital to analog converter, and a 4-bit address decoder and random access memory cell have been demonstrated at 500 C. A 3-stage oscillator functioned for over 3000 hours at 500 C in air ambient.

Silicon Carbide↗
NASA NTRS2015

Processing and Prolonged 500 C Testing of 4H-SiC JFET Integrated Circuits with Two Levels of Metal Interconnect

Complex integrated circuit (IC) chips rely on more than one level of interconnect metallization for routing of electrical power and signals. This work reports the processing and testing of 4H-SiC junction field effect transistor (JFET) prototype IC's with two levels of metal interconnect capable of prolonged operation at 500 C. Packaged functional circuits including 3- and 11-stage ring oscillators, a 4-bit digital to analog converter, and a 4-bit address decoder and random access memory cell have been demonstrated at 500 C. A 3-stage oscillator functioned for over 3000 hours at 500 C in air ambient. Improved reproducibility remains to be accomplished.

JFET↗
NASA NTRS2011

Virtual Sensor Test Instrumentation

Virtual Sensor Test Instrumentation is based on the concept of smart sensor technology for testing with intelligence needed to perform sell-diagnosis of health, and to participate in a hierarchy of health determination at sensor, process, and system levels. A virtual sensor test instrumentation consists of five elements: (1) a common sensor interface, (2) microprocessor, (3) wireless interface, (4) signal conditioning and ADC/DAC (analog-to-digital conversion/ digital-to-analog conversion), and (5) onboard EEPROM (electrically erasable programmable read-only memory) for metadata storage and executable software to create powerful, scalable, reconfigurable, and reliable embedded and distributed test instruments. In order to maximize the efficient data conversion through the smart sensor node, plug-and-play functionality is required to interface with traditional sensors to enhance their identity and capabilities for data processing and communications. Virtual sensor test instrumentation can be accessible wirelessly via a Network Capable Application Processor (NCAP) or a Smart Transducer Interlace Module (STIM) that may be managed under real-time rule engines for mission-critical applications. The transducer senses the physical quantity being measured and converts it into an electrical signal. The signal is fed to an A/D converter, and is ready for use by the processor to execute functional transformation based on the sensor characteristics stored in a Transducer Electronic Data Sheet (TEDS). Virtual sensor test instrumentation is built upon an open-system architecture with standardized protocol modules/stacks to interface with industry standards and commonly used software. One major benefit for deploying the virtual sensor test instrumentation is the ability, through a plug-and-play common interface, to convert raw sensor data in either analog or digital form, to an IEEE 1451 standard-based smart sensor, which has instructions to program sensors for a wide variety of functions. The sensor data is processed in a distributed fashion across the network, providing a large pool of resources in real time to meet stringent latency requirements.

Wang, Roy↗