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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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All sourcesNASA NTRSDOE OSTI
NASA NTRS2018

NASA Electronic Parts and Packaging (NEPP) Field Programmable Gate Array (FPGA) Single Event Effects (SEE) Test Guideline Update

The following are updated or new subjects added to the FPGA SEE Test Guidelines manual: academic versus mission specific device evaluation, single event latch-up (SEL) test and analysis, SEE response visibility enhancement during radiation testing, mitigation evaluation (embedded and user-implemented), unreliable design and its affects to SEE Data, testing flushable architectures versus non-flushable architectures, intellectual property core (IP Core) test and evaluation (addresses embedded and user-inserted), heavy-ion energy and linear energy transfer (LET) selection, proton versus heavy-ion testing, fault injection, mean fluence to failure analysis, and mission specific system-level single event upset (SEU) response prediction. Most sections within the guidelines manual provide information regarding best practices for test structure and test system development. The scope of this manual addresses academic versus mission specific device evaluation and visibility enhancement in IP Core testing.

Test guidelines↗
NASA NTRS2018

NASA Electronic Parts and Packaging Field Programmable Gate Array Single Event Effects Test Guideline Update

The following are updated or new subjects added to the FPGA SEE Test Guidelines manual: academic versus mission specific device evaluation, single event latch-up (SEL) test and analysis, SEE response visibility enhancement during radiation testing, mitigation evaluation (embedded and user-implemented), unreliable design and its affects to SEE Data, testing flushable architectures versus non-flushable architectures, intellectual property core (IP Core) test and evaluation (addresses embedded and user-inserted), heavy-ion energy and linear energy transfer (LET) selection, proton versus heavy-ion testing, fault injection, mean fluence to failure analysis, and mission specific system-level single event upset (SEU) response prediction. Most sections within the guidelines manual provide information regarding best practices for test structure and test system development. The scope of this manual addresses academic versus mission specific device evaluation and visibility enhancement in IP Core testing.

Field Programmable Gate Array (FPGA)↗
NASA NTRS2019

NASA Electronic Parts and Packaging (NEPP) Program Status and Technology Investments Overview

The presentation provides an updated, high-level overview of the NEPP Program. The latest organizational chart is presented that shows the names of the Program and Assistant Program Managers. Additionally, the recent work that is on-going with the updating of several NASA NPDs, NPRs and technical standards is reviewed. Internal and external organizational interfaces are described. Finally, the current technology focus areas are described. These areas include passives, wide-band gap power devices, processor units (CPUs and GPUs), 2.5D and 3D device architectures, memories, and data analytics.

NEPAG↗
NASA NTRS2020

Recommendations on Use of Commercial-Off-The-Shelf (COTS) Electrical, Electronic, and Electromechanical (EEE) Parts for NASA Missions

The NASA Electronic Parts & Packaging Program Manager, requested a NASA Engineering and Safety Center independent assessment to summarize Commercial Crew Program and NASA Centers’ current and best practices, and lessons learned, on use of commercial-off-the-shelf (COTS) for all mission risk classifications, and provide recommendations that could lead to future NASA Electronic Parts and Packaging Program and/or Agency guidance on COTS parts. This document contains the outcome of the assessment.

Commercial-Off-The-Shelf↗
NASA NTRS2015

NASA EEE Parts 2014 Year in Review

The NASA Electronic Parts and Packaging Program continue to support Electrical, Electronic and Electromagnetic Parts for the agency with an eventful year of workshops, innovations, testing and challenges.

electronic↗
NASA NTRS1999

EEE Links

The EEE Links Newsletter is a quarterly publication produced by Code 562 in support of the NASA HQ funded NASA Electronic Parts and Packaging (NEPP) Program. The newsletter is produced as an electronic format deliverable made available via the referenced www site administered by Code 562, The newsletter publishes brief articles on topics of interest to NASA programs and projects in the area of electronic parts and packaging. The newsletter does not provide information pertaining to patented or proprietary information. The information provided is at the level of that produced by industry and university researchers and is published at national and international conferences.

Humphrey, Robert↗
NASA NTRS2014

Advanced CMOS Radiation Effects Testing and Analysis

Presentation at the annual NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop (ETW). The material includes an update of progress in this NEPP task area over the past year, which includes testing, evaluation, and analysis of radiation effects data on the IBM 32 nm silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) process. The testing was conducted using test vehicles supplied by directly by IBM.

cmos↗
NASA NTRS2019

Standardizing Microprocessor and GPU Radiation Test Approaches

Microprocessor, Graphics Processing Units (GPUs) and DDRx memory devices have emerged as promising next-generation technologies that enables both high performance processing and acceleration of complex algorithms for the latest challenges in human spaceflight, autonomous vehicles and artificial intelligence (AI). The feature sets of these devices offer exponential increases to throughput, calculation capability and system autonomy when compared to legacy flight systems. NASA's Electronic Part and Packaging (NEPP) Program has conducted an investigation into the radiation susceptibility of leading edge devices and process technologies by establishing standardized test approaches. Unlike most discrete devices, these require state of the art test systems to induce specific hardware activity similar to application software, thus allowing the characterization of failure modes within the system. To best characterize the tested part, NEPP eliminates variables that may impact device performance under radiation. Simplification of remaining system-level variables leads to an improved understanding of complex computational devices and their intended applications. The failure modes and error signatures that are recorded during testing are used to determine radiation sensitivity of the semiconductor process and the microcode architecture of the design. This presentation will discuss the test methodology that NASA Electronic Parts and Packaging (NEPP) is working to establish for its microprocessor, GPU and DDRx memory test programs to provide guidance on these devices and their underlying technology, in regards to their potential usage in future space flight systems.

GPU↗
NASA NTRS2018

Double Data Rate (DDR) Memory Devices

This presentation will include information about Double Data Rate (DDR) technology, NASA Electronic Parts and Packaging (NEPP) tasks and their purpose, collaborations, a roadmap, NEPP partners, results to date, and future plans.

NASA Electronic Parts and Packaging (NEPP) Program↗
NASA NTRS2000

NASA Parts Selection List (NPSL) WWW Site http://nepp.nasa.gov/npsl

The NASA Parts Selection List (NPSL) is an on-line resource for electronic parts selection tailored for use by spaceflight projects. The NPSL provides a list of commonly used electronic parts that have a history of satisfactory use in spaceflight applications. The objective of this www site is to provide NASA projects, contractors, university experimenters, et al with an easy to use resource that provides a baseline of electronic parts from which designers are encouraged to select. The NPSL is an ongoing resource produced by Code 562 in support of the NASA HQ funded NASA Electronic Parts and Packaging (NEPP) Program. The NPSL is produced as an electronic format deliverable made available via the referenced www site administered by Code 562. The NPSL does not provide information pertaining to patented or proprietary information. All of the information contained in the NPSL is available through various other public domain resources such as US Military procurement specifications for electronic parts, NASA GSFC's Preferred Parts List (PPL-21), and NASA's Standard Parts List (MIL-STD975).

Brusse, Jay↗
NASA NTRS2018

Graphics Processing Unit (GPU) Devices

This presentation will include information about Graphics Processing Unit (GPU) technology, NASA Electronic Parts and Packaging (NEPP) tasks and their purpose, collaborations, a roadmap, NEPP partners, results to date, and future plans.

Single Event Effects (SEE)↗
NASA NTRS2009

Evaluation methodology guidance for stack packages

This report provides evaluation methodology guidance based on previous National Aeronautics and Space Administration (NASA) reports and literature surveys for 3D stack packages and assemblies. Two aspects of technology are covered: the package itself (guidance for functional packages) and package assembly manufacturing and reliability. This work was funded by the NASA Electronic Parts and Packaging (NEPP) Program. The objectives of this NEPP project are to: Perform a literature survey of 3D stack technology; perform a literature survey on the evaluation methodology for 3D package and assembly; combine the two aspects to provide evaluation methodology for both aspects with consideration of interactions between package and assembly; generate guidance on the evaluation methodology for 3D stack package integrity prior to and after assembly; provide recommendations on future experimental activities. The qualification and evaluation methodology guidelines will facilitate NASA projects in effectively evaluating the reliability of very dense and newly available high-density 3D stack packages, allowing more processing power in a smaller board footprint and lower system weight.

Gerke, David↗
NASA NTRS2002

Low Temperature Reliability of Electronic Packages/Assemblies for Space Missions

A NASA-wide team, funded under the NASA Electronic Parts and Packaging Program (NEPP), was formed to collaborate and to establish reliability of various electronic parts/packaging and assemblies for operation under extreme cold temperatures. One of the primary objectives of the NEPP is to expedite the infusion of cutting edge technologies into the present and future NASA missions. Commercial-off-the-shelf (COTS) emerging electronic parts/packages due to their lower weight, increased functionality, and lower cost are excellent candidates for space missions if they are characterized to show that they will meet the stringent reliability and quality requirements. Characterizations, especially for the extreme cold temperatures, are required since very limited data are available by manufacturers or users. For severe military environments, the temperature conditions to -65 C are the lowest temperature for which these parts/packages and assemblies are qualified. New data beyond this relatively benign cold temperature are required for numerous NASA missions. Several parts/packages, based on the project recommendation for their immediate and future needs, were selected for detailed characterization to cold temperature regimes down to liquid nitrogen (-196 C), covering both Mars cold temperature (-125 C) and asteroid (- 180 C) lander environmental requirements. Numerous parts/packages and assemblies were characterized during extreme temperature environmental tests. Several electrical parameters were characterized at discrete temperatures to -185 C to determine if they remain within their specification ranges. Both packages and circuit boards were subjected to nondestructive testing including optical, X-ray, and acoustic microscopy to document their integrity prior to environment exposure. Package/board assemblies were also subjected to X-ray to characterize solder joint integrity including void levels. Both parts and assemblies were subjected to thermal cycling with a large temperature swing enveloping numerous NASA missions. Details of the performed tests and the results obtained are presented.

Patterson, Richard L.↗
NASA NTRS2017

Update on NASA Microelectronics Activities

Mission Statement: The NASA Electronic Parts and Packaging (NEPP) Program provides NASA's leadership for developing and maintaining guidance for the screening, qualification, test. and usage of EEE parts by NASA as well as in collaboration with other government Agencies and industry. NASA Space Technology Mission Directorate (STMD) "STMD rapidly develops, demonstrates, and infuses revolutionary, high-payoff technologies through transparent, collaborative partnerships, expanding the boundaries of the aerospace enterprise." Mission Statement: The Space Environments Testing Management Office (SETMO) will identify, prioritize, and manage a select suite of Agency key capabilities/assets that are deemed to be essential to the future needs of NASA or the nation, including some capabilities that lack an adequate business base over the budget horizon. NESC mission is to perform value-added independent testing, analysis, and assessments of NASA's high-risk projects to ensure safety and mission success. NASA Space Environments and Avionics Fellows as well as Radiation and EEE Parts Community of Practice (CoP) leads.

NASA Electronic Parts and Packaging (NEPP)↗