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At least 91 records · Page 5

Ion Coulomb Crystals in Storage Rings for Quantum Information Science

Quantum information science is a growing field that promises to take computing into a new age of higher performance and larger scale computing as well as being capable of solving problems classical computers are incapable of solving. The outstanding issue in practical quantum computing today is scaling up the system while maintaining interconnectivity of the qubits and low error rates in qubit operations to be able to implement error correction and fault-tolerant operations. Trapped ion qubits offer long coherence times that allow error correction. However, error correction algorithms require large numbers of qubits to work properly. We can potentially create many thousands (or more) of qubits with long coherence states in a storage ring. For example, a circular radio-frequency quadrupole, which acts as a large circular ion trap and could enable larger scale quantum computing. Such a Storage Ring Quantum Computer (SRQC) would be a scalable and fault tolerant quantum information system, composed of qubits with very long coherence lifetimes. With computing demands potentially outpacing the supply of high-performance systems, quantum computing could bring innovation and scientific advances to particle physics and other DOE supported programs. Increased support of R$\&$D in large scale ion trap quantum computers would allow the timely exploration of this exciting new scalable quantum computer. The R$\&$D program could start immediately at existing facilities and would include the design and construction of a prototype SRQC. We invite feedback from and collaboration with the particle physics and quantum information science communities.

43 PARTICLE ACCELERATORS↗

A method to compute SEU fault probabilities in memory arrays with error correction

With the increasing packing densities in VLSI technology, Single Event Upsets (SEU) due to cosmic radiations are becoming more of a critical issue in the design of space avionics systems. In this paper, a method is introduced to compute the fault (mishap) probability for a computer memory of size M words. It is assumed that a Hamming code is used for each word to provide single error correction. It is also assumed that every time a memory location is read, single errors are corrected. Memory is read randomly whose distribution is assumed to be known. In such a scenario, a mishap is defined as two SEU's corrupting the same memory location prior to a read. The paper introduces a method to compute the overall mishap probability for the entire memory for a mission duration of T hours.

Gercek, Gokhan↗

Model-Based Fault Tolerant Control

The Model Based Fault Tolerant Control (MBFTC) task was conducted under the NASA Aviation Safety and Security Program. The goal of MBFTC is to develop and demonstrate real-time strategies to diagnose and accommodate anomalous aircraft engine events such as sensor faults, actuator faults, or turbine gas-path component damage that can lead to in-flight shutdowns, aborted take offs, asymmetric thrust/loss of thrust control, or engine surge/stall events. A suite of model-based fault detection algorithms were developed and evaluated. Based on the performance and maturity of the developed algorithms two approaches were selected for further analysis: (i) multiple-hypothesis testing, and (ii) neural networks; both used residuals from an Extended Kalman Filter to detect the occurrence of the selected faults. A simple fusion algorithm was implemented to combine the results from each algorithm to obtain an overall estimate of the identified fault type and magnitude. The identification of the fault type and magnitude enabled the use of an online fault accommodation strategy to correct for the adverse impact of these faults on engine operability thereby enabling continued engine operation in the presence of these faults. The performance of the fault detection and accommodation algorithm was extensively tested in a simulation environment.

Kumar, Aditya↗

The Generic Spacecraft Analyst Assistant (GenSAA): A tool for automating spacecraft monitoring with expert systems

Flight Operations Analysts (FOAs) in the Payload Operations Control Center (POCC) are responsible for monitoring a satellite's health and safety. As satellites become more complex and data rates increase, FOAs are quickly approaching a level of information saturation. The FOAs in the spacecraft control center for the COBE (Cosmic Background Explorer) satellite are currently using a fault isolation expert system named the Communications Link Expert Assistance Resource (CLEAR), to assist in isolating and correcting communications link faults. Due to the success of CLEAR and several other systems in the control center domain, many other monitoring and fault isolation expert systems will likely be developed to support control center operations during the early 1990s. To facilitate the development of these systems, a project was initiated to develop a domain specific tool, named the Generic Spacecraft Analyst Assistant (GenSAA). GenSAA will enable spacecraft analysts to easily build simple real-time expert systems that perform spacecraft monitoring and fault isolation functions. Lessons learned during the development of several expert systems at Goddard, thereby establishing the foundation of GenSAA's objectives and offering insights in how problems may be avoided in future project, are described. This is followed by a description of the capabilities, architecture, and usage of GenSAA along with a discussion of its application to future NASA missions.

Hughes, Peter M.↗

Verification of the FtCayuga fault-tolerant microprocessor system. Volume 2: Formal specification and correctness theorems

Presented here is a formal specification and verification of a property of a quadruplicately redundant fault tolerant microprocessor system design. A complete listing of the formal specification of the system and the correctness theorems that are proved are given. The system performs the task of obtaining interactive consistency among the processors using a special instruction on the processors. The design is based on an algorithm proposed by Pease, Shostak, and Lamport. The property verified insures that an execution of the special instruction by the processors correctly accomplishes interactive consistency, providing certain preconditions hold, using a computer aided design verification tool, Spectool, and the theorem prover, Clio. A major contribution of the work is the demonstration of a significant fault tolerant hardware design that is mechanically verified by a theorem prover.

Bickford, Mark↗

Error detection and correction unit with built-in self-test capability for spacecraft applications

The objective of this project was to research and develop a 32-bit single chip Error Detection and Correction unit capable of correcting all single bit errors and detecting all double bit errors in the memory systems of a spacecraft. We designed the 32-bit EDAC (Error Detection and Correction unit) based on a modified Hamming code and according to the design specifications and performance requirements. We constructed a laboratory prototype (breadboard) which was converted into a fault simulator. The correctness of the design was verified on the breadboard using an exhaustive set of test cases. A logic diagram of the EDAC was delivered to JPL Section 514 on 4 Oct. 1988.

Timoc, Constantin↗

Development and evaluation of a fault-tolerant multiprocessor (FTMP) computer. Volume 1: FTMP principles of operation

The basic organization of the fault tolerant multiprocessor, (FTMP) is that of a general purpose homogeneous multiprocessor. Three processors operate on a shared system (memory and I/O) bus. Replication and tight synchronization of all elements and hardware voting is employed to detect and correct any single fault. Reconfiguration is then employed to repair a fault. Multiple faults may be tolerated as a sequence of single faults with repair between fault occurrences.

Smith, T. B., Jr.↗

Automatic Fault Protection in the Voyager Spacecraft

Due to reliability requirements placed on the Voyager spacecraft system design and a mission resulting in long two-way, light time communication links, on-board automatic fault detection and correction capabilities are a significant feature of that spacecraft's design. Most of the protection to otherwise mission-catastrophic failures is implemented in the software of the voyager's central computer, while some resides in an attitude control-dedicated processor. This paper will present the role that automatic fault protection plans in achieving Voyager's overall reliability, its design evolution, and how its design was validated during system testing. In-flight experience will also be described, and from the lessons learned there-in, conclusions and recommendations will be drawn for the benefit of future designs.

Jones, C. P.↗

Fault-Tolerant Local-Area Network

Local-area network (LAN) for computers prevents single-point failure from interrupting communication between nodes of network. Includes two complete cables, LAN 1 and LAN 2. Microprocessor-based slave switches link cables to network-node devices as work stations, print servers, and file servers. Slave switches respond to commands from master switch, connecting nodes to two cable networks or disconnecting them so they are completely isolated. System monitor and control computer (SMC) acts as gateway, allowing nodes on either cable to communicate with each other and ensuring that LAN 1 and LAN 2 are fully used when functioning properly. Network monitors and controls itself, automatically routes traffic for efficient use of resources, and isolates and corrects its own faults, with potential dramatic reduction in time out of service.

Morales, Sergio↗

NASA Tech Briefs, March 2014

Topics include: Data Fusion for Global Estimation of Forest Characteristics From Sparse Lidar Data; Debris and Ice Mapping Analysis Tool - Database; Data Acquisition and Processing Software - DAPS; Metal-Assisted Fabrication of Biodegradable Porous Silicon Nanostructures; Post-Growth, In Situ Adhesion of Carbon Nanotubes to a Substrate for Robust CNT Cathodes; Integrated PEMFC Flow Field Design for Gravity-Independent Passive Water Removal; Thermal Mechanical Preparation of Glass Spheres; Mechanistic-Based Multiaxial-Stochastic-Strength Model for Transversely-Isotropic Brittle Materials; Methods for Mitigating Space Radiation Effects, Fault Detection and Correction, and Processing Sensor Data; Compact Ka-Band Antenna Feed with Double Circularly Polarized Capability; Dual-Leadframe Transient Liquid Phase Bonded Power Semiconductor Module Assembly and Bonding Process; Quad First Stage Processor: A Four-Channel Digitizer and Digital Beam-Forming Processor; Protective Sleeve for a Pyrotechnic Reefing Line Cutter; Metabolic Heat Regenerated Temperature Swing Adsorption; CubeSat Deployable Log Periodic Dipole Array; Re-entry Vehicle Shape for Enhanced Performance; NanoRacks-Scale MEMS Gas Chromatograph System; Variable Camber Aerodynamic Control Surfaces and Active Wing Shaping Control; Spacecraft Line-of-Sight Stabilization Using LWIR Earth Signature; Technique for Finding Retro-Reflectors in Flash LIDAR Imagery; Novel Hemispherical Dynamic Camera for EVAs; 360 deg Visual Detection and Object Tracking on an Autonomous Surface Vehicle; Simulation of Charge Carrier Mobility in Conducting Polymers; Observational Data Formatter Using CMOR for CMIP5; Propellant Loading Physics Model for Fault Detection Isolation and Recovery; Probabilistic Guidance for Swarms of Autonomous Agents; Reducing Drift in Stereo Visual Odometry; Future Air-Traffic Management Concepts Evaluation Tool; Examination and A Priori Analysis of a Direct Numerical Simulation Database for High-Pressure Turbulent Flows; and Resource-Constrained Application of Support Vector Machines to Imagery.

Source record↗

Determining quantum phase diagrams of topological Kitaev-inspired models on NISQ quantum hardware

Topological protection is employed in fault-tolerant error correction and in developing quantum algorithms with topological qubits. But, topological protection intrinsic to models being simulated , also robustly protects calculations, even on NISQ hardware. We leverage it by simulating Kitaev-inspired models on IBM quantum computers and accurately determining their phase diagrams. This requires constructing conventional quantum circuits for Majorana braiding to prepare the ground states of Kitaev-inspired models. The entanglement entropy is then measured to calculate the quantum phase boundaries. We show how maintaining particle-hole symmetry when sampling through the Brillouin zone is critical to obtaining high accuracy. This work illustrates how topological protection intrinsic to a quantum model can be employed to perform robust calculations on NISQ hardware, when one measures the appropriate protected quantum properties. It opens the door for further simulation of topological quantum models on quantum hardware available today.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Flight experience with time-of-arrival control for STOL aircraft in the terminal area

A research program on STOL operating systems is underway at the Ames Research Center. One investigation is concerned with design, analysis, and flight test of promising four-dimensional RNAV systems. One promising system generates a capture flight path from the present aircraft position to a waypoint on a selected fixed STOL approach route. It predicts arrival time at the runway and controls time and position along the path. The system was flight tested using a digital avionics system on a Convair 340 and on an experimental powered-lift STOL airplane. Flight tests in the flight director mode show that the pilot can choose and change the desired time of arrival, and meet this time within a few seconds, in spite of navigation errors and varying winds. Initial tests of the automatic mode using a flight simulator and the NASA Augmentor Wing Jet STOL Research Aircraft (AWJSRA) show that good time control was achieved at the cost of excess throttle activity. This fault was later corrected.

Neuman, F.↗

Algorithms for the Automated Power Systems Management

The system breadboard for the demonstration of Automated Power Systems Management (APSM) functions has been designed, fabricated, and is in the final stages of verification and testing. APSM functions fall into categories of fault detection and correction, commanding system and subsystem test and diagnoses, relay position monitoring, data acquisition and processing, and power management. All these functions are accomplished through software residing in 8-bit microprocessors dedicated to each group of Viking Orbiter power breadboard subassemblies and a 16-bit microprocessor serving as the central processor for the power system. This paper describes key monitoring, diagnostic, and control algorithms used in the APSM breadboard.

Moser, R. L.↗

Use of a multiprocessor for control of a robotic system

In the case of complex industrial operations, the use of a multiprocessor for the control of a robotic system has a number of potential advantages over an employment of a single-processor design. In addition to the increased speed of parallel computation, multiprocessors can provide greater reliability. However, the control of a system with a multiprocessor is much more complicated, and requires resolution of a number of design criteria. The degree of coupling, the processor interconnection configuration, and the method of fault detection and correction are factors in the design of a multiprocessor which need to be considered for each particular application. In connection with the present investigation, a five-unit multiprocessor was built to experiment with the multiprocessor control of a robotic system. While the primary application of the multiprocessor involves the control of the Ohio State University (OSU) Hexapod, an 18-degree-of-freedom, motor-driven walking machine, the multiprocessor was designed to be versatile enough for a numbr of other uses.

Klein, C. A.↗

Space station automation and robotics study. Operator-systems interface

This is the final report of a Space Station Automation and Robotics Planning Study, which was a joint project of the Boeing Aerospace Company, Boeing Commercial Airplane Company, and Boeing Computer Services Company. The study is in support of the Advanced Technology Advisory Committee established by NASA in accordance with a mandate by the U.S. Congress. Boeing support complements that provided to the NASA Contractor study team by four aerospace contractors, the Stanford Research Institute (SRI), and the California Space Institute. This study identifies automation and robotics (A&R) technologies that can be advanced by requirements levied by the Space Station Program. The methodology used in the study is to establish functional requirements for the operator system interface (OSI), establish the technologies needed to meet these requirements, and to forecast the availability of these technologies. The OSI would perform path planning, tracking and control, object recognition, fault detection and correction, and plan modifications in connection with extravehicular (EV) robot operations.

Source record↗

AUTOSIM: An automated repetitive software testing tool

AUTOSIM is a software tool which automates the repetitive run testing of software. This tool executes programming tasks previously performed by a programmer with one year of programming experience. Use of the AUTOSIM tool requires a knowledge base containing information about known faults, code fixes, and the fault diagnosis-correction process. AUTOSIM can be considered as an expert system which replaces a low level of programming expertise. Reference information about the design and implementation of the AUTOSIM software test tool provides flowcharts to assist in maintaining the software code and a description of how to use the tool.

Dunham, J. R.↗

Expanding role for autonomy in military space

The Jet Propulsion Laboratory is currently transferring satellite on-board autonomy technology to the USAF for use in military spacecraft as a means of lowering the ground support requirements. The techniques were proven on the Viking and Voyager spacecraft and permitted on-board fault detection and correction. New military satellites will incorporate an autonomous redundancy and maintenance management subsystem in an on-board computer, while the system will still be subject to ground-based safing commands for situations demanding deeper analyses. A level 5 autonomy will need 256 kb memory, 10 Mb nonvolatile data storage and 50 W power and will weigh 20 kg. Systems will be periodically checked and compared with an ideal in the data base. Deviations detected will result in a rollback and redundant examination by two microprocessors, which can initiate correction commands until operational criteria are met. The development of the expert systems to the point that they satisfy military specifications is expected to take 10 yr.

Evans, D. D.↗