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At least 91 records · Page 5

Poster: Hardware-Based Demonstration of Temperature Control Functions for Reactor Systems

Autonomous thermal regulation in nuclear reactors remains crucial for maintaining stable operation and ensuring the integrity of fuel. To alleviate public skepticism of the safety of nuclear reactors, demonstrating control over this key factor is pivotal. Utilizing electric heat pads to simulate the heat released in a reactor core, thermocouples for temperature monitoring, and an Arduino micro programmable logic controller (PLC) with an embedded proportional-integral-derivative (PID) algorithm for control, a hardware-based demonstration of a reactor heating system will validate the efficacy of reactor control over this key parameter.

21 - SPECIFIC NUCLEAR REACTORS AND ASSOCIATED PLAN

Evaluating Thermostats' Deadbands Using HVAC Hardware-In-the-Loop Experiment for Advanced Control Strategies: Preprint

Smart thermostats have gained significant popularity due to their potential for optimizing energy consumption and enhanced user control while ensuring occupants' comfort. The deadband, also referred to as temperature differential, is defined as the temperature difference between the desired setpoint and upper threshold or lower threshold for the HVAC equipment to turn on. It is a key factor influencing energy efficiency and user satisfaction. This paper presents a comparative analysis of the deadbands of five different smart thermostats, tested with a heat pump, aiming to identify variations in their deadband settings and implications for energy management. The experimental study was conducted using a HVAC hardware-in-theloop (HIL) system that integrates smart thermostats with physical HVAC equipment in a simulated house environment. The study explores the trade-offs between energy efficiency and occupant comfort and highlights how different thermostats participating in demand response event cycle differently based on their deadband settings. The findings offer valuable insights into how selecting the right thermostat or configuring smart thermostat with appropriate deadband settings can be leveraged to enhance demand response capabilities, shift loads effectively and improve operational flexibility in HVAC systems.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI

EMT Model Validation of a 2 MVA PV Inverter Using Transient and Frequency-Domain Hardware Testing: Preprint

This paper presents results and new insights gained from a hardware test campaign on a 2 MVA PV inverter for validating its vendor-supplied EMT model. The test campaign was conducted using a 7 MVA grid simulator and a 2 MW PV emulator. It considered both time-domain transient tests and frequency-domain impedance scan tests. The paper highlights the inadequacy of transient tests in capturing all critical resonance modes of the inverter, and the effectiveness of the frequency scan testing in addressing this problem. The paper shows the frequency scan testing as an effective tool for EMT model validation of IBR units which can highlight inaccuracies in the EMT models that are easy to overlook when model validation is performed using only the time-domain transient tests such as voltage ride-through and phase jump tests.

24 POWER TRANSMISSION AND DISTRIBUTION

High-fidelity dimer excitations using quantum hardware

The quantum simulation of entangled spin systems can play a central role in quantum magnetic materials discovery. Additionally, the simulation of spectroscopic signatures, such as the dynamical structure factor accessed in inelastic neutron scattering (INS), necessitates a long timescale for circuit evolution. This is because the energy resolution is directly related to the time over which the circuit could be meaningfully evolved. However, canonical Trotterization requires deep circuits precluding such long-time evolution—even for a small number of qubits. Here, in this study, we demonstrate “direct” resource efficient fast-forwarding (REFF) measurements with short-depth circuits that can be used to capture longer time dynamics of spin Hamiltonians. We showcase the results of the dynamics of a quantum spin dimer, the basic quantum unit of emergent many-body spin systems, whose density of states we simulate accurately. The long temporal evolution and measurement of the two-spin correlation functions enable the calculation of the dynamical structure factor S⁡(Q = 0, ω) measured in the neutron scattering cross-section. We exhibit the clarity of the triplet gap and the triplet splitting of the quantum dimer with class-leading fidelity that enables comparison to experimental neutron data. Our results on current circuit hardware outline an important workflow to predict and benchmark against the outputs of INS experiments of quantum magnets.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC

Dynamic, symmetry-preserving, and hardware-adaptable circuits for quantum computing many-body states and correlators of the Anderson impurity model

We present a hardware-reconfigurable ansatz on N q -qubits for the variational preparation of many-body states of the Anderson impurity model (AIM) with N imp + N bath = N q /2 sites, which conserves total charge and spin z component within each variational search subspace. The many-body ground state of the AIM is determined as the minimum over all minima of O(N$^2_ q$) distinct charge-spin sectors. Hamiltonian expectation values are shown to require ω(N q ) < N meas. $\leqslant$ O(N imp N bath ) symmetry-preserving, parallelizable measurement circuits, each amenable to postselection. To obtain the one-particle impurity Green’s function we show how initial Krylov vectors can be computed via midcircuit measurement and how Lanczos iterations can be computed using the symmetry-preserving ansatz. For a single-impurity Anderson model with a number of bath sites increasing from one to seven, we show using numerical emulation that the ease of variational ground-state preparation is suggestive of linear scaling in circuit depth and subquartic scaling in optimizer complexity. We therefore expect that, combined with time-dependent methods for Green’s function computation, our ansatz provides a useful tool to account for electronic correlations on early fault-tolerant processors. Finally, with a view towards computing real materials properties of interest like magnetic susceptibilities and electron-hole propagators, we provide a straightforward method to compute many-body, time-dependent correlation functions using a combination of time evolution, midcircuit measurement-conditioned operations, and the Hadamard test.

36 MATERIALS SCIENCE

Optimal Network Reconfiguration and Scheduling With Hardware-in-the-Loop Validation for Improved Microgrid Resilience

With the increased occurrence of various major extreme weather events, power outages and prompt power system restorations have recently drawn more attention to the resilience and recovery of power systems. From the perspective of a more resilient power delivery at the distribution grid, system restoration using network topology reconfiguration together with optimal scheduling of distributed energy resources are adopted in this paper. The proposed optimization model aims at minimizing the total load shedding cost and other operational costs, in which linearized topological constraints borrowed from graph theory and linearized DistFlow models are respectively used to maintain the radial network topology and power flow balance after system contingencies. To demonstrate the applicability of the proposed strategy, a real-world case study of a networked three-microgrid system in Adjuntas, Puerto Rico, is used with the consideration of different independent/interconnected microgrid scenarios, contingencies, and fairness settings. Furthermore, hardware-in-the-loop testing is conducted for the same three-microgrid network, where the closely matched results with the simulated ones have validated the effectiveness of the proposed restoration strategy, which is now ready to move one step forward towards field deployment. Finally, to test the proposed restoration strategy in a larger networked system, the modified IEEE-33 bus test distribution system is considered, and the results show a more resilient power delivery for critical loads under three and four line outages.

24 POWER TRANSMISSION AND DISTRIBUTION

Design of Controller Hardware-In-the-Loop Model of Microgrid with Modular Building Blocks and Automated Design Script

The scalability of controller hardware-in-the-loop (CHIL) simulation is critical for validating control coordination and energy management in microgrids with distributed energy resources, especially as these modern systems become more complex and decentralized. This paper presents a CHIL modeling methodology that combines modular building blocks with an automated design script to streamline the development of high-fidelity microgrid models. Standardized subsystem templates for resources, converters, and buses are integrated with a Python-based script that compiles structured JSON configuration files into simulation-ready initialization code. The proposed approach reduces development time, improves model consistency, and enhances simulation fidelity. The methodology is validated on a Typhoon HIL604 platform and is broadly applicable to real-time simulation of complex, networked microgrid systems. This framework establishes a foundation for automated, scalable CHIL validation and accelerates the design of next-generation distributed energy systems.

Kim, Namwon [ORNL] (ORCID:0000000200438489)

A Robust Communication-Free Protection Scheme for Islanded Microgrids with Relay Logic and Hardware-in-the-Loop Validation

This paper presents the Imbalance Square Factor (ISF) detection algorithm, an effective, computationally lightweight method for detecting faults in inverter-based microgrids. ISF provides a high magnitude at the time of the fault, which allows for fast detection and coordination between primary and backup relays. The imbalance squared factor, calculated using local voltage and currents, is used for fault detection and coordination among three relays. ISF is validated in hardware-in-the-loop (HIL) implementation inside commercial-grade relay logic (SEL-751). The HIL validation shows that ISF can coordinate primary, secondary, and tertiary relays in the 13-bus system in islanded operation.

Ferrari Maglia, Max [ORNL]

Solid State Power Substation DC Node Optimization and Controller Hardware-In-The-Loop Demonstration

A solid state power substation (SSPS) node is a microgrid that integrates distributed energy resources and loads and injects/absorbs power to/from the SSPS distribution network. It is an essential building block of a futuristic distribution grid network. This paper presents the development and demonstration of optimization use cases of a SSPS DC node. By adopting multi-layer hierarchical control architecture and developing automatic device identification and dynamic optimization formulation algorithms, the SSPS DC node can perform plug-and-play resource integration and seamless transition of the optimized node operation under on and off grid condition without sophisticated algorithms, control mode changes, and user interactions. Four optimization use cases including economic dispatches with price signal changes, a sudden PV power drop, and a single directional meter and its associated costs with sending power back to the grid, and resiliency under a grid inverter trip condition were demonstrated through the real-time controller hardware-in-the-loop simulation.

Kim, Namwon

Microgrid Building Block Architecture, and Subcomponents Modeling and Demonstration in Controller Hardware-in-the-Loop

The recently proposed Microgrid Building Blocks (MBB) are ready-to-use components to build microgrids quickly, cheaply, and modularly. This work presents and demonstrates in controller hardware-in-the-loop (CHIL) three key subcomponents of an MBB architecture: power converter topology, control scheme, and communication framework. The addressed architecture aims for systems interconnection such as microgrid to grid and microgrid to microgrid. This paper studies each subcomponent in detail and validates the efficacy of the architecture through CHIL results.

Adib, Aswad [ORNL] (ORCID:000000020997056X)

High-Fidelity Dataset Generation for Sensor Anomalies in Power Grids using Hardware-in-the-Loop Testbed

Sensor anomalies in power grids can have significant impacts on the operation of the grid due to the increased reliance of the grid operation on data-driven applications. However, there is a lack of datasets that accurately capture these anomalies as many of the anomalies go undetected using the current bad data detectors. High-fidelity labeled datasets are essential for developing robust applications that can detect and mitigate the impacts of anomalies. In this paper, we propose a hardware-in-the-loop testbed model that can emulate the grid behavior with high-fidelity. This testbed is used to inject anomalies at various levels in the grid architecture and generate labeled datasets. These high-fidelity datasets can be used for development and validation of data-driven applications for detection and mitigation of anomalies in grids and other cyber-physical systems.

Hyder, Burhan

Verification of Adaptive Protection in Hardware in the Loop for Coordination with Solar Variability

As inverter-based resources continue to be installed at all levels of the electric grid, the fixed protection schemes used at the distribution level will continue to be stressed until they no longer ensure the protection of the grid. Adaptive protection has been proposed as a solution with the ability to update the protection schemes in near real-time to ensure reliability and increase the resilience of the grid. However, weather variability poses a significant challenge to the ability of these methods to keep the selectivity and reliability of these schemes coordinated. If the ramp rates, due to solar variability, of the inverter-based resources change faster than the adaptive protection can issue new settings, the protection system could be uncoordinated, with the wrong device responding to a system fault. The proposed adaptive protection method ensures that due to solar variability, communication, and protection calculation latency, it can issu e coordinated protection settings promptly, in one minute or less. The hardware-in-the-loop results show the protection settings being issued and maintaining system coordination in under a minute.

Summers, Adam

Visual Analytics of Crosstalk in Quantum Hardware

Crosstalk remains a major obstacle to building scalable and fault-tolerant quantum computers. Conventional diagnostic techniques-often based on numerical simulation or statistical modeling-struggle to scale with hardware complexity and offer limited interpretability. In this work, we present a visual analytics framework for diagnosing qubit crosstalk using lightweight, circuit-based models integrated with an interactive user interface. Our approach quantifies correlations between active and idle qubits under parameterized single- and twoqubit operations, enabling detection of both spatial and gateinduced crosstalk. The system incorporates qubit topology and gate performance data to support sector-based exploration and correlation mapping. This tool assists users in identifying correlated error sources, informing qubit placement strategies, and guiding noise-aware circuit design.

Chae, Junghoon [ORNL] (ORCID:0000000206016746)

The Case for Co-Designing Model Architectures with Hardware

While GPUs are responsible for training the vast majority of state-of-the-art deep learning models, the implications of their architecture are often overlooked when designing new deep learning (DL) models. As a consequence, modifying a DL model to be more amenable to the target hardware can significantly improve the runtime performance of DL training and inference. In this paper, we provide a set of guidelines for users to maximize the runtime performance of their transformer models. These guidelines have been created by carefully considering the impact of various model hyperparameters controlling model shape on the efficiency of the underlying computation kernels executed on the GPU. We find the throughput of models with “efficient” model shapes is up to 39% higher while preserving accuracy compared to models with a similar number of parameters but with unoptimized shapes.

Yin, Junqi

ULTRAFAST HIGH-VOLTAGE KICKER SYSTEM HARDWARE FOR ION CLEARING GAPS

Ionization scattering of electron beams with residual gas molecules causes ion trapping in electron rings, both in a collider and electron cooling system. These trapped ions may cause emittance growth, tune shift, halo formation, and coherent coupled bunch instabilities. To clear the ions and prevent them from accumulating turn after turn, the gaps in a temporal structure of the beam are used. Typi- cally, the gap in the bunch train has a length of a few per- cent of the ring circumference. In those regions, the extrac- tion electrodes with high pulsed voltages are introduced. In this paper, we present the design consideration and initial test results of the high-voltage pulsed kicker hardware that includes vacuum device and pulsed voltage driver, capable of achieving over 3 kV of deflecting voltage amplitude, rise and fall times of less than 10 ns, 100 ns flat-top duration at 1.4 MHz repetition rate.

Smirnov, A.

Ultrafast High Voltage Kicker System Hardware for Ion Clearing Gaps

Jefferson Lab (JLab) will collaborate with Radiabeam, LLC in a DOE SBIR Phase II Project (DOE Grant No. DE-SC0019684, title: “Ultrafast High Voltage Kicker System Hardware for Ion Clearing Gaps”) to develop and test a MHz high voltage nanosecond kicker system that enables the time structure required by the ion traps for high current electron beam cooling. High current (in particular energy recovery) linac based electron cooling facilities for medium to high energy bunched proton or ion beams are of great interest for the recently funded Electron-Ion Collider (EIC) to which Jefferson Lab plays a critical role. The successful execution of this project will enable the capability to mitigate the ion trapping effect and circumvent a major obstacle preventing reliable operation of the crucial cooling facilities.

43 PARTICLE ACCELERATORS

Using Hardware-In-The-Loop Methodology to Develop Test Systems

Hardware in the Loop (HIL) testing methodologies have become widespread in industry. Typically, they focus on developing control algorithms for systems such as autonomous vehicles or aircraft. An oft overlooked aspect of product development is the design and fabrication of a test system for validating that the product meets requirements. Abstractly, a test system differs little from a control system—testers provide signals to the unit, monitor feedback, and base decisions on the results. While the time scales may differ, the functionalities are conceptually similar. Viewed in this light, it becomes natural to extend HIL approaches to tester development. By replacing a physical unit with a proxy model deployed to a real-time or pseudo real-time target, test systems can be developed in parallel with the design and fabrication of a first production unit. This saves considerable time in the life cycle from conceptual design to realized product. This manuscript demonstrates the process flow using a capacitive discharge unit as an exemplar.

42 ENGINEERING