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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 91 records · Page 5

Effect of various features on the life cycle cost of the timing/synchronization subsystem of the DCS digital communications network

The effect on the life cycle cost of the timing subsystem was examined, when these optional features were included in various combinations. The features included mutual control, directed control, double-ended reference links, independence of clock error measurement and correction, phase reference combining, self-organization, smoothing for link and nodal dropouts, unequal reference weightings, and a master in a mutual control network. An overall design of a microprocessor-based timing subsystem was formulated. The microprocessor (8080) implements the digital filter portion of a digital phase locked loop, as well as other control functions such as organization of the network through communication with processors at neighboring nodes.

Kimsey, D. B.↗

A user oriented microcomputer facility for designing linear quadratic Gaussian feedback compensators

The paper describes a laboratory design facility for digital microprocessor implementation of Linear-Quadratic-Gaussian feedback compensators. Outputs from user interactive programs for solving infinite time horizon LQ regulator and Kalman filter problems are conditioned for implementation on a laboratory microcomputer system. The software consists of two parts: (1) an off-line high-level program for solving the LQ Ricatti equations and generating associated feedback and filter gains, and (2) a cross compiler/macro assembler which generates object code for the target microprocessor system. Application to the control of a two dimensional inverted pendulum and expanding the design/prototyping system to other target machine architectures are discussed.

Houpt, P. K.↗

Electrodynamics of the stratosphere using 5000 cu m superpressure balloons

The Electrodynamics of the Middle Atmosphere research project encompasses the design of a microprocessor-controlled payload and the launch of up to eight small superpressure balloons in the 1982-1984 period. The primary payload instrument will measure the vector electric field from dc to 10 kHz, and the payloads will include instruments measuring local ionization, electrical conductivity, magnetic field, and temperature and pressure fluctuations. In addition, optical lightning will be recorded. The simultaneous measurement of these stratospheric parameters by several balloons, for periods extending over several solar rotations, will allow the study of electrical coupling between atmosphere and magnetosphere, of global current systems, and of global response to solar flares and magnetospheric storms.

Holzworth, R. H.↗

Interface For Fault-Tolerant Control System

Interface unit and controller emulator developed for research on electronic helicopter-flight-control systems equipped with artificial intelligence. Interface unit interrupt-driven system designed to link microprocessor-based, quadruply-redundant, asynchronous, ultra-reliable, fault-tolerant control system (controller) with electronic servocontrol unit that controls set of hydraulic actuators. Receives digital feedforward messages from, and transmits digital feedback messages to, controller through differential signal lines or fiber-optic cables (thus far only differential signal lines have been used). Analog signals transmitted to and from servocontrol unit via coaxial cables.

Shaver, Charles↗

A new accelerometer recording system for shuttle use

Microgravity investigators are interested in enhancing the capabilities and improving the information return from accelerometers used in microgravity research. In addition to improving the accelerometer sensor, efforts should be directed towards using recent advances in microprocessor technology and system design techniques to improve sensor calibration and temperature compensation, online data display and analysis, and data reduction and information storage. Results from the above areas of investigation should be combined in an integrated design for a spaceflight microgravity accelerometer package.

Lichtenberg, Byron↗

Rad-hard computer elements for space applications

Space Hardened CMOS computer elements emulating a commercial microcontroller and microprocessor family have been designed, fabricated, qualified, and delivered for a variety of space programs including NASA's multiple launch International Solar-Terrestrial Physics (ISTP) program, Mars Observer, and government and commercial communication satellites. Design techniques and radiation performance of the 1.25 micron feature size products are described.

Krishnan, G. S.↗

Extended performance electric propulsion power processor design study. Volume 2: Technical summary

Electric propulsion power processor technology has processed during the past decade to the point that it is considered ready for application. Several power processor design concepts were evaluated and compared. Emphasis was placed on a 30 cm ion thruster power processor with a beam power rating supply of 2.2KW to 10KW for the main propulsion power stage. Extension in power processor performance were defined and were designed in sufficient detail to determine efficiency, component weight, part count, reliability and thermal control. A detail design was performed on a microprocessor as the thyristor power processor controller. A reliability analysis was performed to evaluate the effect of the control electronics redesign. Preliminary electrical design, mechanical design and thermal analysis were performed on a 6KW power transformer for the beam supply. Bi-Mod mechanical, structural and thermal control configurations were evaluated for the power processor and preliminary estimates of mechanical weight were determined.

Biess, J. J.↗

A video display interface for the LORAN-C navigation receiver development system

A microprocessor-based development system was designed and fabricated for prototype test of navigation receiver designs. During use of this system in the development of low-cost LORAN-C receiver/processor concepts, the limitations of the integral KIM-1 display were severely felt. It was to augment this numerical display that the video character display was produced. The circuit design presented meets the need for a flexible-format display capable of driving a small standard video monitor with only minimal demands upon microprocessor memory and MPU cycles.

Fischer, J. P.↗

Guideline for ground radiation testing of microprocessors in the space radiation environment

The goal of this work is to develop a guideline that is applicable to processors that are potentially useful in space. Thus, the guideline does not consider very high performance processors that are intended for server or high-performance applications where very large amounts of power are tolerated to gain performance because it would be impractical to use such high-power devices in typical space applications. This guide is intended to support insertion of these microprocessors into spaceflight applications and to recommend ground test protocols. The first guideline principle that should be followed is a serious concurrent engineering approach for down selecting space-qualified microprocessors. This requires that the design engineer seek the support of a radiation effects expert who understands total ionizing dose (TID) and single-event effects (SEEs) issues for microprocessors as applied to the system in question.

Irom, Farokh↗

A microprocessor-based position control system for a telescope secondary mirror

The pointing requirements for the Shuttle IR Telescope Facility (SIRTF), which consists of an 0.85-m cryogenically cooled IR telescope, call for an image stability of 0.25 arcsec. Attention is presently given to a microprocessor-based position control system developed for the control of the SIRTF secondary mirror, employing a special control law (to minimize energy dissipation), a precision capacitive position sensor, and a specially designed power amplifier/actuator combination. The microprocessor generates the command angular position and rate waveforms in order to maintain a 90 percent dwell time/10 percent transition time ratio independently of chop frequency or amplitude. Performance and test results of a prototype system designed for use with a demonstration model of the SIRTF focal plane fine guidance sensor are presented.

Lorell, K. R.↗

Microprocessor control and networking for the amps breadboard

Future space missions will require more sophisticated power systems, implying higher costs and more extensive crew and ground support involvement. To decrease this human involvement, as well as to protect and most efficiently utilize this important resource, NASA has undertaken major efforts to promote progress in the design and development of autonomously managed power systems. Two areas being actively pursued are autonomous power system (APS) breadboards and knowledge-based expert system (KBES) applications. The former are viewed as a requirement for the timely development of the latter. Not only will they serve as final testbeds for the various KBES applications, but will play a major role in the knowledge engineering phase of their development. The current power system breadboard designs are of a distributed microprocessor nature. The distributed nature, plus the need to connect various external computer capabilities (i.e., conventional host computers and symbolic processors), places major emphasis on effective networking. The communications and networking technologies for the first power system breadboard/test facility are described.

Floyd, Stephen A.↗

Army/NASA small turboshaft engine digital controls research program

The emphasis of a program to conduct digital controls research for small turboshaft engines is on engine test evaluation of advanced control logic using a flexible microprocessor based digital control system designed specifically for research on advanced control logic. Control software is stored in programmable memory. New control algorithms may be stored in a floppy disk and loaded directly into memory. This feature facilitates comparative evaluation of different advanced control modes. The central processor in the digital control is an Intel 8086 16 bit microprocessor. Control software is programmed in assembly language. Software checkout is accomplished prior to engine test by connecting the digital control to a real time hybrid computer simulation of the engine. The engine currently installed in the facility has a hydromechanical control modified to allow electrohydraulic fuel metering and VG actuation by the digital control. Simulation results are presented which show that the modern control reduces the transient rotor speed droop caused by unanticipated load changes such as cyclic pitch or wind gust transients.

Sellers, J. F.↗

Anti-Hassle Chip

With assistance from NASA's Ames Research Center, the iTV Corporation has developed a full custom microprocessor that enables access to the Internet through a $49 device. The microprocessor is supported with a compliment of design tools for customization and adaptation as either a licensable core or as a complete microprocessor. Other uses include cell phones, DVD (digital versatile disk) players, cable modems, video conferencing equipment, digital cameras, wireless LANs (Local Area Network) and WANs (Wide Area Network). iTV continues to design new, low-cost consumer products.

Source record↗

A microprocessor interface for the Ohio university prototype Omega navigation receiver

The Ohio University Omega Prototype Receiver is currently under final design and construction. As initially designed, digital and analog hardware outputs were provided for attachment of tape recorders or chart recording equipment for capture of Omega LOP data. The interface described was designed to demonstrate the concept of direct microprocessor attachment to the existing receiver to allow far more flexibility of output data handling than previously provided.

Lilley, R. W.↗

Application of a microprocessor to a spacecraft attitude control

The attitude control system (ACS) microprocessor development work spanned three main design areas: hardware and instruction set, ACS firmware, and hardware firmware verification testing. The processor hardware utilizes two parallel 4 bit microprocessors. The firmware includes data processing for five sensors, four attitude control laws, and telemetry and commands.

Brady, D. H.↗

The formal verification used for the AAMP5 and AAMP-FV

The main goal of the project was two-fold: First, to investigate the feasibility of formally specifying and verifying a complex commercial microprocessor that was not expressly designed for formal verification. Second, to explore effective ways to transfer the technology to an industrial setting. The choice of the AAMP5 satisfied the first goal since the AAMP5 was not designed for formal verification, but to provide a more than threefold performance improvement while remaining object-code-compatible with the earlier AAMP2, which is used in numerous avionics applications, including the Boeing 737, 747, 757, and 767. To satisfy the technology transfer objective, we had to develop a suitable verification methodology and a formal infrastructure to make the technology usable by practicing engineers. This infrastructure includes techniques for decomposing the microcompressor verification problem into a st of verification conditions that the engineers can formulate and strategies to automate the proof of the verification conditions. The development of the infrastructure was one of the key accomplishments of the project. Most of the infrastructure and methodology are general enough to be reused for other microprocessors, certainly in the verification of another member of the AAMP family. This methodology was used to formally specify the entire microarchitecture and more than half of the instruction set and to verify a core set of eleven AAMP5 instructions representative of several instruction classes. However, the methodology and the formal machinery developed are adequate to cover most of the remaining AAMP5 instructions. Although PVS was the vehicle of the experiment, the methodology is applicable to other sufficiently powerful theorem provers.

Srivas, Mandayam↗

Digital system upset. The effects of simulated lightning-induced transients on a general-purpose microprocessor

Flight critical computer based control systems designed for advanced aircraft must exhibit ultrareliable performance in lightning charged environments. Digital system upset can occur as a result of lightning induced electrical transients, and a methodology was developed to test specific digital systems for upset susceptibility. Initial upset data indicates that there are several distinct upset modes and that the occurrence of upset is related to the relative synchronization of the transient input with the processing sate of the digital system. A large upset test data base will aid in the formulation and verification of analytical upset reliability modeling techniques which are being developed.

Belcastro, C. M.↗