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At least 91 records · Page 5

SiGe/Si heterojunction internal photoemission long-wavelength infrared detectors fabricated by molecular beam epitaxy

A new SiGe/Si heterojunction internal photoemission (HIP) long-wavelength infrared (LWIR) detector has been fabricated by molecular beam epitaxy (MBE). The detection mechanism of the SiGe/Si HIP detector is infrared absorption in the degenerately doped p+-SiGe layer followed by internal photoemission of photoexcited holes over a heterojunction barrier. By adjusting the Ge concentration in the SiGe layer, and, consequently, the valence band offset between SiGe and Si, the cutoff wavelength of SiGe HIP detectors can be extended into the LWIR (8-17-micron) regime. Detectors were fabricated by growing p+-SiGe layers using MBE on patterned p-type Si substrates. The SiGe layers were boron-doped, with concentrations ranging from 10 to the 19th/cu cm to 4 x 10 to the 20th/cu cm. Infrared absorption of 5-25 percent in a 30-nm-thick p+-SiGe layer was measured in the 3-20-micron range using a Fourier transform infrared spectrometer. Quantum efficiencies of 3-5 percent have been obtained from test devices in the 8-12-micron range.

Lin, True-Lon↗

Millimeter-wave and terahertz integrated circuit antennas

This paper presents a comprehensive review of integrated circuit antennas suitable for millimeter and terahertz applications. A great deal of research was done on integrated circuit antennas in the last decade and many of the problems associated with electrically thick dielectric substrates, such as substrate modes and poor radiation patterns, have been understood and solved. Several new antennas, such as the integrated horn antenna, the dielectric-filled parabola, the Fresnel plate antenna, the dual-slot antenna, and the log-periodic and spiral antennas on extended hemispherical lenses, have resulted in excellent performance at millimeter-wave frequencies, and are covered in detail in this paper. Also, a review of the efficiency definitions used with planar antennas is given in detail in the appendix.

Rebeiz, Gabriel M.↗

Smallest Nanoelectronic with Atomic Devices with Precise Structures

Since its invention in 1948, the transistor has revolutionized our everyday life - transistor radios and TV's appeared in the early 1960s, personal computers came into widespread use in the mid-1980s, and cellular phones, laptops, and palm-sized organizers dominated the 1990s. The electronics revolution is based upon transistor miniaturization; smaller transistors are faster, and denser circuitry has more functionality. Transistors in current generation chips are 0.25 micron or 250 nanometers in size, and the electronics industry has completed development of 0.18 micron transistors which will enter production within the next few years. Industry researchers are now working to reduce transistor size down to 0.13 micron - a thousandth of the width of a human hair. However, studies indicate that the miniaturization of silicon transistors will soon reach its limit. For further progress in microelectronics, scientists have turned to nanotechnology to advance the science. Rather than continuing to miniaturize transistors to a point where they become unreliable, nanotechnology offers the new approach of building devices on the atomic scale [see sidebar]. One vision for the next generation of miniature electronics is atomic chain electronics, where devices are composed of atoms aligned on top of a substrate surface in a regular pattern. The Atomic Chain Electronics Project (ACEP) - part of the Semiconductor Device Modeling and Nanotechnology group, Integrated Product Team at the NAS Facility has been developing the theory of understanding atomic chain devices, and the author's patent for atomic chain electronics is now pending.

Yamada, Toshishige↗

All-Metal Magnetic RAM

The factors that enter into the development of an all-metal, nonvolatile magnetic RAM, in which multilayer giant magnetoresistive films are used for all functions - storage, readout, and support electronics - are described. Four significant characteristics are expected to favor all-metal over hybrid magnetic RAM. First, silicon-technology fabrication requires a large number of masking steps, including complex ones such as ion implantation. Conversely, all-metal technology is inherently simple: fewer masking steps, no doping, scaling to lithographic limits, very little operating power. Second, the all-metal footprint is significantly smaller than the hybrid one. Third, an all-metal RAM is expected to be able to be miniaturized to lithographic limits; miniaturization of hybrid magnetic RAMs is likely to be limited by the semiconductor circuitry. Finally, semiconductor processing and magnetic processing in MRAM are done separately because the former requires high temperatures, whereas magnetic fabrication is a low-temperature process. By contrast, because both GMR electronics and the memory elements are made of the same materials, the two major components are deposited and patterned concurrently on the same substrate.

Torok, E. J.↗

Alternative Packaging for Back-Illuminated Imagers

An alternative scheme has been conceived for packaging of silicon-based back-illuminated, back-side-thinned complementary metal oxide/semiconductor (CMOS) and charge-coupled-device image-detector integrated circuits, including an associated fabrication process. This scheme and process are complementary to those described in "Making a Back-Illuminated Imager With Back-Side Connections" (NPO-42839), NASA Tech Briefs, Vol. 32, No. 7 (July 2008), page 38. To avoid misunderstanding, it should be noted that in the terminology of imaging integrated circuits, "front side" or "back side" does not necessarily refer to the side that, during operation, faces toward or away from a source of light or other object to be imaged. Instead, "front side" signifies that side of a semiconductor substrate upon which the pixel pattern and the associated semiconductor devices and metal conductor lines are initially formed during fabrication, and "back side" signifies the opposite side. If the imager is of the type called "back-illuminated," then the back side is the one that faces an object to be imaged. Initially, a back-illuminated, back-side-thinned image-detector is fabricated with its back side bonded to a silicon handle wafer. At a subsequent stage of fabrication, the front side is bonded to a glass wafer (for mechanical support) and the silicon handle wafer is etched away to expose the back side. The frontside integrated circuitry includes metal input/output contact pads, which are rendered inaccessible by the bonding of the front side to the glass wafer. Hence, one of the main problems is to make the input/output contact pads accessible from the back side, which is ultimately to be the side accessible to the external world. The present combination of an alternative packaging scheme and associated fabrication process constitute a solution of the problem.

Pain, Bedabrata↗

Fabricating Radial Groove Gratings Using Projection Photolithography

Projection photolithography has been used as a fabrication method for radial grove gratings. Use of photolithographic method for diffraction grating fabrication represents the most significant breakthrough in grating technology in the last 60 years, since the introduction of holographic written gratings. Unlike traditional methods utilized for grating fabrication, this method has the advantage of producing complex diffractive groove contours that can be designed at pixel-by-pixel level, with pixel size currently at the level of 45 45 nm. Typical placement accuracy of the grating pixels is 10 nm over 30 nm. It is far superior to holographic, mechanically ruled or direct e-beam written gratings and results in high spatial coherence and low spectral cross-talk. Due to the smooth surface produced by reactive ion etch, such gratings have a low level of randomly scattered light. Also, due to high fidelity and good surface roughness, this method is ideally suited for fabrication of radial groove gratings. The projection mask is created using a laser writer. A single crystal silicon wafer is coated with photoresist, and then the projection mask, with its layer of photoresist, is exposed for patterning in a stepper or scanner. To develop the photoresist, the fabricator either removes the exposed areas (positive resist) of the unexposed areas (negative resist). Next, the patterned and developed photoresist silicon substrate is subjected to reactive ion etching. After this step, the substrate is cleaned. The projection mask is fabricated according to electronic design files that may be generated in GDS file format using any suitable CAD (computer-aided design) or other software program. Radial groove gratings in off-axis grazing angle of incidence mount are of special interest for x-ray spectroscopy, as they allow achieving higher spectral resolution for the same grating area and have lower alignment tolerances than traditional in-plane grating scheme. This is especially critical for NASA Constellation- X project that will utilize hundreds of gratings all of which need to be precisely aligned for x-ray observation of space.

Iazikov, Dmitri↗

Controllable Planar Optical Focusing System

An optical device has a first metasurface disposed over a substrate. A high-contrast pattern of the first metasurface is operable for modifying, over a first phase profile, a phase front of an incident light beam. A second metasurface, is disposed over a plane parallel to the first metasurface with a second high-contrast pattern and operable for shaping, over a second phase profile, the modified phase front of the incident light beam into a converging spherical phase front. A spacer layer, in which the modified phase front of the incident light beam diffracts, is disposed in a controllably changeable separation between the first and second metasurfaces. Controllably changing the separation between the first and the second metasurfaces by a first distance correspondingly changes the position of the focus point of the converging spherical phase front by a second distance significantly greater than the first distance.

Arbabi, Amir↗

Electrochemical patterning of amorphous carbon on diamond

The ability to pattern ion-implantation damaged or other nondiamond carbon on a diamond substrate is useful for fabricating a variety of devices. We accomplished such patterning by an unmasked implantation into a diamond substrate followed by photolithography and a selective electrochemical etch. The use of a high resistivity medium coupled with applied biases over 50 V permitted etching without requiring contact between the substrate and an electrode. Many electrolytes gave etches that exhibit high selectivity for nondiamond carbon over both diamond and dielectrics such as photoresist. Optical, electrical, and Raman spectroscopic measurements elucidate the effects of the etch on the implanted diamond surface.

Marchywka, Mike↗

Focal-Plane Arrays of Quantum-Dot Infrared Photodetectors

Focal-plane arrays of semiconductor quantum-dot infrared photodetectors (QDIPs) are being developed as superior alternatives to prior infrared imagers, including imagers based on HgCdTe devices and, especially, those based on quantum-well infrared photodetectors (QWIPs). HgCdTe devices and arrays thereof are difficult to fabricate and operate, and they exhibit large nonunformities and high 1/f (where f signifies frequency) noise. QWIPs are easier to fabricate and operate, can be made nearly uniform, and exhibit lower 1/f noise, but they exhibit larger dark currents, and their quantization only along the growth direction prevents them from absorbing photons at normal incidence, thereby limiting their quantum efficiencies. Like QWIPs, QDIPs offer the advantages of greater ease of operation, greater uniformity, and lower 1/f noise, but without the disadvantages: QDIPs exhibit lower dark currents, and quantum efficiencies of QDIPs are greater because the three-dimensional quantization of QDIPs is favorable to the absorption of photons at normal or oblique incidence. Moreover, QDIPs can be operated at higher temperatures (around 200 K) than are required for operation of QWIPs. The main problem in the development of QDIP imagers is to fabricate quantum dots with the requisite uniformity of size and spacing. A promising approach to be tested soon involves the use of electron-beam lithography to define the locations and sizes of quantum dots. A photoresist-covered GaAs substrate would be exposed to the beam generated by an advanced, high-precision electron beam apparatus. The exposure pattern would consist of spots typically having a diameter of 4 nm and typically spaced 20 nm apart. The exposed photoresist would be developed by either a high-contrast or a low-contrast method. In the high-contrast method, the spots would be etched in such a way as to form steep-wall holes all the way down to the substrate. The holes would be wider than the electron beam spots perhaps as wide as 15 to 20 nm, but may be sufficient to control the growth of the quantum dots. In the low-contrast method, the resist would be etched in such a way as to form dimples, the shapes of which would mimic the electron-beam density profile. Then by use of a transfer etching process that etches the substrate faster than it etches the resist, either the pattern of holes or a pattern comprising the narrow, lowest portions of the dimples would be imparted to the substrate. Having been thus patterned, the substrate would be cleaned. The resulting holes or dimples in the substrate would serve as nucleation sites for the growth of quantum dots of controlled size in the following steps. The substrate would be cleaned, then placed in a molecular-beam-epitaxy (MBE) chamber, where native oxide would be thermally desorbed and the quantum dots would be grown.

Gunapala, Sarath↗

Fabrication of poly(ethylene glycol) hydrogel microstructures using photolithography

The fabrication of hydrogel microstructures based upon poly(ethylene glycol) diacrylates, dimethacrylates, and tetraacrylates patterned photolithographically on silicon or glass substrates is described. A silicon/silicon dioxide surface was treated with 3-(trichlorosilyl)propyl methacrylate to form a self-assembled monolayer (SAM) with pendant acrylate groups. The SAM presence on the surface was verified using ellipsometry and time-of-flight secondary ion mass spectrometry. A solution containing an acrylated or methacrylated poly(ethylene glycol) derivative and a photoinitiator (2,2-dimethoxy-2-phenylacetophenone) was spin-coated onto the treated substrate, exposed to 365 nm ultraviolet light through a photomask, and developed with either toluene, water, or supercritical CO2. As a result of this process, three-dimensional, cross-linked PEG hydrogel microstructures were immobilized on the surface. Diameters of cylindrical array members were varied from 600 to 7 micrometers by the use of different photomasks, while height varied from 3 to 12 micrometers, depending on the molecular weight of the PEG macromer. In the case of 7 micrometers diameter elements, as many as 400 elements were reproducibly generated in a 1 mm2 square pattern. The resultant hydrogel patterns were hydrated for as long as 3 weeks without delamination from the substrate. In addition, micropatterning of different molecular weights of PEG was demonstrated. Arrays of hydrogel disks containing an immobilized protein conjugated to a pH sensitive fluorophore were also prepared. The pH sensitivity of the gel-immobilized dye was similar to that in an aqueous buffer, and no leaching of the dye-labeled protein from the hydrogel microstructure was observed over a 1 week period. Changes in fluorescence were also observed for immobilized fluorophore labeled acetylcholine esterase upon the addition of acetyl acholine.

NASA Discipline Life Sciences Technologies↗

Fabrication of Microshutter Arrays for James Webb Space Telescope

Two-dimensional MEMS microshutter arrays are being developed at NASA Goddard Space Flight Center for use in the near-infrared region on the Next Generation Space Telescope (NGST). The microshutter arrays are designed for the selective transmission of light with high efficiency and high contrast. The NGST environment requires cryogenic operation at 45K. Microshutter arrays are fabricated out of silicon-oxide-insulated (SOI) silicon wafers. Arrays are close-packed silicon nitride membranes with a pixel size of 100x100 microns. Individual shutters are patterned with a torsion flexure permitting shutters to open 90 degrees with a minimized mechanical stress concentration. The mechanical shutter arrays are fabricated using MEMS technologies. The processing includes a multi-layer metal deposition and patterning of shutter electrodes and magnetic pads, reactive ion etching (RE) of the front side to form shutters out of the nitride membrane, an anisotropic back-etch for wafer thinning, followed by a deep RIE (DRIE) back-etch down to the nitride shutter membrane to form frames and relieve shutters from the silicon substrate. An additional metal deposition and patterning is used to form back electrodes. Shutters are actuated using a magnetic force and latched using an electrostatic force.

Li, Mary J.↗

Microshutter Arrays for James Webb Space Telescope

Two-dimensional MEMS microshutter arrays are being developed at NASA Goddard Space Flight Center for use in the near-infrared region on the James Webb Space Telescope (JWST). The microshutter arrays are designed for the selective transmission of light with high efficiency and high contrast. The JWST environment requires cryogenic operation at 35K. Microshutter arrays are fabricated out of silicon-oxide-insulated (SOI) silicon wafers. Arrays are close-packed silicon nitride membranes with a pixel size of 100x200 p. Individual shutters are patterned with a torsion flexure permitting shutters to open 90 degrees with a minimized mechanical stress concentration. The mechanical shutter arrays are fabricated using MEMS technologies. The processing includes a multi- layer metal deposition and patterning of shutter electrodes and magnetic pads, reactive ion etching (NE) of the front side to form shutters out of the nitride membrane, an anisotropic back-etch for wafer thinning, followed by a deep RIE (DRIE) back-etch down to the nitride shutter membrane to form W e s and relieve shutters from the silicon substrate. An additional metal deposition and patterning is used to form back electrodes. Shutters are actuated using a magnetic force and latched using an electrostatic force. . . . KEYWORDS: microshutter, MEMS, RIE, DRIE, micro-optics, near inbred, space telescope

Li, Mary J.↗

Dot patterns provide reproducible flaw areas for study of adhesive bonds

Photographic production of a small-dot pattern of known geometry on the surface of a substrate for controlled area degradation enables a study of adhesive bond strengths. These dot patterns may also be applied to force-limiting devices which must depend on the adhesive bonding strength between mating surfaces.

Frank, L.↗

Computer system for monitoring radiorepirometry data

System monitors expired breath patterns simultaneously from four small animals after they have been injected with carbon-14 substrates. It has revealed significant quantitative differences in oxidation patterns of glucose following such mild treatments of rats as a change in diet or environment.

Feller, D. D.↗

Analysis of the tapered slot antenna

A method for calculating the radiation pattern of end-fire tapered slot antennas with or without dielectric substrate is presented. The method involves a two-step procedure: (1) determine the field distribution of a traveling wave along the tapered slot, and (2) compute the radiation from this slot field by using the half-plane Green's function to account for termination effects. Acceptable estimates of the slot field usually can be obtained from a stepped approximation to the tapered geometry. The method has been verified by comparisons to measured patterns for various dielectric substrates and antenna dimensions. However, the effect of lateral truncation has not yet been successfully modeled. Experimental patterns showing this effect are presented.

Janaswamy, Ramakrishna↗

The Role of Plasma in Plasma Enhanced Chemical Vapour Deposition of Nanostructure Growth

Chemical vapour deposition (CVD) has become the preferred process for high yield growth of carbon nanotubes and nanofibres because of its ability to pattern growth through lithographic positioning of transition metal catalysts on substrates. Many potential applications of nanotubes such as field emitters [1] require not only patterned growth but also vertical alignment. Some degree of ali,ment in thermal CVD processes can be obtained when carbon nanotubes are grown closely together as a result of van der Waals interactions. The ali,onment however is marginal, and the van der Waals prerequisite makes growth of freestanding nanofibres with thermal CVD unrealizable. The application of electric fields as a means of ali,onment has been shown to overcome this limitation [2-5], and highly aligned nanostructures can be grown if electric fields on the order of 0.5 V/microns are employed. Plasma enhanced CVD in various configurations including dc, rf, microwave, inductive and electron cyclotron resonance has been pursued as a means of enabling alignment in the CVD process. However, the sheath fields for the non-dc sources are in general not sufficient for a high degree of ali,pment and an additional dc bias is usually applied to the growth substrate. This begs the question as to the actual role of the plasma. It is clear that the plasma itself is not required for aligned growth as references [3] and [4] employed fields through small applied voltages (3-20 V) across very small electrode spacings (10-100 microns) and thus avoided striking a discharge.

Hash, David B.↗

Collaboration of the NASA Glenn Research Center and Rolls-Royce Developed Thin Film Multilayered Dielectrics for Harsh Environments

The use of thin films to electrically insulate thin film sensors on engine components minimizes the intrusiveness of the sensors and allows a more accurate measurement of the environment. A variety of insulating films were investigated for preventing electrical shorting caused by insulator failure between the sensor and the component. By alternating layers of sputtered high-temperature ceramics, a sequence of insulating layers was devised that (1) prevents pinholes from forming completely through the insulator and (2) maintains high electrical resistivity at high temperatures. The total thickness is only a fraction of that needed for conventional insulating techniques. The Sensors and Electronics Technology Branch of the NASA Glenn Research Center has an in-house effort to develop thin film sensors for surface measurement in propulsion system research. Thin film sensors do not require special machining of the components on which they are mounted, and they are considerably thinner (less than 10 mm thick) than wire or foil sensors. The thin film sensors are thus much less disturbing to the operating environment and have a minimal impact on the physical characteristics of the supporting component. To further this research, NASA Glenn and Rolls-Royce (Derby, UK), with assistance from the Ohio Aerospace Institute (OAI) and the Akima Corporation, pursued a joint investigation using multilayered thin film dielectrics as a reliable insulator in harsh environments. The use of a multilayered scheme is thought to be promising for the fabrication of electrically insulating thin films. A major cause of conduction in thin film dielectrics is the presence of defects, such as pinholes, that propagate through the film to the underlying substrate surface. By alternating the insulating material, each new growth pattern would deviate from the previous one, eliminating direct pathways for conduction to the substrate. The film depositions and testing were conducted in the Instrument Research Laboratory at Glenn. The multilayered insulator test samples were made from alumina and stainless steel shims that were first covered with a sputtered underlayer of either yttria-stabilized zirconia or chromium carbide, and then overcoated with a sputtered top layer of alumina. An example of a test sample is shown in the following photograph. Each multilayered insulator sample was 5 mm thick, at least an order of magnitude thinner than conventional insulators. The insulating properties of the samples were tested in a high-temperature air oven to determine their suitability. The multilayer insulators tested showed a stabilized film at temperatures in excess of 800 C (1472 F). The underlying materials in these multilayers allow thermal expansion stresses produced during the heating to be graded. The chromium carbide-alumina multilayer had the best adhesion at high temperatures, presumably from the induced chemical bonding between the substrate and the chromium carbide underlayer. However, the zirconia-alumina multilayer proved to have slightly better insulating properties when adhering. The application of the zirconia-alumina insulator has been demonstrated on a nickel-alloy fan blade, as shown. The insulators using thin film sensors still need to be tested in a relevant high-temperature combustion environment.

Wrbanek, John D.↗

Substrate effects on the epitaxial growth of ZnGeP2 thin films by open tube organometallic chemical vapor deposition

Epitaxial ZnGeP2-Ge films have been grown on (111)GaP substrates using MOCVD. The films grown with dimethylzinc to germane flow rate ratio R greater than 10 show mirror-smooth surface morphology. Films grown with R less than 10 show a high density of twinning, including both double position and growth twins. Compared to films grown on (001) GaP substrates, the layers on (111) GaP generally show a higher density of microstructural defects. TEM electron diffraction patterns show that the films grown on (111) GaP substrates are more disordered than films grown on (001) GaP under comparable conditions. The growth rate on (111) GaP substrates is about 2.5 times slower than that on (001) GaP, and films grown on Si substrates show extensive twinning formation. Both TEM and SEM examinations indicate that smooth epitaxial overgrowth may be easier on (111) Si substrates than on (001) Si.

Xing, G. C.↗