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At least 91 records · Page 5

Board Saver for Use with Developmental FPGAs

A device denoted a board saver has been developed as a means of reducing wear and tear of a printed-circuit board onto which an antifuse field programmable gate array (FPGA) is to be eventually soldered permanently after a number of design iterations. The need for the board saver or a similar device arises because (1) antifuse-FPGA design iterations are common and (2) repeated soldering and unsoldering of FPGAs on the printed-circuit board to accommodate design iterations can wear out the printed-circuit board. The board saver is basically a solderable/unsolderable FPGA receptacle that is installed temporarily on the printed-circuit board. The board saver is, more specifically, a smaller, square-ring-shaped, printed-circuit board (see figure) that contains half via holes one for each contact pad along its periphery. As initially fabricated, the board saver is a wider ring containing full via holes, but then it is milled along its outer edges, cutting the via holes in half and laterally exposing their interiors. The board saver is positioned in registration with the designated FPGA footprint and each via hole is soldered to the outer portion of the corresponding FPGA contact pad on the first-mentioned printed-circuit board. The via-hole/contact joints can be inspected visually and can be easily unsoldered later. The square hole in the middle of the board saver is sized to accommodate the FPGA, and the thickness of the board saver is the same as that of the FPGA. Hence, when a non-final FPGA is placed in the square hole, the combination of the non-final FPGA and the board saver occupy no more area and thickness than would a final FPGA soldered directly into its designated position on the first-mentioned circuit board. The contact leads of a non-final FPGA are not bent and are soldered, at the top of the board saver, to the corresponding via holes. A non-final FPGA can readily be unsoldered from the board saver and replaced by another one. Once the final FPGA design has been determined, the board saver can be unsoldered from the contact pads on the first-mentioned printed-circuit board and replaced by the final FPGA.

Berkun, Andrew↗

Rupture testing for the quality control of electrodeposited copper interconnections in high-speed, high-density circuits

Printed Wiring Multilayer Board (PWMLB) structures for high speed, high density circuits are prone to failure due to the microcracking of electrolytic copper interconnections. The failure can occur in the foil that makes up the inner layer traces or in the plated through holes (PTH) deposit that forms the layer to layer interconnections. It is shown that there are some distinctive differences in the quality of Type E copper and that these differences can be detected before its use in a PWMLB. It is suggested that the strength of some Type E copper can be very low when the material is hot and that it is the use of this poor quality material in a PWMLB that results in PTH and inner layer microcracking. Since the PWMLB failure in question are induced by a thermal stress, and since the poorer grades of Type E materials used in these structures are susceptible to premature failure under thermal stress, the use of elevated temperature rupture and creep rupture testing is proposed as a means for screening copper foil, or its PTH equivalent, in order to eliminate the problem of Type E copper microcracking in advanced PWMLBs.

Zakraysek, Louis↗

Banning design automation software implementation

The research is reported for developing a system of computer programs to aid engineering in the design, fabrication, and testing of large scale integrated circuits, hybrid circuits, and printed circuit boards. The automatic layout programs, analysis programs, and interface programs are discussed.

Kuehlthau, R. L.↗

Polymer Coats Leads on Implantable Medical Device

Langley Research Center s Soluble Imide (LaRC-SI) was discovered by accident. While researching resins and adhesives for advanced composites for high-speed aircraft, Robert Bryant, a Langley engineer, noticed that one of the polymers he was working with did not behave as predicted. After putting the compound through a two-stage controlled chemical reaction, expecting it to precipitate as a powder after the second stage, he was surprised to see that the compound remained soluble. This novel characteristic ended up making this polymer a very significant finding, eventually leading Bryant and his team to win several NASA technology awards, and an "R&D 100" award. The unique feature of this compound is the way that it lends itself to easy processing. Most polyimides (members of a group of remarkably strong and incredibly heat- and chemical-resistant polymers) require complex curing cycles before they are usable. LaRC-SI remains soluble in its final form, so no further chemical processing is required to produce final materials, like thin films and varnishes. Since producing LaRC-SI does not require complex manufacturing techniques, it has been processed into useful forms for a variety of applications, including mechanical parts, magnetic components, ceramics, adhesives, composites, flexible circuits, multilayer printed circuits, and coatings on fiber optics, wires, and metals. Bryant s team was, at the time, heavily involved with the aircraft polymer project and could not afford to further develop the polymer resin. Believing it was worth further exploration, though, he developed a plan for funding development and submitted it to Langley s chief scientist, who endorsed the experimentation. Bryant then left the high-speed civil transport project to develop LaRC-SI. The result is an extremely tough, lightweight thermoplastic that is not only solvent-resistant, but also has the ability to withstand temperature ranges from cryogenic levels to above 200 C. The thermoplastic s unique characteristics lend it to many commercial applications; uses that Bryant believed would ultimately benefit industry and the Nation. "LaRC-SI," he explains, "is a product created in a government laboratory, funded with money from the tax-paying public. What we discovered helps further the economic competitiveness of the United States, and it was our goal to initiate the technology transfer process to ensure that our work benefited the widest range of people." Several NASA centers, including Langley, have explored methods for using LaRC-SI in a number of applications from radiation shielding and as an adhesive to uses involving replacement of conventional rigid circuit boards. In the commercial realm, LaRC-SI can now be found in several commercial products, including the thin-layer composite unimorph ferroelectric driver and sensor (THUNDER) piezoelectric actuator, another "R&D 100" award winner (Spinoff 2005).

Source record↗

Inexpensive Implementation of Many Strain Gauges

It has been proposed to develop arrays of strain gauges as arrays of ordinary metal film resistors and associated electronic readout circuitry on printed circuit boards or other suitable substrates. This proposal is a by-product of a development of instrumentation utilizing metal film resistors on printed-circuit boards to measure temperatures at multiple locations. In the course of that development, it was observed that in addition to being sensitive to temperature, the metal film resistors were also sensitive to strains in the printed-circuit boards to which they were attached. Because of the low cost of ordinary metal film resistors (typically <$0.01 apiece at 2007 prices), the proposal could enable inexpensive implementation of arrays of many (e.g., 100 or more) strain gauges, possibly concentrated in small areas. For example, such an array could be designed for use as a computer keyboard with no moving parts, as a device for sensing the shape of an object resting on a surface, or as a device for measuring strains at many points on a mirror, a fuel tank, an airplane wing, or other large object. Ordinarily, the effect of strain on resistance would be regarded as a nuisance in a temperature-measuring application, and the effect of temperature on resistance would be regarded as a nuisance in a strain-measuring application. The strain-induced changes in resistance of the metal film resistors in question are less than those of films in traditional strain gauges. The main novel aspect of present proposal lies in the use of circuitry affording sufficient sensitivity to measure strain plus means for compensating for the effect of temperature. For an array of metal film resistors used as proposed, the readout circuits would include a high-accuracy analog-to-digital converter fed by a low noise current source, amplifier chain, and an analog multiplexer chain. Corrections would be provided by use of high-accuracy calibration resistors and a temperature sensor. By use of such readout circuitry, it would be possible to read the resistances of as many as 100 fixed resistors in a time interval of 1 second at a resolution much greater than 16 bits. The readout data would be processed, along with temperature calibration data, to deduce the strain on the printed-circuit board or other substrate in the areas around the resistors. It should also be possible to also deduce the temperature from the readings.

Berkun, Andrew C.↗

Making Complex Electrically Conductive Patterns on Cloth

A method for automated fabrication of flexible, electrically conductive patterns on cloth substrates has been demonstrated. Products developed using this method, or related prior methods, are instances of a technology known as 'e-textiles,' in which electrically conductive patterns ar formed in, and on, textiles. For many applications, including high-speed digital circuits, antennas, and radio frequency (RF) circuits, an e-textile method should be capable of providing high surface conductivity, tight tolerances for control of characteristic impedances, and geometrically complex conductive patterns. Unlike prior methods, the present method satisfies all three of these criteria. Typical patterns can include such circuit structures as RF transmission lines, antennas, filters, and other conductive patterns equivalent to those of conventional printed circuits. The present method overcomes the limitations of the prior methods for forming the equivalent of printed circuits on cloth. A typical fabrication process according to the present method involves selecting the appropriate conductive and non-conductive fabric layers to build the e-textile circuit. The present method uses commercially available woven conductive cloth with established surface conductivity specifications. Dielectric constant, loss tangent, and thickness are some of the parameters to be considered for the non-conductive fabric layers. The circuit design of the conductive woven fabric is secured onto a non-conductive fabric layer using sewing, embroidery, and/or adhesive means. The portion of the conductive fabric that is not part of the circuit is next cut from the desired circuit using an automated machine such as a printed-circuit-board milling machine or a laser cutting machine. Fiducials can be used to align the circuit and the cutting machine. Multilayer circuits can be built starting with the inner layer and using conductive thread to make electrical connections between layers.

Chu, Andrew↗

Silicon Wafer-Scale Substrate for Microshutters and Detector Arrays

The silicon substrate carrier was created so that a large-area array (in this case 62,000+ elements of a microshutter array) and a variety of discrete passive and active devices could be mounted on a single board, similar to a printed circuit board. However, the density and number of interconnects far exceeds the capabilities of printed circuit board technology. To overcome this hurdle, a method was developed to fabricate this carrier out of silicon and implement silicon integrated circuit (IC) technology. This method achieves a large number of high-density metal interconnects; a 100-percent yield over a 6-in. (approximately equal to 15-cm) diameter wafer (one unit per wafer); a rigid, thermally compatible structure (all components and operating conditions) to cryogenic temperatures; re-workability and component replaceability, if required; and the ability to precisely cut large-area holes through the substrate. A method that would employ indium bump technology along with wafer-scale integration onto a silicon carrier was also developed. By establishing a silicon-based version of a printed circuit board, the objectives could be met with one solution. The silicon substrate would be 2 mm thick to survive the environmental loads of a launch. More than 2,300 metal traces and over 1,500 individual wire bonds are required. To mate the microshutter array to the silicon substrate, more than 10,000 indium bumps are required. A window was cut in the substrate to allow the light signal to pass through the substrate and reach the microshutter array. The substrate was also the receptacle for multiple unpackaged IC die wire-bonded directly to the substrate (thus conserving space over conventionally packaged die). Unique features of this technology include the implementation of a 2-mmthick silicon wafer to withstand extreme mechanical loads (from a rocket launch); integrated polysilicon resistor heaters directly on the substrate; the precise formation of an open aperture (approximately equal to 3x3cm) without any crack propagation; implementation of IR transmission blocking techniques; and compatibility with indium bump bonding. Although designed for the microshutter arrays for the NIRSpec instrument on the James Webb Space Telescope, these substrates can be linked to microshutter applications in the photomask generation and stepper equipment used to make ICs and microelectromechanical system (MEMS) devices.

Jhabvala, Murzy↗

Unitary Shaft-Angle and Shaft-Speed Sensor Assemblies

The figure depicts a unit that contains a rotary-position or a rotary-speed sensor, plus electronic circuitry necessary for its operation, all enclosed in a single housing with a shaft for coupling to an external rotary machine. This rotation sensor unit is complete: when its shaft is mechanically connected to that of the rotary machine and it is supplied with electric power, it generates an output signal directly indicative of the rotary position or speed, without need for additional processing by other circuitry. The incorporation of all of the necessary excitatory and readout circuitry into the housing (in contradistinction to using externally located excitatory and/or readout circuitry) in a compact arrangement is the major difference between this unit and prior rotation-sensor units. The sensor assembly inside the housing includes excitatory and readout integrated circuits mounted on a circular printed-circuit board. In a typical case in which the angle or speed transducer(s) utilize electromagnetic induction, the assembly also includes another circular printed-circuit board on which the transducer windings are mounted. A sheet of high-magnetic permeability metal ("mu metal") is placed between the winding board and the electronic-circuit board to prevent spurious coupling of excitatory signals from the transducer windings to the readout circuits. The housing and most of the other mechanical hardware can be common to a variety of different sensor designs. Hence, the unit can be configured to generate any of variety of outputs by changing the interior sensor assembly. For example, the sensor assembly could contain an analog tachometer circuit that generates an output proportional (in both magnitude and sign or in magnitude only) to the speed of rotation.

Alhorn, Dean C.↗

Hand tool bends component leads accurately

Hand-operated die set bends, without damage, electrical component leads to perfectly match holes in printed circuit board. This tool speeds up printed circuit fabrication and reduces the number of component rejections.

Source record↗

Application of PoF Based Virtual Qualification Methods for Reliability Assessment of Mission Critical PCBs

Reliability is the ability of a product to perform the function for which it was intended for a specified period of time (or cycles) for a given set of life cycle conditions. In today's compressed mission development cycles where designing, building and testing the physical models has to occur in a matter of months not years, Projects don't have the luxury of iteratively building and testing those models. Physics of failure (PoF) is an engineering-based approach to reliability that begins with an understanding of materials, processes, physical interactions, degradation and failure mechanisms, as well as identifying failure models. The PoF approach uses modeling and simulation to qualify a design and manufacturing process, with the ultimate intent of eliminating failures early in the design process by addressing the root cause. The physics-of-failure analysis proactively incorporates reliability into the design process by establishing a scientific basis for evaluating new materials, structures and technologies. Virtual physics-of-failure modeling allows engineers to determine if new technological node can be added to an existing system. This presentation will illustrate an application of a PoF based tool during the initial phases of a printed circuit board assembly development and how the NASA GSFC team was able to dynamically study the effects of electronics parts and printed circuit board material configuration changes under simulated thermal and vibrational stresses.

Physics of Failure↗

Application of PoF Based Virtual Qualification Methods for Reliability Assessment of Mission Critical PCBs

Reliability is the ability of a product to perform the function for which it was intended for a specified period of time (or cycles) for a given set of life cycle conditions. In today's compressed mission development cycles where designing, building and testing the physical models has to occur in a matter of months not years, Projects don't have the luxury of iteratively building and testing those models. Physics of failure (PoF) is an engineering-based approach to reliability that begins with an understanding of materials, processes, physical interactions, degradation and failure mechanisms, as well as identifying failure models. The PoF approach uses modeling and simulation to qualify a design and manufacturing process, with the ultimate intent of eliminating failures early in the design process by addressing the root cause. The physics-of-failure analysis proactively incorporates reliability into the design process by establishing a scientific basis for evaluating new materials, structures and technologies. Virtual physics-of-failure modeling allows engineers to determine if new technological node can be added to an existing system. This presentation will illustrate an application of a PoF based tool during the initial phases of a printed circuit board assembly development and how the NASA GSFC team was able to dynamically study the effects of electronics parts and printed circuit board material configuration changes under simulated thermal and vibrational stresses

Electronics packaging↗

Modular control subsystems for use in solar heating systems for multi-family dwellings

Progress in the development of solar heating modular control subsystems is reported. Circuit design, circuit drawings, and printed circuit board layout are discussed along with maintenance manuals, installation instructions, and verification and acceptance tests. Calculations made to determine the predicted performance of the differential thermostat are given including details and results of tests for the offset temperature, and boil and freeze protect points.

Source record↗

Description of the three axis low-g accelerometer package

The three axis low-g accelerometer package designed for use on the Space Processing Application Rocket (SPAR) Program is described. The package consists of the following major sections: (1) three Kearfott model 2412 accelerometers mounted in an orthogonal triad configuration on a temperature controlled, thermally isolated cube, (2) the accelerometer servoelectronics (printed circuit cards PC-6 through PC-12), and (3) the signal conditioner (printed circuit cards PC-15 and PC-16). The measurement range is 0 + or - 0.031 g with a quantization of 1.1 x 10 to the 7th power g. The package was flown successfully on six SPAR launches with the Black Brant booster. These flights provide approximately 300 s of free fall or zero-g environment.

Amalavage, A. J.↗

Soldering Tool for Integrated Circuits

Many connections soldered simultaneously in confined spaces. Improved soldering tool bonds integrated circuits onto printed-circuit boards. Intended especially for use with so-called "leadless-carrier" integrated circuits.

Takahashi, Ted H.↗

Industrial Applications of Graphite Fluoride Fibers

Based on fluorination technology developed during 1934 to 1959, and the fiber technology developed during the 1970s, a new process was developed to produce graphite fluoride fibers. In the process, pitch based graphitized carbon fibers are at first intercalated and deintercalated several times by bromine and iodine, followed by several cycles of nitrogen heating and fluorination at 350 to 370 C. Electrical, mechanical, and thermal properties of this fiber depend on the fluorination process and the fluorine content of the graphite fluoride product. However, these properties are between those of graphite and those of PTFE (Teflon). Therefore, it is considered to be a semiplastic. The physical properties suggest that this new material may have many new and unexplored applications. For example, it can be a thermally conductive electrical insulator. Its coefficient of thermal expansion (CTE) can be adjusted to match that of silicon, and therefore, it can be a heat sinking printed circuit board which is CTE compatible with silicon. Using these fibers in printed circuit boards may provide improved electrical performance and reliability of the electronics on the board over existing designs. Also, since it releases fluorine at 300 C or higher, it can be used as a material to store fluorine and to conduct fluorination. This application may simplify the fluorination process and reduce the risk of handling fluorine.

Hung, Ching-Cheh↗

Computer circuit card puller

The invention generally relates to hand tools, and more particularly to an improved device for facilitating removal of printed circuit cards from a card rack characterized by longitudinal side rails arranged in a mutually spaced parallelism and a plurality of printed circuit cards extended between the rails of the rack.

Sawyer, R. V.↗

MMIC devices for active phased array antennas

The study of printed circuit discontinuities is necessary in order to design, for example, transitions between rectangular waveguides and printed circuits. New developments with respect to the analytical approaches to this problem are discussed. A summary of the progress in the experimental approach is presented. The accurate solution for the modes in various millimeter-wave waveguides is essential in the analysis of many integrated circuit components, such as filters and impedance transformers. Problems associated with the numerical computation of these modes in two frequently used waveguide forms, namely, the finline and microstrip, are presented. The spectral domain method of formulation, with a moment method solution, is considered. This approach can be readily extended to analyze an arbitrary configuration of dielectric and metallized regions in a shielded enclosure. Galerkin's method is used, where the testing and basic functions are the same. It is shown that the mode functions, or eigenfunctions, are more sensitive to errors than the phase constants, or eigenvalues. The approximate mode functions do not satisfy the orthogonality relationship well, resulting in difficulties when these modal solutions are used to form an approximate Green's function or are used in a mode matching analysis.

Mittra, R.↗

Space shuttle main engine controller assembly, phase C-D

System design and system analysis and simulation are slightly behind schedule, while design verification testing has improved. Input/output circuit design has improved, but digital computer unit (DCU) and mechanical design continue to lag. Part procurement was impacted by delays in printed circuit board, assembly drawing releases. These are the result of problems in generating suitable printed circuit artwork for the very complex and high density multilayer boards.

Source record↗