The NASA Electronic Parts and Packaging (NEPP) Program
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Commercial silicon carbide and silicon Schottky barrier power diodes have been subjected to 203 MeV proton irradiation and the effects of the resultant displacement damage on the I-V characteristics have been observed. Changes in forward bias I-V characteristics are reported for fluences up to 4 x 10(exp 14) p/cm2. For devices of both material types, the series resistance is observed to increase as the fluence increases. The changes in series resistance result from changes in the free carrier concentration due to carrier removal by the defects produced. A simple model is presented that allows calculation of the series resistance of the device and then relates the carrier removal rate to the changes in series resistance. Using this model to calculate the carrier removal rate in both materials reveals that the carrier removal rate in silicon is less than that in silicon carbide, indicating that silicon is the more radiation tolerant material.
The NEPP mission is to provide guidance to NASA for the selection and application of microelectronics technologies, to improve understanding of the risks related to the use of these technologies in the space environment and to ensure that appropriate research is performed to meet NASA mission assurance needs.
Presentation discusses: (1) Why Multi-Layer Ceramic Capacitors(MLCCs) crack during manual soldering? Workmanship and parts issues. (2) Do existing qualification requirements assure crack-free soldering? MIL-spec Thermal Shock (TS) testing. MIL-spec Resistance to Soldering Heat (RSH) test. (3) What test can assure reliable soldering? Mechanical characteristics of ceramics. Comparison of three TS techniques: LND, TSD, and IWT. (4) Simulation of TS conditions.
Single-event-effect test results for hi-rel total-dose-hardened power MOSFETs are presented in this report. TheSCF9550 from Semicoa and the IRHM57260SE from International Rectifier were tested to NASA test condition/standards and requirements.The IRHM57260SE performed much better when compared to previous testing. These initial results confirm that parts from the Temecula line are marginally comparable to the El Segundo line. The SCF9550 from Semicoa was also tested and represents the initial parts offering from this vendor. Both parts experienced single-event gate rupture (SEGR) and single-event burnout (SEB). All of the SEGR was from gate to drain.
Reliability of advanced CMOS technology is a complex problem that is usually addressed from the standpoint of specific failure mechanisms rather than overall reliability of a finished microcircuit. A detailed treatment of CMOS reliability in scaled devices can be found in Ref. 1; it should be consulted for a more thorough discussion. The present document provides a more concise treatment of the scaled CMOS reliability problem, emphasizing differences in the recommended approach for these advanced devices compared to that of less aggressively scaled devices. It includes specific recommendations that can be used by flight projects that use advanced CMOS. The primary emphasis is on conventional memories, microprocessors, and related devices.
The NEPP Reconfigurable Field-Programmable Gate Array (FPGA) task has been charged to evaluate reconfigurable FPGA technologies for use in space. Under this task, the Xilinx single-event-immune, reconfigurable FPGA (SIRF) XQR5VFX130 device was evaluated for SEE. Additionally, the Altera Stratix-IV and SiliconBlue iCE65 were screened for single-event latchup (SEL).
Overview of NEPP Automotive Electronics Plans.
An overview of NEPP plans for small missions and electrical, electronic, and electromechanical (EEE) parts.
The results of NASAs studies into the appropriateness of using U.S. Automotive electronic parts in NASA spaceflight systems will be presented. The first part of the presentation provides an overview of the United States Automotive Electronics Council's AECQ standardization program, the second part provides a summary of the results of NASA's procurement and testing experiences and other lessons learned along with preliminary test results.
Highly Accelerated Life Testing (HALT) testing holds promise for affordable efficient acceptance testing of multi-layer ceramic chip capacitors (MLCCs) especially for commercial off the shelf (COTS).
The presentation provides an updated, high-level overview of the NEPP Program. The latest organizational chart is presented that shows the names of the Program and Assistant Program Managers. Additionally, the recent work that is on-going with the updating of several NASA NPDs, NPRs and technical standards is reviewed. Internal and external organizational interfaces are described. Finally, the current technology focus areas are described. These areas include passives, wide-band gap power devices, processor units (CPUs and GPUs), 2.5D and 3D device architectures, memories, and data analytics.
No abstract available
The purpose of this presentation is to familiarize the people attending the JEDEC work meetings about the NEPP Program, and recent tasks we have undertaken. There is a description of the policy and testing guidelines in development and an explanation of the Government Working Group, a collaboration of several US government space agencies that come together to discuss topics relating to the reliable use of electronics. The presentation also includes a brief description of recent NASA accomplishments such as the launching/splash down of the SpaceX Crew Dragon and the launch of the next Mars rover.
The purpose of this presentation is to familiarize the people attending the JEDEC work meetings about the NEPP Program, and recent tasks we have undertaken. There is a description of the policy and testing guidelines in development and an explanation of the Government Working Group, a collaboration of several US government space agencies that come together to discuss topics relating to the reliable use of electronics. The presentation also includes a brief description of NASA events such as the landing of the next Mars rover in Feb 2021.
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The NASA Electronic Parts and Packaging Program co-manager, requested the NASA Engineering and Safety Center (NESC) to compile a body of publicly available knowledge on copper (Cu) wire bonds and perform reliability testing and analysis on these bonds, including environment tests, sample destructive physical analysis, and bond pull/shear tests during environment test intervals. The goal was to understand the risks of using Cu wire bonds for space applications and develop guidelines on Cu bond pull/shear limits for NASA applications. This document contains the results of the NESC assessment.
The objective of this project was to develop or specify an integrated environment for off-line programming, graphical path verification, and debugging for robotic systems. Two alternatives were compared. The first was the integration of the ASEA Off-line Programming package with ROBSIM, a robotic simulation program. The second alternative was the purchase of the commercial product IGRIP. The needs of the RADL (Robotics Applications Development Laboratory) were explored and the alternatives were evaluated based on these needs. As a result, IGRIP was proposed as the best solution to the problem.