Search NASA⌕ Search

SEARCH · Search NASA

Results for “semiconductor device radiation effects”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 91 records · Page 5

The Single Event Effect Characteristics of the 486-DX4 Microprocessor

This research describes the development of an experimental radiation testing environment to investigate the single event effect (SEE) susceptibility of the 486-DX4 microprocessor. SEE effects are caused by radiation particles that disrupt the logic state of an operating semiconductor, and include single event upsets (SEU) and single event latchup (SEL). The relevance of this work can be applied directly to digital devices that are used in spaceflight computer systems. The 486-DX4 is a powerful commercial microprocessor that is currently under consideration for use in several spaceflight systems. As part of its selection process, it must be rigorously tested to determine its overall reliability in the space environment, including its radiation susceptibility. The goal of this research is to experimentally test and characterize the single event effects of the 486-DX4 microprocessor using a cyclotron facility as the fault-injection source. The test philosophy is to focus on the "operational susceptibility," by executing real software and monitoring for errors while the device is under irradiation. This research encompasses both experimental and analytical techniques, and yields a characterization of the 486-DX4's behavior for different operating modes. Additionally, the test methodology can accommodate a wide range of digital devices, such as microprocessors, microcontrollers, ASICS, and memory modules, for future testing. The goals were achieved by testing with three heavy-ion species to provide different linear energy transfer rates, and a total of six microprocessor parts were tested from two different vendors. A consistent set of error modes were identified that indicate the manner in which the errors were detected in the processor. The upset cross-section curves were calculated for each error mode, and the SEU threshold and saturation levels were identified for each processor. Results show a distinct difference in the upset rate for different configurations of the on-chip cache, as well as proving that one vendor is superior to the other in terms of latchup susceptibility. Results from this testing were also used to provide a mean-time-between-failure estimate of the 486-DX4 operating in the radiation environment for the International Space Station.

Kouba, Coy↗

Obtaining Solutions to Radiation-And Plasma Induced FAilure Modes From Physics

A number of performance-limiting spacecraft problems will be qualitatively discussed: Spacecraft Charging, Deep Dielectric Charging, Solar Cell Arcing, Antenna Sparking, High Voltage Power Shorts, Radiation-induced Defects in Semiconductors, and Degradation of Electronic Devices.

Radiation Plasma Arcing high voltage static charge↗

Advanced Avionics and Processor Systems for a Flexible Space Exploration Architecture

The Advanced Avionics and Processor Systems (AAPS) project, formerly known as the Radiation Hardened Electronics for Space Environments (RHESE) project, endeavors to develop advanced avionic and processor technologies anticipated to be used by NASA s currently evolving space exploration architectures. The AAPS project is a part of the Exploration Technology Development Program, which funds an entire suite of technologies that are aimed at enabling NASA s ability to explore beyond low earth orbit. NASA s Marshall Space Flight Center (MSFC) manages the AAPS project. AAPS uses a broad-scoped approach to developing avionic and processor systems. Investment areas include advanced electronic designs and technologies capable of providing environmental hardness, reconfigurable computing techniques, software tools for radiation effects assessment, and radiation environment modeling tools. Near-term emphasis within the multiple AAPS tasks focuses on developing prototype components using semiconductor processes and materials (such as Silicon-Germanium (SiGe)) to enhance a device s tolerance to radiation events and low temperature environments. As the SiGe technology will culminate in a delivered prototype this fiscal year, the project emphasis shifts its focus to developing low-power, high efficiency total processor hardening techniques. In addition to processor development, the project endeavors to demonstrate techniques applicable to reconfigurable computing and partially reconfigurable Field Programmable Gate Arrays (FPGAs). This capability enables avionic architectures the ability to develop FPGA-based, radiation tolerant processor boards that can serve in multiple physical locations throughout the spacecraft and perform multiple functions during the course of the mission. The individual tasks that comprise AAPS are diverse, yet united in the common endeavor to develop electronics capable of operating within the harsh environment of space. Specifically, the AAPS tasks for the Federal fiscal year of 2010 are: Silicon-Germanium (SiGe) Integrated Electronics for Extreme Environments, Modeling of Radiation Effects on Electronics, Radiation Hardened High Performance Processors (HPP), and and Reconfigurable Computing.

Keys, Andrew S.↗

Total Ionizing Dose Effects in MOS Oxides and Devices

The development of military and space electronics technology has traditionally been heavily influenced by the commercial semiconductor industry. The development of MOS technology, and particularly CMOS technology, as dominant commercial technologies has occurred entirely within the lifetime of the NSREC. For this reason, it is not surprising that the study of radiation interactions with MOS materials, devices and circuits has been a major theme of this conference for most of its history. The basic radiation problem in a MOS transistor is illustrated. The application of an appropriate gate voltage causes a conducting channel to form between the source and drain, so that current flows when the device is turned on. In Fig. lb, the effect of ionizing radiation is illustrated. Radiation-induced trapped charge has built up in the gate oxide, which causes a shift in the threshold voltage (that is, a change in the voltage which must be applied to turn the device on). If this shift is large enough, the device cannot be turned off, even at zero volts applied, and the device is said to have failed by going depletion mode.

Oldham, Timothy R.↗

Operation of SOI P-Channel Field Effect Transistors, CHT-PMOS30, under Extreme Temperatures

Electronic systems are required to operate under extreme temperatures in NASA planetary exploration and deep space missions. Electronics on-board spacecraft must also tolerate thermal cycling between extreme temperatures. Thermal management means are usually included in today s spacecraft systems to provide adequate temperature for proper operation of the electronics. These measures, which may include heating elements, heat pipes, radiators, etc., however add to the complexity in the design of the system, increases its cost and weight, and affects its performance and reliability. Electronic parts and circuits capable of withstanding and operating under extreme temperatures would reflect in improvement in system s efficiency, reducing cost, and improving overall reliability. Semiconductor chips based on silicon-on-insulator (SOI) technology are designed mainly for high temperature applications and find extensive use in terrestrial well-logging fields. Their inherent design offers advantages over silicon devices in terms of reduced leakage currents, less power consumption, faster switching speeds, and good radiation tolerance. Little is known, however, about their performance at cryogenic temperatures and under wide thermal swings. Experimental investigation on the operation of SOI, N-channel field effect transistors under wide temperature range was reported earlier [1]. This work examines the performance of P-channel devices of these SOI transistors. The electronic part investigated in this work comprised of a Cissoid s CHT-PMOS30, high temperature P-channel MOSFET (metal-oxide semiconductor field-effect transistor) device [2]. This high voltage, medium-power transistor is designed for geothermal well logging applications, aerospace and avionics, and automotive industry, and is specified for operation in the temperature range of -55 C to +225 C. Table I shows some specifications of this transistor [2]. The CHT-PMOS30 device was characterized at various temperatures over the range of -190 C to +225 C in terms of its voltage/current characteristic curves. The test temperatures included +22, -50, -100, -150, -175, -190, +50, +100, +150, +175, +200, and +225 C. Limited thermal cycling testing was also performed on the device. These tests consisted of subjecting the transistor to a total of twelve thermal cycles between -190 C and +225 C. A temperature rate of change of 10 C/min and a soak time at the test temperature of 10 minutes were used throughout this work. Post-cycling measurements were also performed at selected temperatures. In addition, re-start capability at extreme temperatures, i.e. power switched on while the device was soaking for a period of 20 minutes at the test temperatures of -190 C and +225 C, was investigated.

Patterson, Richard↗

Radiation Testing on State-of-the-Art CMOS: Challenges, Plans, and Preliminary Results

At GOMAC 2007 and 2008, we discussed a variety of challenges for radiation testing of modern semiconductor devices and technologies [1, 2]. In this presentation, we provide more specific details in this on-going investigation focusing on out-of-the-box lessons observed for providing radiation effects assurances as well as preliminary test results.

LaBel, Kenneth A.↗

Mission Radiation Environment Modeling and Analysis: Avionics Trade Study for GCD Rad-Neuro Project

The two main objectives of this trade study are characterizing the mission radiation environment for multiple Design Reference Missions (DRM) and analysis of radiation effects on avionics with the goal of producing radiation tolerant Neuromorphic Computing processor chips with innovative radiation-induced fault mitigation. The NASA process for defining radiation requirements for flight avionics is applied to this domain. The effects of trapped protons and electrons in the Van Allen radiation belts predominates in Low-Earth-Orbit (LEO) and the solar wind, solar flares and Galactic Cosmic Rays (GCRs) are the dominant radiation challenge in the open space between the planets of our solar system. The nature and energy of the particles that cause circuit upset and failure is very different in the two regimes. Two results are produced from the radiation models: determining the Total Integrated Dose (TID) experienced by avionics for a given DRM and predicting the Single Event Effects (SEE) rates for avionics during high rate exposure. These tools are applied to existing semiconductors and can be used for predicting the radiation performance of future semiconductors based on early radiation testing of new devices.

Space Radiation↗

Room Temperature Radiation Testing of a 500 °C Durable 4H-SiC JFET Integrated Circuit Technology

Total ionizing dose (TID) and single-event effect (SEE) room-temperature radiation test results are presented for developmental prototype 4H-SiC junction field effect transistor (JFET) semiconductor integrated circuits (ICs) that have demonstrated prolonged operation in extremely high-temperature (500 °C) environments. The devices tested demonstrated over 7 Mrad(Si) TID tolerance and no destructive SEE susceptibility.

Lauenstein, Jean-Marie↗

Silicon Carbide Solar Cells Investigated

The semiconductor silicon carbide (SiC) has long been known for its outstanding resistance to harsh environments (e.g., thermal stability, radiation resistance, and dielectric strength). However, the ability to produce device-quality material is severely limited by the inherent crystalline defects associated with this material and their associated electronic effects. Much progress has been made recently in the understanding and control of these defects and in the improved processing of this material. Because of this work, it may be possible to produce SiC-based solar cells for environments with high temperatures, light intensities, and radiation, such as those experienced by solar probes. Electronics and sensors based on SiC can operate in hostile environments where conventional silicon-based electronics (limited to 350 C) cannot function. Development of this material will enable large performance enhancements and size reductions for a wide variety of systems--such as high-frequency devices, high-power devices, microwave switching devices, and high-temperature electronics. These applications would supply more energy-efficient public electric power distribution and electric vehicles, more powerful microwave electronics for radar and communications, and better sensors and controls for cleaner-burning, more fuel-efficient jet aircraft and automobile engines. The 6H-SiC polytype is a promising wide-bandgap (Eg = 3.0 eV) semiconductor for photovoltaic applications in harsh solar environments that involve high-temperature and high-radiation conditions. The advantages of this material for this application lie in its extremely large breakdown field strength, high thermal conductivity, good electron saturation drift velocity, and stable electrical performance at temperatures as high as 600 C. This behavior makes it an attractive photovoltaic solar cell material for devices that can operate within three solar radii of the Sun.

Bailey, Sheila G.↗

Re-Verification of the IRHN57133SE and IRHN57250SE for Single Event Gate Rupture and Single Event Burnout

The vertical metal oxide semiconductor field-effect transistor (MOSFET) is a widely used power transistor onboard a spacecraft. The MOSFET is typically employed in power supplies and high current switching applications. Due to the inherent high electric fields in the device, power MOSFETs are sensitive to heavy ion irradiation and can fail catastrophically as a result of single event gate rupture (SEGR) or single event burnout (SEB). Manufacturers have designed radiation-hardened power MOSFETs for space applications. These radiation hardened devices are not immune to SEGR or SEB but, rather, can exhibit them at a much more damaging ion than their non-radiation hardened counterparts. See [1] through [5] for more information.This effort was to investigate the SEGR and SEB responses of two power MOSFETs from IR(the IRHN57133SE and the IRHN57250SE) that have recently been produced on a new fabrication line. These tests will serve as a limited verification of these parts, but it is acknowledged that further testing on the respective parts may be needed for some mission profiles.

Single Event Gate Rupture (SEGR)↗

Electromagnetic radiation screening of microcircuits for long life applications

The utility of X-rays as a stimulus for screening high reliability semiconductor microcircuits was studied. The theory of the interaction of X-rays with semiconductor materials and devices was considered. Experimental measurements of photovoltages, photocurrents, and effects on specified parameters were made on discrete devices and on microcircuits. The test specimens included discrete devices with certain types of identified flaws and symptoms of flaws, and microcircuits exhibiting deviant electrical behavior. With a necessarily limited sample of test specimens, no useful correlation could be found between the X-ray-induced electrical response and the known or suspected presence of flaws.

Brammer, W. G.↗

Nano-Satellite Avionics

Abstract NASA's Goddard Space Flight Center (GSFC) is currently developing a new class of satellites called the nano-satellite (nano-sat). A major objective of this development effort is to provide the technology required to enable a constellation of tens to hundreds of nano-satellites to make both remote and in-situ measurements from space. The Nano-sat will be a spacecraft weighing a maximum of 10 kg, including the propellant mass, and producing at least 5 Watts of power to operate the spacecraft. The electronics are required to survive a total radiation dose rate of 100 krads for a mission lifetime of two years. There are many unique challenges that must be met in order to develop the avionics for such a spacecraft. The first challenge is to develop an architecture that will operate on the allotted 5 Watts and meet the diverging requirements of multiple missions. This architecture will need to incorporate a multitude of new advanced microelectronic technologies. The microelectronics developed must be a modular and scalable packaging of technology to solve the problem of developing a solution to both reduce cost and meet the requirements of various missions. This development will utilize the most cost effective approach, whether infusing commercially driven semiconductor devices into spacecraft applications or partnering with industry to design and develop low cost, low power, low mass, and high capacity data processing devices. This paper will discuss the nano-sat architecture and the major technologies that will be developed. The major technologies that will be covered include: (1) Light weight Low Power Electronics Packaging, (2) Radiation Hard/Tolerant, Low Power Processing Platforms, (3) High capacity Low Power Memory Systems (4) Radiation Hard reconfiguragble field programmable gate array (rFPGA)

Culver, Harry↗

Electromagnetic radiation screening of semiconductor devices for long life applications

A review is presented of the mechanism of interaction of electromagnetic radiation in various spectral ranges, with various semiconductor device defects. Previous work conducted in this area was analyzed as to its pertinence to the current problem. The task was studied of implementing electromagnetic screening methods in the wavelength region determined to be most effective. Both scanning and flooding type stimulation techniques are discussed. While the scanning technique offers a considerably higher yield of useful information, a preliminary investigation utilizing the flooding approach is first recommended because of the ease of implementation, lower cost and ability to provide go-no-go information in semiconductor screening.

Hall, T. C.↗

Chemical profiling of silicon nitride structures

X ray photoelectron spectroscopy (XPS), spectroscopic ellipsometry (SE), and scanning electron microscopy (SEM) were used to study structural and chemical inhomogeneities in several electronic materials and device structures of relevance to radiation hard electronics. The systems studied include metal nitride oxide semiconductor (MNOS) structures, silicon oxynitride (SiO(x)N(y)) formed by the thermal nitridation of SiO2, and semiconductor on insulator (SOI) structures. Studies of MNOS structures suggest that the effect of H2 annealing is to make the Si3N4/SiO2 interface less abrupt by causing interdiffusion of silanol and silamine groups with subsequent oxynitride formation. Another effect of the annealing appears to be to relieve the strain at the SiO2/Si interface.

Vasquez, R. P.↗

Advances in Scanning Reflectarray Antennas Based on Ferroelectric Thin Film Phase Shifters for Deep Space Communications

Though there are a few examples of scanning phased array antennas that have flown successfully in space, the quest for low-cost, high-efficiency, large aperture microwave phased arrays continues. Fixed and mobile applications that may be part of a heterogeneous exploration communication architecture will benefit from the agile (rapid) beam steering and graceful degradation afforded by phased array antennas. The reflectarray promises greater efficiency and economy compared to directly-radiating varieties. Implementing a practical scanning version has proven elusive. The ferroelectric reflectarray, under development and described herein, involves phase shifters based on coupled microstrip patterned on Ba(x)Sr(1-x)TiO3 films, that were laser ablated onto LaAlO3 substrates. These devices outperform their semiconductor counterparts from X- through and K-band frequencies. There are special issues associated with the implementation of a scanning reflectarray antenna, especially one realized with thin film ferroelectric phase shifters. This paper will discuss these issues which include: relevance of phase shifter loss; modulo 2(pi) effects and phase shifter transient effects on bit error rate; scattering from the ground plane; presentation of a novel hybrid ferroelectric-semiconductor phase shifter; and the effect of mild radiation exposure on phase shifter performance.

Romanofsky, Robert R.↗

Radiation Testing Electronics with Heavy Ions-The Best Way to Hit a Target Moving Ever Exponentially Faster

In 1972, when engineers at Hughes Aircraft Corporation discovered that errors in their satellite avionics were being caused by cosmic rays (so-called single-event effects, or SEE), Moore's Law was only 7 years old. Now, more than 45 years on, the scaling that drove Moore's Law for its first 35 years has reached its limits. However, electronics technology continues to evolve exponentially and SEE remain a formidable issue for use of electronics in space. SEE occur when a single ionizing particle passes through a sensitive volume in an active semiconductor device and generates sufficient charge to cause anomalous behavior or failure in the device. Because SEE can occur at any time during the mission, the emphasis of SEE risk management methodologies is ensuring that all SEE modes in a device under test are detected by the test. Because a particle's probability of causing an SEE generally increases as the particle becomes more ionizing, heavy-ion beams have been and remain the preferred tools for elucidating SEE vulnerabilities. In this talk we briefly discuss space radiation environments and SEE mechanisms, describe SEE test methodologies and discuss current and future challenges for use of heavy-ion beams for SEE testing in an era when the continued validity of Moore's law depends on innovation rather than CMOS scaling.

space radiation environments↗

Linear response theory for annealing of radiation damage in semiconductor devices

A theoretical study of the radiation/annealing response of MOS ICs is described. Although many experiments have been performed in this field, no comprehensive theory dealing with radiation/annealing response has been proposed. Many attempts have been made to apply linear response theory, but no theoretical foundation has been presented. The linear response theory outlined here is capable of describing a broad area of radiation/annealing response phenomena in MOS ICs, in particular, both simultaneous irradiation and annealing, as well as short- and long-term annealing, including the case when annealing is nearing completion. For the first time, a simple procedure is devised to determine the response function from experimental radiation/annealing data. In addition, this procedure enables us to study the effect of variable temperature and dose rate, effects which are of interest in spaceflight. In the past, the shift in threshold potential due to radiation/annealing has usually been assumed to depend on one variable: the time lapse between an impulse dose and the time of observation. While such a suggestion of uniformity in time is certainly true for a broad range of radiation annealing phenomena, it may not hold for some ranges of the variables of interest (temperature, dose rate, etc.). A response function is projected which is dependent on two variables: the time of observation and the time of the impulse dose. This dependence on two variables allows us to extend the theory to the treatment of a variable dose rate. Finally, the linear theory is generalized to the case in which the response is nonlinear with impulse dose, but is proportional to some impulse function of dose. A method to determine both the impulse and response functions is presented.

Litovchenko, Vitaly↗