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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 901 records · Page 50
All sourcesNASA NTRSDOE OSTI
DOE OSTI2015

A modular and compact portable mini-endstation for high-precision, high-speed fixed target serial crystallography at FEL and synchrotron sources

The design and implementation of a compact and portable sample alignment system suitable for use at both synchrotron and free-electron laser (FEL) sources and its performance are described. The system provides the ability to quickly and reliably deliver large numbers of samples using the minimum amount of sample possible, through positioning of fixed target arrays into the X-ray beam. The combination of high-precision stages, high-quality sample viewing, a fast controller and a software layer overcome many of the challenges associated with sample alignment. A straightforward interface that minimizes setup and sample changeover time as well as simplifying communication with the stages during the experiment is also described, together with an intuitive naming convention for defining, tracking and locating sample positions. Lastly, the setup allows the precise delivery of samples in predefined locations to a specific position in space and time, reliably and simply.

07 ISOTOPE AND RADIATION SOURCES↗
DOE OSTI2021

Standard Modular Architecture for Consumer End Plug and Play Interfaces

The growth in load and generation sources at the edge of the grid is driving the innovation in power electronic (PE) grid interfaces at the consumer end to improve the grid resiliency, reliability, security, and cost of the future infrastructure. Novel PE technologies are key enablers for the future grid infrastructure to handle the issues that arise because of the projected growth. This paper introduces a novel fundamental building block (FBB) architecture with plug-and play features. An example framework that enables co-ordination of multiple FBBs hierarchically to provide various grid functions is also presented. The FBBs are designed to be equipped with advanced features like online health monitoring, embedded intelligence, and decision-making capability for enhancing the metrics of consumer end plug and play interfaces. The paper elaborates on the proposed architecture and the developed framework i.e., the controls, communication, protection, and the corresponding timing requirements for the building blocks. The architecture and the framework have been validated through simulations and the communication framework has been validated with a control hardware in the loop platform.

Chinthavali, Madhu Sudhan↗
DOE OSTI2016

Modular HPC I/O characterization with Darshan

Contemporary high-performance computing (HPC) applications encompass a broad range of distinct I/O strategies and are often executed on a number of different compute platforms in their lifetime. These large-scale HPC platforms employ increasingly complex I/O subsystems to provide a suitable level of I/O performance to applications. Tuning I/O workloads for such a system is nontrivial, and the results generally are not portable to other HPC systems. I/O profiling tools can help to address this challenge, but most existing tools only instrument specific components within the I/O subsystem that provide a limited perspective on I/O performance. The increasing diversity of scientific applications and computing platforms calls for greater flexibililty and scope in I/O characterization.

Snyder, Shane↗
DOE OSTI2018

Modular Spiking Neural Circuits for Mapping Long Short-Term Memory on a Neurosynaptic Processor

Due to the distributed and asynchronous nature of neural computation through low-energy spikes, brain-inspired hardware systems offer high energy efficiency and massive parallelism. One such platform is the IBM TrueNorth neurosynaptic system. Recently, TrueNorth compatible representation learning algorithms have emerged, achieving close to the state-of-the-art performance in various data sets. However, its application in temporal sequence processing models, such as recurrent neural networks (RNNs), is still only at the proof of concept level. There is an inherent difficulty in capturing temporal dynamics of an RNN using spiking neurons, which is only exasperated by the hardware constraints in connectivity and synaptic weight resolution. This paper presents a design flow that overcomes these difficulties and maps a special case of recurrent networks called long short-term memory (LSTM) onto a spike-based platform. The framework utilizes various approximation techniques, such as activation discretization, weight quantization, and scaling and rounding, spiking neural circuits that implement the complex gating mechanisms, and a store-and-release technique to enable neuron synchronization and faithful storage. While the presented techniques can be applied to map LSTM to any spiking neural network (SNN) simulator/emulator, here we choose the TrueNorth chip as the target platform by adhering to its hardware constraints. Three LSTM applications, parity check, extended Reber grammar, and question classification, are evaluated. The tradeoffs among accuracy, performance, and energy tradeoffs achieved on TrueNorth are demonstrated. Finally, this is compared with the performance on an SNN platform without hardware constraints, which represents the upper bound of the achievable accuracy.

97 MATHEMATICS AND COMPUTING↗