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At least 919 records · Page 51

Digital Pseudonoise Generator

Architecture developed for noise generator based on pseudorandom number sequence. Concept involves no additions or multiplications; outputs of set of feedback shift registers combined, bit-by-bit, in accordance with desired probability distribution. Digital, pseudorandom number output fed to digital-to-analog converter to generate pseudonoise signal suitable for testing broadband amplifiers.

Knoebel, A.↗

Codes With Parity Conditions on Subsets of Coordinates

New theorems aid search for efficient code alphabets. Paper discusses theory of finding largest binary codes 2k bits in length, in which all words differ from each other in at least d places and in which words truncated by ignoring certain subsets of bit positions belong to shorter linear codes.

Posner, E.↗

A sequential decoding performance analysis for International Comet Explorer

The effect of a noisy reference carrier on the performance of International Comet Explorer (ICE) Sequential decoder is analyzed. Ideal reference models for frame deletion probability are given for the Telemetry Processing Assembly (TPA) and the Linkabit (LS4815) sequential decoders. Based on these ideal reference models the deletion probability in the presence of noisy reference carrier is computed for both the high and the low data rate cases. A medium data rate performance model is then derived using an interpolation method. The derived medium rate performance model depends on the phase locked loop bandwidth-integration time product. Results are obtained for frame length 1024 bits, data bit rates of 1024 bps and 512 bps, modulation index of 60 deg, and threshold loop bandwidths of 10 Hz and 3 Hz. The medium rate model agrees with experimental data to within measurement uncertainty. For the 10 Hz loop bandwidth and modulation index of 60 deg at frame deletion rate of 0.0001, the required total received power to noise ratio is 36 dB. The analysis given is general and applicable to any sequential decoder, provided that the ideal reference model of the decoder is available.

Divsalar, D.↗

Low cost voice compression for mobile digital radios

A new technique for low cost rubust voice compression at 4800 bits per second was studied. The approach was based on using a cascade of digital biquad adaptive filters with simplified multipulse excitation followed by simple bit sequence compression.

Omura, J. K.↗

Display system software for the integration of an ADAGE 3000 programmable display generator into the solid modeling package C.A.D. software

A software system that integrates an ADAGE 3000 Programmable Display Generator into a C.A.D. software package known as the Solid Modeling Program is described. The Solid Modeling Program (SMP) is an interactive program that is used to model complex solid object through the composition of primitive geomeentities. In addition, SMP provides extensive facilities for model editing and display. The ADAGE 3000 Programmable Display Generator (PDG) is a color, raster scan, programmable display generator with a 32-bit bit-slice, bipolar microprocessor (BPS). The modularity of the system architecture and the width and speed of the system bus allow for additional co-processors in the system. These co-processors combine to provide efficient operations on and rendering of graphics entities. The resulting software system takes advantage of the graphics capabilities of the PDG in the operation of SMP by distributing its processing modules between the host and the PDG. Initially, the target host computer was a PRIME 850, which was later substituted with a VAX-11/785. Two versions of the software system were developed, a phase 1 and a phase 2. In phase 1, the ADAGE 3000 is used as a frame buffer. In phase II, SMP was functionally partitioned and some of its functions were implemented in the ADAGE 3000 by means of ADAGE's SOLID 3000 software package.

Montoya, R. J.↗

The Venus Balloon Project telemetry processing

The peculiarities of the Venus Balloon telemetry system required the development of a new methodology for the telemetry processing, since the capabilities of the Deep Space Network (DSN) telemetry system do not include burst processing of short frames with two different bit rates and first bit acquisition. A software package was produced for the non-real time detection, demodulation, and decoding of the telemetry streams obtained from an open loop recording utilizing the DSN spectrum processing subsystem-radio science (DSP-RS). A general description of the resulting software package (DMO-5539-SP) and its adaptability to the real mission's variations is contained.

Urech, J. M.↗

Further results on rate 1/N convolutional code constructions with minimum required SNR criterion

New good (K, 1/N) convolutional codes for 8 or = to K or = to 13 and 2 or = to N or = to 8 were found and tabulated which require minimum signal-to-noise ratio (SNR) for given desired bit error rates (BER) with Viterbi decoding. The transfer function bound was used for the BER evaluations. These low-rate codes are expected to have a number of applications, especially for systems having large bandwidth-bit time products such as deep space and spread spectrum communication systems.

Lee, P. J.↗

Simulation of AFC for a DMSK Receiver

Low bit rates suitable for low-cost satellite communications. LOOP computer program written to simulate automatic frequency control (AFC) subsystem of differential minimum-shift keying (DMSK) receiver with bit rate of 2,400 baud. AFC simulated by LOOP is first-order loop configuration with first-order resistance-and-capacitance filter. Written in MS SuperSoft FORTRAN 77.

Davarian, Faramaz↗

Bendable Routing Tool

Tool extends routing bit into internal cavities or passages so burrs and similar defects removed. Bent so inserted through curving channels. Copper sheath gives stiffness to flexible shaft but can itself be bent. Several types of routing bits attached to shaft.

Mayer, Walter↗

CCD Memory

CCD memory device yields over 6.4 x 10 to the eighth power levels of information on single chip. Charge-coupled device (CCD) demonstrated to operate as either read-only-memory (ROM) or photon-programmable memory with capacity of 640,000 bits, with each bit capable of being weighted to more than 1,000 discrete analog levels. Larger memory capacities now possible using proposed approach in conjunction with CCD's now being fabricated, which yield over 4 x 10 to the ninth power discrete levels of information on single chip.

Janesick, James R.↗

Antenna arraying of Voyager telemetry signals by symbol stream combining

Telemetry signals received from the Voyager 2 spacecraft at Deep Space Stations at Parkes and Canberra, Australia, on February 6, 1986, were combined by the method of symbol stream combining. This second demonstration of symbol stream combining followed the International Cometary Explorer (ICE) demonstration at Giacobini-Zinner encounter in September 1985. The Voyager demonstration was at a symbol rate of 43.2 ksymb/s, compared to 2 ksymb/s for ICE. Recording, playback, and combining at this higher rate were demonstrated. The average symbol signal-to-noise ratio (SNR) of the combined data was 2.84 dB, or 0.23 dB less than the sum of the SNRs of the two imput symbol streams. This 0.23 loss from ideal combining was due to use of 4-bit quantization of the input symbol stream and imperfect scaling. A practical implementation with 8-bit quantization could achieve combining losses of under 0.05 dB over a wide dynamic range of input signal levels.

Hurd, W. J.↗

Performance analysis of a cascaded coding scheme with interleaved outer code

A cascaded coding scheme for a random error channel with a bit-error rate is analyzed. In this scheme, the inner code C sub 1 is an (n sub 1, m sub 1l) binary linear block code which is designed for simultaneous error correction and detection. The outer code C sub 2 is a linear block code with symbols from the Galois field GF (2 sup l) which is designed for correcting both symbol errors and erasures, and is interleaved with a degree m sub 1. A procedure for computing the probability of a correct decoding is presented and an upper bound on the probability of a decoding error is derived. The bound provides much better results than the previous bound for a cascaded coding scheme with an interleaved outer code. Example schemes with inner codes ranging from high rates to very low rates are evaluated. Several schemes provide extremely high reliability even for very high bit-error rates say 10 to the -1 to 10 to the -2 power.

Lin, S.↗

A study of the effect of group delay distortion on an SMSK satellite communications channel

The effects of group delay distortion on an SMSK satellite communications channel have been investigated. Software and hardware simulations have been used to determine the effects of channel group delay variations with frequency on the bit error rate for a 220 Mbps SMSK channel. These simulations indicate that group delay distortions can significantly degrade the bit error rate performance. The severity of the degradation is dependent on the amount, type, and spectral location of the group delay distortion.

Kerczewski, Robert J.↗

SOT: A rapid prototype using TAE windows

The development of the window interface extension feature of the Transportable Applications Executive (TAE) is discussed. This feature is being used to prototype a space station payload interface in order to demonstrate and assess the benefits of using windows on a bit mapped display and also to convey the concept of telescience, the control and operation of space station payloads from remote sites. The prototype version of the TAE with windows operates on a DEC VAXstation 100. This workstation has a high resolution 19 inch bit mapped display, a keyboard and a three-button mouse. The VAXstation 100 is not a stand-alone workstation, but is controlled by software executing on a VAX/8600. A short scenario was developed utilizing the Solar Optical Telescope (SOT) as an example payload. In the scenario the end-user station includes the VAXstation 100 plus an image analysis terminal used to display the CCD images. The layout and use of the prototype elements, i.e., the root menu, payload status window, and target acquisition menu is described.

Stephens, Mark↗

Optical communication with semiconductor laser diodes

A 25 megabit/sec direct detection optical communication system that used Q=4 PPM signalling was constructed and its performance measured under laboratory conditions. The system used a single-mode AlGaAs laser diode transmitter and low noise silicon avalanche photodiode (APD) photodetector. Comparison of measured performance with the theoretical revealed that modeling the APD output as a Gaussian process under conditions of negligible background radiation and low (less than 10 to the -12 power A) APD bulk leakage currents leads to substantial underestimates of optimal APD gain to use and overestimates of system bit error probability. A procedure is given to numerically compute system performance which uses the more accurate Webb's Approximation of the exact Conradi distribution for the APD ouput signal that does not require excessive amounts of computer time (a few minutes of VAX 8600 CPU time per system operating point). Examples are given which illustrate the breakdown of the Gaussian approximation in assessing system performance. This system achieved a bit error probability of 10 to the -6 power at a received signal energy corresponding to an average of 60 absorbed photons/bit and optimal APD gain of 700.

Davidson, F.↗

Method for machining holes in composite materials

A method for boring well defined holes in a composite material such as graphite/epoxy is discussed. A slurry of silicon carbide powder and water is projected onto a work area of the composite material in which a hole is to be bored with a conventional drill bit. The silicon carbide powder and water slurry allow the drill bit, while experiencing only normal wear, to bore smooth, cylindrical holes in the composite material.

Daniels, Julia G.↗

Optimal block cosine transform image coding for noisy channels

The two dimensional block transform coding scheme based on the discrete cosine transform was studied extensively for image coding applications. While this scheme has proven to be efficient in the absence of channel errors, its performance degrades rapidly over noisy channels. A method is presented for the joint source channel coding optimization of a scheme based on the 2-D block cosine transform when the output of the encoder is to be transmitted via a memoryless design of the quantizers used for encoding the transform coefficients. This algorithm produces a set of locally optimum quantizers and the corresponding binary code assignment for the assumed transform coefficient statistics. To determine the optimum bit assignment among the transform coefficients, an algorithm was used based on the steepest descent method, which under certain convexity conditions on the performance of the channel optimized quantizers, yields the optimal bit allocation. Comprehensive simulation results for the performance of this locally optimum system over noisy channels were obtained and appropriate comparisons against a reference system designed for no channel error were rendered.

Vaishampayan, V.↗

On-board processing satellite network architecture and control study

For satellites to remain a vital part of future national and international communications, system concepts that use their inherent advantages to the fullest must be created. Network architectures that take maximum advantage of satellites equipped with onboard processing are explored. Satellite generations must accommodate various services for which satellites constitute the preferred vehicle of delivery. Such services tend to be those that are widely dispersed and present thin to medium loads to the system. Typical systems considered are thin and medium route telephony, maritime, land and aeronautical radio, VSAT data, low bit rate video teleconferencing, and high bit rate broadcast of high definition video. Delivery of services by TDMA and FDMA multiplexing techniques and combinations of the two for individual and mixed service types are studied. The possibilities offered by onboard circuit switched and packet switched architectures are examined and the results strongly support a preference for the latter. A detailed design architecture encompassing the onboard packet switch and its control, the related demand assigned TDMA burst structures, and destination packet protocols for routing traffic are presented. Fundamental onboard hardware requirements comprising speed, memory size, chip count, and power are estimated. The study concludes with identification of key enabling technologies and identifies a plan to develop a POC model.

Campanella, S. Joseph↗