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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 937 records · Page 52
All sourcesNASA NTRSDOE OSTI
NASA NTRS1972

ASDTIC - A feedback control innovation.

The ASDTIC (analog signal to discrete time interval converter) control subsystem provides precise output control of high performance aerospace power supplies. The key to ASDTIC operation is that it stably controls output by sensing output energy change as well as output magnitude. The ASDTIC control subsystem and control module were developed to improve power supply performance during static and dynamic input voltage and output load variations, to reduce output voltage or current regulation due to component variations or aging, to maintain a stable feedback control with variations in the loop gain or loop time constants, and to standardize the feedback control subsystem for power conditioning equipment.

Lalli, V. R.↗
NASA NTRS1972

ASDTIC: A feedback control innovation

The ASDTIC (Analog Signal to Discrete Time Interval Converter) control subsystem provides precise output control of high performance aerospace power supplies. The key to ASDTIC operation is that it stably controls output by sensing output energy change as well as output magnitude. The ASDTIC control subsystem and control module were developed to improve power supply performance during static and dynamic input voltage and output load variations, to reduce output voltage or current regulation due to component variations or aging, to maintain a stable feedback control with variations in the loop gain or loop time constants, and to standardize the feedback control subsystem for power conditioning equipment.

Lalli, V. R.↗
NASA NTRS1974

Doppler shift system

A system is described for measuring velocities of radiating particles based on Doppler shift. Light from the particles is directed through a narrow band optical filter to a Fabry-Perot interferometer initially tuned to a selected center line corresponding to zero particle Doppler shift. The movable mirror of the interferometer is made to sweep about the center line by the output of a modulation oscillator. The fringe pattern output is imaged onto a pin hole through which light is directed to a photomultiplier. The output of the photomultiplier is supplied to a phase sensitive detector with the oscillator output as a reference signal and which operates in the quadrature mode. The detector's output is gain controlled and is combined with the oscillator's output to adjust the interferometer's movable mirror to acquire the line center.

Aisenberg, S.↗
NASA NTRS1981

Direct current ballast circuit for metal halide lamp

A direct current ballast circuit for a two electrode metal halide lamp is described. Said direct current ballast circuit includes a low voltage DC input and a high frequency power amplifier and power transformer for developing a high voltage output. The output voltage is rectified by diodes and filtered by inductor and capacitor to provide a regulated DC output through commutating diodes to one terminal of the lamp at the output terminal. A feedback path from the output of the filter capacitor through the bias resistor to power the high frequency circuit which includes the power amplifier and the power transformer for sustaining circuit operations during low voltage transients on the input DC supply is described. A current sensor connected to the output of the lamp through terminal for stabilizing lamp current following breakdown of the lamp is described.

Lutus, P.↗
NASA NTRS1985

Remotely-Adjustable Solid-State High-Voltage Supply

Pulsed or steady outputs up to 20 kV produced by commercial components. Circuit produces adjustable high-voltage output in response to low-voltage input. Output voltage changes approximately linearly up to 20 kilovolts as input voltage varied from 0 to 5 volts. Output steady, or sine wave varied at rates up to 100 pulses per second. Output current about 100 microamperes. Reduction in output-filter capacitance confers additional benefit by reducing pulse rise time.

Simms, W. T.↗
NASA NTRS1985

Dye laser traveling wave amplifier

Injection locking was applied to a cavity-dumped coaxial flashlamp pumped dye laser in an effort to obtain nanosecond duration pulses which have both high energy and narrow-linewidth. In the absence of an injected laser pulse, the cavity-dumped dye laser was capable of generating high energy (approx. 60mJ) nanosecond duration output pulses. These pulses, however, had a fixed center wavelength and were extremely broadband (approx. 6nm FWHM). Experimental investigations were performed to determine if the spectral properties of these outputs could be improved through the use of injection-locking techniques. A parametric study to determine the specific conditions under which the laser could be injection-locked was also carried out. Significant linewidth reduction to 0.0015nm) of the outputs was obtained through injection-locking but only at wavelengths near the peak lasing wavelength of the dye. It was found, however; that by inserting weakly dispersive tuning elements in the laser cavity, these narrow-linewidth outputs could be obtained over a wide (24nm) tuning range. Since the tuning elements had low insertion losses, the tunability of the output was obtained without sacrificing output pulse energy.

Davidson, F.↗
NASA NTRS1984

The 20 GHz GaAs monolithic power amplifier module development

The development of a 20 GHz GaAs FET monlithic power amplifier module for advanced communication applications is described. Four-way power combing of four 0.6 W amplifier modules is used as the baseline approach. For this purpose, a monolithic four-way traveling-wave power divider/combiner was developed. Over a 20 GHz bandwidth (10 to 30 GHz), an insertion loss of no more than 1.2 dB was measured for a pair of back-to-back connected divider/combiners. Isolation between output ports is better than 20 dB, and VSWRs are better than 21:1. A distributed amplifier with six 300 micron gate width FETs and gate and drain transmission line tapers has been designed, fabricated, and evaluated for use as an 0.6 W module. This amplifier has achieved state-of-the-art results of 0.5 W output power with at least 4 dB gain across the entire 2 to 21 GHz frequency range. An output power of 2 W was achieved at a measurement frequency of 18 GHz when four distributed amplifiers were power-combined using a pair of traveling-wave divider/combiners. Another approach is the direct common-source cascading of three power FET stages. An output power of up to 2W with 12 dB gain and 20% power-added efficiency has been achieved with this approach (at 17 GHz). The linear gain was 14 dB at 1 W output. The first two stages of the three-stage amplifier have achieved an output power of 1.6 W with 9 dB gain and 26% power-added efficiency at 16 GHz.

Source record↗
NASA NTRS1989

Impact of device level faults in a digital avionic processor

This study describes an experimental analysis of the impact of gate and device-level faults in the processor of a Bendix BDX-930 flight control system. Via mixed mode simulation, faults were injected at the gate (stuck-at) and at the transistor levels and, their propagation through the chip to the output pins was measured. The results show that there is little correspondence between a stuck-at and a device-level fault model, as far as error activity or detection within a functional unit is concerned. In so far as error activity outside the injected unit and at the output pins are concerned, the stuck-at and device models track each other. The stuck-at model, however, overestimates, by over 100 percent, the probability of fault propagation to the output pins. An evaluation of the Mean Error Durations and the Mean Time Between Errors at the output pins shows that the stuck-at model significantly underestimates (by 62 percent) the impact of an internal chip fault on the output pins. Finally, the study also quantifies the impact of device fault by location, both internally and at the output pins.

Suk, Ho Kim↗
NASA NTRS1988

Programmable pipelined image processor

A pipelined image processor selectively interconnects modules in a column of a two-dimensional array to modules of the next column of the array of modules 1,1 through M,N, where M is the number of modules in one dimension and N is the number of modules in the other direction. Each module includes two input selectors for A and B inputs, two convolvers, a binary function operator, a neighborhood comparison operator which produces an A output and an output selector which may select as a B output the output of any one of the components in the module, including the A output of the neighborhood comparison operator. Each module may be connected to as many as eight modules in the next column, preferably with the majority always in a different row that is up (or down) in the array for a generally spiral data path around the torus thus formed. The binary function operator is implemented as a look-up table addressed by the most significant 8 bits of each 12-bit argument. The table output includes a function value and the slopes for interpolation of the two arguments by multiplying the 4 least significant bits in multipliers and adding the products to the function value through adders.

Donald B Gennery↗
NASA NTRS1989

Local area network with fault-checking, priorities, and redundant backup

This invention is a redundant error detecting and correcting local area networked computer system having a plurality of nodes each including a network connector board within the node for connecting to an interfacing transceiver operably attached to a network cable. There is a first network cable disposed along a path to interconnect the nodes. The first network cable includes a plurality of first interfacing transceivers attached thereto. A second network cable is disposed in parallel with the first cable and, in like manner, includes a plurality of second interfacing transceivers attached thereto. There are a plurality of three position switches each having a signal input, three outputs for individual selective connection to the input, and a control input for receiving signals designating which of the outputs is to be connected to the signal input. Each of the switches includes means for designating a response address for responding to addressed signals appearing at the control input and each of the switches further has its signal input connected to a respective one of the input/output lines from the nodes. Also, one of the three outputs is connected to a repective one of the plurality of first interfacing transceivers. There is master switch control means having an output connected to the control inputs of the plurality of three position switches and an input for receiving directive signals for outputting addressed switch position signals to the three position switches as well as monitor and control computer means having a pair of network connector boards therein connected to respective ones of one of the first interfacing transceivers and one of the second interfacing transceivers and an output connected to the input of the master switch means for monitoring the status of the networked computer system by sending messages to the nodes and receiving and verifying messages therefrom and for sending control signals to the master switch to cause the master switch to cause respective ones of the nodes to use a desired one of the first and second cables for transmitting and receiving messages and for disconnecting desired ones of the nodes from both cables.

Morales, Sergio↗
NASA NTRS1992

Fast temporal neural learning using teacher forcing

A neural network is trained to output a time dependent target vector defined over a predetermined time interval in response to a time dependent input vector defined over the same time interval by applying corresponding elements of the error vector, or difference between the target vector and the actual neuron output vector, to the inputs of corresponding output neurons of the network as corrective feedback. This feedback decreases the error and quickens the learning process, so that a much smaller number of training cycles are required to complete the learning process. A conventional gradient descent algorithm is employed to update the neural network parameters at the end of the predetermined time interval. The foregoing process is repeated in repetitive cycles until the actual output vector corresponds to the target vector. In the preferred embodiment, as the overall error of the neural network output decreasing during successive training cycles, the portion of the error fed back to the output neurons is decreased accordingly, allowing the network to learn with greater freedom from teacher forcing as the network parameters converge to their optimum values. The invention may also be used to train a neural network with stationary training and target vectors.

Toomarian, Nikzad↗
NASA NTRS1993

A petabyte size electronic library using the N-Gram memory engine

A model library containing petabytes of data is proposed by Triada, Ltd., Ann Arbor, Michigan. The library uses the newly patented N-Gram Memory Engine (Neurex), for storage, compression, and retrieval. Neurex splits data into two parts: a hierarchical network of associative memories that store 'information' from data and a permutation operator that preserves sequence. Neurex is expected to offer four advantages in mass storage systems. Neurex representations are dense, fully reversible, hence less expensive to store. Neurex becomes exponentially more stable with increasing data flow; thus its contents and the inverting algorithm may be mass produced for low cost distribution. Only a small permutation operator would be recalled from the library to recover data. Neurex may be enhanced to recall patterns using a partial pattern. Neurex nodes are measures of their pattern. Researchers might use nodes in statistical models to avoid costly sorting and counting procedures. Neurex subsumes a theory of learning and memory that the author believes extends information theory. Its first axiom is a symmetry principle: learning creates memory and memory evidences learning. The theory treats an information store that evolves from a null state to stationarity. A Neurex extracts information data without a priori knowledge; i.e., unlike neural networks, neither feedback nor training is required. The model consists of an energetically conservative field of uniformly distributed events with variable spatial and temporal scale, and an observer walking randomly through this field. A bank of band limited transducers (an 'eye'), each transducer in a bank being tuned to a sub-band, outputs signals upon registering events. Output signals are 'observed' by another transducer bank (a mid-brain), except the band limit of the second bank is narrower than the band limit of the first bank. The banks are arrayed as n 'levels' or 'time domains, td.' The banks are the hierarchical network (a cortex) and transducers are (associative) memories. A model Neurex was built and studied. Data were 50 MB to 10 GB samples of text, data base, and images: black/white, grey scale, and high resolution in several spectral bands. Memories at td, S(m(sub td)), were plotted against outputs of memories at td-1. S(m(sub td)) was Boltzman distributed, and memory frequencies exhibited self-organized criticality (SOC); i.e., 'l/f(sup beta)' after long exposures to data. Whereas output signals from level n may be encoded with B(sub output) = O(-log(2)f(sup beta)) bits, and input data encoded with B(sub input) = O((S(td)/S(td-1))(sup n)), B(sup output)/B(sub input) is much less than 1 always, the Neurex determines a canonical code for data and it is a lossless data compressor. Further tests are underway to confirm these results with more data types and larger samples.

Bugajski, Joseph M.↗
NASA NTRS1994

Displaceable spur gear torque controlled driver and method

Methods and apparatus are provided for a torque driver including a laterally displaceable gear support member to carry an output spur gear. A biasing assembly biases the output spur gear into engagement with a pinion to which is applied an input torque greater than a desired output torque limit for a threaded fastener such as a nut or screw. A coiled output linkage connects the output spur gear with a fastener adaptor which may be a socket for a nut. A gear tooth profile provides a separation force that overcomes the bias to limit torque at the desired torque limit. Multiple fasteners may be rotated simultaneously to a desired torque limit if additional output spur gears are provided. A gauged selector mechanism is provided to laterally displace multiple driver members for fasteners arranged in differing configurations. The torque limit is selectably adjustable and may be different for fasteners within the same fastener configuration.

Cook, Joseph S., Jr.↗
NASA NTRS1994

Electronic photography at NASA Langley Research Center

The field of photography began a metamorphosis several years ago which promises to fundamentally change how images are captured, transmitted, and output. At this time the metamorphosis is still in the early stages, but already new processes, hardware, and software are allowing many individuals and organizations to explore the entry of imaging into the information revolution. Exploration at this time is prerequisite to leading expertise in the future, and a number of branches at LaRC have ventured into electronic and digital imaging. Their progress until recently has been limited by two factors: the lack of an integrated approach and the lack of an electronic photographic capability. The purpose of the research conducted was to address these two items. In some respects, the lack of electronic photographs has prevented application of an integrated imaging approach. Since everything could not be electronic, the tendency was to work with hard copy. Over the summer, the Photographics Section has set up an Electronic Photography Laboratory. This laboratory now has the capability to scan film images, process the images, and output the images in a variety of forms. Future plans also include electronic capture capability. The current forms of image processing available include sharpening, noise reduction, dust removal, tone correction, color balancing, image editing, cropping, electronic separations, and halftoning. Output choices include customer specified electronic file formats which can be output on magnetic or optical disks or over the network, 4400 line photographic quality prints and transparencies to 8.5 by 11 inches, and 8000 line film negatives and transparencies to 4 by 5 inches. The problem of integrated imaging involves a number of branches at LaRC including Visual Imaging, Research Printing and Publishing, Data Visualization and Animation, Advanced Computing, and various research groups. These units must work together to develop common approaches to image processing and archiving. The ultimate goal is to be able to search for images using an on-line database and image catalog. These images could then be retrieved over the network as needed, along with information on the acquisition and processing prior to storage. For this goal to be realized, a number of standard processing protocols must be developed to allow the classification of images into categories. Standard series of processing algorithms can then be applied to each category (although many of these may be adaptive between images). Since the archived image files would be standardized, it should also be possible to develop standard output processing protocols for a number of output devices. If LaRC continues the research effort begun this summer, it may be one of the first organizations to develop an integrated approach to imaging. As such, it could serve as a model for other organizations in government and the private sector.

Holm, Jack M.↗
NASA NTRS1995

Fast temporal neural learning using teacher forcing

A neural network is trained to output a time dependent target vector defined over a predetermined time interval in response to a time dependent input vector defined over the same time interval by applying corresponding elements of the error vector, or difference between the target vector and the actual neuron output vector, to the inputs of corresponding output neurons of the network as corrective feedback. This feedback decreases the error and quickens the learning process, so that a much smaller number of training cycles are required to complete the learning process. A conventional gradient descent algorithm is employed to update the neural network parameters at the end of the predetermined time interval. The foregoing process is repeated in repetitive cycles until the actual output vector corresponds to the target vector. In the preferred embodiment, as the overall error of the neural network output decreasing during successive training cycles, the portion of the error fed back to the output neurons is decreased accordingly, allowing the network to learn with greater freedom from teacher forcing as the network parameters converge to their optimum values. The invention may also be used to train a neural network with stationary training and target vectors.

Toomarian, Nikzad↗
NASA NTRS1996

Displaceable Spur Gear Torque Controlled Driver and Method

Methods and apparatus are provided for a torque driver including a laterally displaceable gear support member to carry an output spur gear. A biasing assembly biases the output spur gear into engagement with a pinion to which is applied an input torque greater than a desired output torque limit for a threaded fastener such as a nut or screw. A coiled output linkage connects the output spur gear with a fastener adaptor which may be a socket for a nut. A gear tooth profile provides a separation force that overcomes the bias to limit torque at the desired torque limit. Multiple fasteners may be rotated simultaneously to a desired torque limit if additional output spur gears are provided. A gauged selector mechanism is provided to laterally displace multiple driven members for fasteners arranged in differing configurations. The torque limit is selectably adjustable and may be different for fasteners within the same fastener configuration.

Cook, Joseph S., Jr.↗
NASA NTRS2000

Effects of Geometric Azimuthal Asymmetries of the PPM Stack on Electron Beam Characteristics

The effects of geometric azimuthally asymmetric properties of a periodic permanent magnet (PPM) focusing stack on electron beam characteristics obtained using a fully three dimensional (3D) particle-in-cell (PIC) code will be presented. The simulation model, using MAFIA (Solution of MAxwell's equations by the Finite-Integration-Algorithm), incorporates 3D behavior of the beam immersed in static fields calculated directly from the exact geometry and material properties of the 3D magnetic focusing structure. The Hughes 8916H, 18-40 GHz helical TWT for the millimeter-wave power module (MMPM) was used as a prototype. Firstly, the effects of C-magnets used at the input and output of the TWT to allow for coupling of the RF signal into and out of the tube are considered. The 8916H input and output C-magnets differ because coaxial couplers are used at the input and waveguide couplers are used at the output The repositioning of the beam from its central axis due to the inclusion of the output C-magnet was found to be most significant. The modeled output C-magnet and its orientation in the Cartesian coordinate system is shown, and a two-dimensional beam profile including the output C-magnet is also shown. A table presents the shift of the beam center off the central axis relative to the average radius of the beam at the longitudinal points A, B and C designated on an enclosed figure. Secondly, the addition of shunts, or rectangular iron pieces applied manually by a skilled technician in order to improve beam transmission, is considered. The shunts are applied to the top of the tube; thus, azimuthal symmetry of the focusing stack is interrupted. Although shunts are typically added during RF focusing, they are also typically added at the input section of the tube where RF forces are minimal, making an electron optics analysis meaningful. Because several shunts are usually applied to one pole piece, the simulations have been simplified by modeling a half washer with the same radius and longitudinal length as a shunt over the entire x, positive-y half of the transverse plane. A modeled pole piece and shunt as described are shown. Lastly, in order to study the effects of magnet misalignments, a magnet in the PPM stack was arbitrarily chosen and adjusted so that its central axis was shifted both 0.7 percent and 1.0 percent of the magnet outer diameter in the positive-y direction. In practice, positioning the magnets so that their central axis is accurately aligned with the central axis of the tube is challenging. Thus, it is a strong possibility that one or more magnets will be misaligned relative to the tube central axis.

Kory, Carol L.↗
NASA NTRS1994

Goal Directed Model Inversion: Learning Within Domain Constraints

Goal Directed Model Inversion (GDMI) is an algorithm designed to generalize supervised learning to the case where target outputs are not available to the learning system. The output of the learning system becomes the input to some external device or transformation, and only the output of this device or transformation can be compared to a desired target. The fundamental driving mechanism of GDMI is to learn from success. Given that a wrong outcome is achieved, one notes that the action that produced that outcome "would have been right if the outcome had been the desired one." The algorithm makes use of these intermediate "successes" to achieve the final goal. A unique and potentially very important feature of this algorithm is the ability to modify the output of the learning module to force upon it a desired syntactic structure. This differs from ordinary supervised learning in the following way: in supervised learning the exact desired output pattern must be provided. In GDMI instead, it is possible to require simply that the output obey certain rules, i.e., that it "make sense" in some way determined by the knowledge domain. The exact pattern that will achieve the desired outcome is then found by the system. The ability to impose rules while allowing the system to search for its own answers in the context of neural networks is potentially a major breakthrough in two ways: 1) it may allow the construction of networks that can incorporate immediately some important knowledge, i.e. would not need to learn everything from scratch as normally required at present, and 2) learning and searching would be limited to the areas where it is necessary, thus facilitating and speeding up the process. These points are illustrated with examples from robotic path planning and parametric design.

Colombano, Silvano P.↗