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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 955 records · Page 53
All sourcesNASA NTRSDOE OSTI
NASA NTRS1993

A combustion products analyzer for contingency use during thermodegradation events on spacecraft

The Toxicology Laboratory at JSC and Exidyne Instrumentation Technologies (EIT) have developed a prototype Combustion Products Analyzer (CPA) to monitor, in real time, combustion products from a thermodegradation event on board spacecraft. The CPA monitors the four gases that are the most hazardous compounds (based on the toxicity potential and quantity produced) likely to be released during thermodegradation of synthetic materials: hydrogen fluoride (HF), hydrogen chloride (HCl), hydrogen cyanide (HCN), and carbon monoxide (CO). The levels of these compounds serve as markers to assist toxicologists in determining when the cabin atmosphere is safe for the crew to breathe following the contingency event. The CPA is a hand-held, battery-operated instrument containing four electrochemical sensors, one for each target gas, and a pump for drawing air across the sensors. The sensors are unique in their small size and zero-g compatibility. The immobilized electrolytes in each sensor permit the instrument to function in space and eliminate the possibility of electrolye leaks. The sample inlet system is equipped with a particulate filter that prevents clogging from airborne particulate matter. The CPA has a large digital display for gas concentrations and warming signals for low flow and low battery conditions. The CPA has flown on 13 missions beginning with STS 41 in Oct. 1990. Current efforts include the development of a microprocessor, an improved carbon monoxide sensor, and a ground-based test program to evaluate the CPA during actual thermodegradation of selected materials.

Wilson, Steve↗
NASA NTRS1993

Mongoose ASIC microcontroller programming guide

The 'Mongoose' ASIC microcontroller is a radiation-hard implementation of the R3000 microprocessor. This document describes the internals of the microcontroller in a level of detail necessary for someone implementing a software design.

Smith, Brian S.↗
NASA NTRS1993

Linear encoding device

A Linear Motion Encoding device for measuring the linear motion of a moving object is disclosed in which a light source is mounted on the moving object and a position sensitive detector such as an array photodetector is mounted on a nearby stationary object. The light source emits a light beam directed towards the array photodetector such that a light spot is created on the array. An analog-to-digital converter, connected to the array photodetector is used for reading the position of the spot on the array photodetector. A microprocessor and memory is connected to the analog-to-digital converter to hold and manipulate data provided by the analog-to-digital converter on the position of the spot and to compute the linear displacement of the moving object based upon the data from the analog-to-digital converter.

Leviton, Douglas B.↗
NASA NTRS1993

Rotary encoding device

A device for position encoding of a rotating shaft in which a polygonal mirror having a number of facets is mounted to the shaft and a light beam is directed towards the facets is presented. The facets of the polygonal mirror reflect the light beam such that a light spot is created on a linear array detector. An analog-to-digital converter is connected to the linear array detector for reading the position of the spot on the linear array detector. A microprocessor with memory is connected to the analog-to-digital converter to hold and manipulate the data provided by the analog-to-digital converter on the position of the spot and to compute the position of the shaft based upon the data from the analog-to-digital converter.

Leviton, Douglas B.↗
NASA NTRS1993

Characterization of fluid physics effects on cardiovascular response to microgravity (G-572)

The recognition and understanding of cardiovascular adaptation to spaceflight has experienced substantial advancement in the last several years. In-flight echocardiographic measurements of astronaut cardiac function on the Space Shuttle have documented a 15 percent reduction in both left ventricular volume index and stroke volume with a compensatory increase in heart rate to maintain cardiac output. To date, the reduced cardiac size and stroke volume have been presumed to be the consequence of the reduction in circulating fluid volume following diuresis and other physiological processes to reduce blood volume within a few days after orbital insertion. However, no specific mechanism for the reduced stroke volume has been elucidated. The following investigation proposes the use of a hydraulic model of the cardiovascular system to examine the possibility that the observed reduction in stroke volume may, in part, be related to fluid physics effects on heart function. The automated model is being prepared to fly as a GAS payload. The experimental apparatus consists of a pneumatically actuated, elliptical artificial ventricle connected to a closed-loop, hydraulic circuit with compliance and resistance elements to create physiologic pressure and flow conditions. The ventricle is instrumented with high-fidelity, acceleration-insensitive, catheter-tip pressure transducers (Millar Instruments) in the apex and base to determine the instantaneous ventricular pressures and (delta)P(sub LV) across the left ventricle (LVP(sub apex)-LVP(sub base). The ventricle is also instrumented with a flow probe and pressure transducers immediately upstream of the inflow valve and downstream of the outflow valve. The experiment will be microprocessor controlled with analog signals stored on the FM data tape recorder. By varying the circulating fluid volume, ventricular function can be determined for varying preload pressures with fixed afterload pressure. Pilot experiments on board the NASA KC-135 aircraft have demonstrated proof-of-concept and provided early support for the proposed hypothesis. A review of the pilot experiments and developmental progress on the GAS version of this experiment will be presented.

Pantalos, George M.↗
NASA NTRS1993

California Student Get Away Special Payload GAS-450

The California Student Get Away Special Payload GAS-450, recently went into orbit on the STS-57 Mission, Space Shuttle, Endeavour, 21 June 1993, 6:14 AM and landed on the 29 June 1993 at Kennedy Space Center (KSC). Fifty students from 13 California Central Coast Schools and one in San Francisco designed and built 13 active experiments (6 modules) for this mission. Preliminary analysis of our completely reusable payload bus system indicated that the structure, power system, microprocessor, and sensor systems in each experiment module worked flawlessly. The experiments themselves performed exceptionally well with a 60 percent success ratio. The students are thoroughly documenting their own experiments and results via a standard research paper guideline generated by the GAS-450 technical staff. Lessons learned (program management and technical) are documented at the end of the paper. If any other organization needs payload/experiment development or NASA documentation assistance, then please contact us. We can help make your idea a space tested reality. Three years of intense effort culminated on 3 February 1993, the GSFC field operations team at Kennedy Space Center performed the final pressure decay and electrical tests upon the fully integrated GAS-450 flight canister. Subsequently, the payload was integrated with its parent GAS Bridge Assembly in mid-February and the bridge was transferred to the KSC orbiter team in late February 1993. The STS-57 mission originally scheduled to launch on the 29 April 1993 slipped until 21 June 1993. Our Payload shared the cargo bay with ten other GAS Canisters, the EUREKA experiment, the SHOOT experiment, and the SPACEHAB-1 module. The SIL technical staff retrieved the GAS-450 payload after flight from the NASA Spin Test Facility at KSC and shipped it back to California on the 22 July 1993 for student analysis at Allan Hancock College this summer.

Ray, Glen↗
NASA NTRS1993

Rotary encoding device using polygonal mirror with diffraction gratings on each facet

A device for position encoding of a rotating shaft in which a polygonal mirror having a number of facets is mounted to the shaft and a monochromatic light beam is directed towards the facets. The facets of the polygonal mirror each have a low line density diffraction grating to diffract the monochromatic light beam into a number of diffracted light beams such that a number of light spots are created on a linear array detector. An analog-to-digital converter is connected to the linear array detector for reading the position of the spots on the linear array detector means. A microprocessor with memory is connected to the analog-to-digital converter to hold and manipulate the data provided by the analog-to-digital converter on the position of the spots and to compute the position of the shaft based upon the data from the analog-to-digital converter.

Leviton, Douglas B.↗
NASA NTRS1993

Rad-hard computer elements for space applications

Space Hardened CMOS computer elements emulating a commercial microcontroller and microprocessor family have been designed, fabricated, qualified, and delivered for a variety of space programs including NASA's multiple launch International Solar-Terrestrial Physics (ISTP) program, Mars Observer, and government and commercial communication satellites. Design techniques and radiation performance of the 1.25 micron feature size products are described.

Krishnan, G. S.↗
NASA NTRS1993

Mongoose: Creation of a Rad-Hard MIPS R3000

This paper describes the development of a 32 Bit, full MIPS R3000 code-compatible Rad-Hard CPU, code named Mongoose. Mongoose progressed from contract award, through the design cycle, to operational silicon in 12 months to meet a space mission for NASA. The goal was the creation of a fully static device capable of operation to the maximum Mil-883 derated speed, worst-case post-rad exposure with full operational integrity. This included consideration of features for functional enhancements relating to mission compatibility and removal of commercial practices not supported by Rad-Hard technology. 'Mongoose' developed from an evolution of LSI Logic's MIPS-I embedded processor, LR33000, code named Cobra, to its Rad-Hard 'equivalent', Mongoose. The term 'equivalent' is used to infer that the core of the processor is functionally identical, allowing the same use and optimizations of the MIPS-I Instruction Set software tool suite for compilation, software program trace, etc. This activity was started in September of 1991 under a contract from NASA-Goddard Space Flight Center (GSFC)-Flight Data Systems. The approach affected a teaming of NASA-GSFC for program development, LSI Logic for system and ASIC design coupled with the Rad-Hard process technology, and Harris (GASD) for Rad-Hard microprocessor design expertise. The program culminated with the generation of Rad-Hard Mongoose prototypes one year later.

Lincoln, Dan↗
NASA NTRS1993

Network command processing system overview

The Network Command Processing System (NCPS) developed for the National Aeronautics and Space Administration (NASA) Ground Network (GN) stations is a spacecraft command system utilizing a MULTIBUS I/68030 microprocessor. This system was developed and implemented at ground stations worldwide to provide a Project Operations Control Center (POCC) with command capability for support of spacecraft operations such as the LANDSAT, Shuttle, Tracking and Data Relay Satellite, and Nimbus-7. The NCPS consolidates multiple modulation schemes for supporting various manned/unmanned orbital platforms. The NCPS interacts with the POCC and a local operator to process configuration requests, generate modulated uplink sequences, and inform users of the ground command link status. This paper presents the system functional description, hardware description, and the software design.

Nam, Yon-Woo↗
NASA NTRS1992

Instruction set commutivity

We present a state property called congruence and show how it can be used to demonstrate commutivity of instructions in a modern load-store architecture. Our analysis is particularly important in pipelined microprocessors where instructions are frequently reordered to avoid costly delays in execution caused by hazards. Our work has significant implications to safety and security critical applications since reordering can easily change the meaning and an instruction sequence and current techniques are largely ad hoc. Our work is done in a mechanical theorem prover and results in a set of trustworthy rules for instruction reordering. The mechanization makes it practical to analyze the entire instruction set.

Windley, P.↗
NASA NTRS1993

Towards the formal verification of the requirements and design of a processor interface unit: HOL listings

This technical report contains the Higher-Order Logic (HOL) listings of the partial verification of the requirements and design for a commercially developed processor interface unit (PIU). The PIU is an interface chip performing memory interface, bus interface, and additional support services for a commercial microprocessor within a fault tolerant computer system. This system, the Fault Tolerant Embedded Processor (FTEP), is targeted towards applications in avionics and space requiring extremely high levels of mission reliability, extended maintenance-free operation, or both. This report contains the actual HOL listings of the PIU verification as it currently exists. Section two of this report contains general-purpose HOL theories and definitions that support the PIU verification. These include arithmetic theories dealing with inequalities and associativity, and a collection of tactics used in the PIU proofs. Section three contains the HOL listings for the completed PIU design verification. Section 4 contains the HOL listings for the partial requirements verification of the P-Port.

Fura, David A.↗
NASA NTRS1993

K- and Ka-band mobile-vehicular satellite-tracking reflector antenna system for the NASA ACTS mobile terminal

This paper describes the development of the K- and Ka-band mobile-vehicular satellite-tracking reflector antenna system for NASA's ACTS Mobile Terminal (AMT) project. ACTS is NASA's Advanced Communications Technology Satellites. The AMT project will make the first experimental use of ACTS soon after the satellite is operational, to demonstrate mobile communications via the satellite from a van on the road. The AMT antenna system consists of a mechanically steered small reflector antenna, using a shared aperture for both frequency bands and fitting under a radome of 23 cm diameter and 10 cm height, and a microprocessor controlled antenna controller that tracks the satellite as the vehicle moves about. The RF and mechanical characteristics of the antenna and the antenna tracking control system are discussed. Measurements of the antenna performance are presented.

Densmore, Art↗
NASA NTRS1993

Towards the formal specification of the requirements and design of a processor interface unit: HOL listings

This technical report contains the HOL listings of the specification of the design and major portions of the requirements for a commercially developed processor interface unit (or PIU). The PIU is an interface chip performing memory interface, bus interface, and additional support services for a commercial microprocessor within a fault-tolerant computer system. This system, the Fault-Tolerant Embedded Processor (FTEP), is targeted towards applications in avionics and space requiring extremely high levels of mission reliability, extended maintenance-free operation, or both. This report contains the actual HOL listings of the PIU specification as it currently exists. Section two of this report contains general-purpose HOL theories that support the PIU specification. These theories include definitions for the hardware components used in the PIU, our implementation of bit words, and our implementation of temporal logic. Section three contains the HOL listings for the PIU design specification. Aside from the PIU internal bus (I-Bus), this specification is complete. Section four contains the HOL listings for a major portion of the PIU requirements specification. Specifically, it contains most of the definition for the PIU behavior associated with memory accesses initiated by the local processor.

Fura, David A.↗
NASA NTRS1993

Towards the formal specification of the requirements and design of a processor interface unit

Work to formally specify the requirements and design of a Processor Interface Unit (PIU), a single-chip subsystem providing memory interface, bus interface, and additional support services for a commercial microprocessor within a fault-tolerant computer system, is described. This system, the Fault-Tolerant Embedded Processor (FTEP), is targeted towards applications in avionics and space requiring extremely high levels of mission reliability, extended maintenance free operation, or both. The approaches that were developed for modeling the PIU requirements and for composition of the PIU subcomponents at high levels of abstraction are described. These approaches were used to specify and verify a nontrivial subset of the PIU behavior. The PIU specification in Higher Order Logic (HOL) is documented in a companion NASA contractor report entitled 'Towards the Formal Specification of the Requirements and Design of a Processor Interfacs Unit - HOL Listings.' The subsequent verification approach and HOL listings are documented in NASA contractor report entitled 'Towards the Formal Verification of the Requirements and Design of a Processor Interface Unit' and NASA contractor report entitled 'Towards the Formal Verification of the Requirements and Design of a Processor Interface Unit - HOL Listings.'

Fura, David A.↗
NASA NTRS1993

High performance flight computer developed for deep space applications

The development of an advanced space flight computer for real time embedded deep space applications which embodies the lessons learned on Galileo and modern computer technology is described. The requirements are listed and the design implementation that meets those requirements is described. The development of SPACE-16 (Spaceborne Advanced Computing Engine) (where 16 designates the databus width) was initiated to support the MM2 (Marine Mark 2) project. The computer is based on a radiation hardened emulation of a modern 32 bit microprocessor and its family of support devices including a high performance floating point accelerator. Additional custom devices which include a coprocessor to improve input/output capabilities, a memory interface chip, and an additional support chip that provide management of all fault tolerant features, are described. Detailed supporting analyses and rationale which justifies specific design and architectural decisions are provided. The six chip types were designed and fabricated. Testing and evaluation of a brass/board was initiated.

Bunker, Robert L.↗
NASA NTRS1994

Application of fuzzy logic to the control of wind tunnel settling chamber temperature

The application of Fuzzy Logic Controllers (FLC's) to the control of nonlinear processes, typically controlled by a human operator, is a topic of much study. Recent application of a microprocessor-based FLC to the control of temperature processes in several wind tunnels has proven to be very successful. The control of temperature processes in the wind tunnels requires the ability to monitor temperature feedback from several points and to accommodate varying operating conditions in the wind tunnels. The FLC has an intuitive and easily configurable structure which incorporates the flexibility required to have such an ability. The design and implementation of the FLC is presented along with process data from the wind tunnels under automatic control.

Gwaltney, David A.↗