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At least 1,009 records · Page 56

A Low-Power High-Speed Smart Sensor Design for Space Exploration Missions

A low-power high-speed smart sensor system based on a large format active pixel sensor (APS) integrated with a programmable neural processor for space exploration missions is presented. The concept of building an advanced smart sensing system is demonstrated by a system-level microchip design that is composed with an APS sensor, a programmable neural processor, and an embedded microprocessor in a SOI CMOS technology. This ultra-fast smart sensor system-on-a-chip design mimics what is inherent in biological vision systems. Moreover, it is programmable and capable of performing ultra-fast machine vision processing in all levels such as image acquisition, image fusion, image analysis, scene interpretation, and control functions. The system provides about one tera-operation-per-second computing power which is a two order-of-magnitude increase over that of state-of-the-art microcomputers. Its high performance is due to massively parallel computing structures, high data throughput rates, fast learning capabilities, and advanced VLSI system-on-a-chip implementation.

Fang, Wai-Chi↗

Cooperative Mission Concepts Using Biomorphic Explorers

Inspired by the immense variety of naturally curious explorers (insects, animals, and birds), their wellintegrated biological sensor-processor suites, efficiently packaged in compact but highly dexterous forms, and their complex, intriguing, cooperative behavior, this paper focuses on "Biomorphic Explorers", their defination/classification, their designs, and presents planetary exploration scenarios based on the designs. Judicious blend of bio-inspired concepts and recent advances in micro-air vehicles, microsensors, microinstruments, MEMS, and microprocessors clearly suggests that the time of small, dedicated, low cost explorers that capture some of the key features of biological systems has arrived. Just as even small insects like ants, termites, honey bees etc working cooperatively in colonies can achieve big tasks, the biomorphic explorers hold the potential for obtaining science in-accessible by current large singular exploration platforms.

Thakoor, S.↗

A Portable Battery for Objective, Nonobtrusive Measures of Human Performance

A need exists for a standardized battery of human performance tests in order to measure the effects of various treatments. The present paper reports on progress in such a program, funded jointly by NASA and the Navy. Three batteries are available which differ in length (7.5, 15, and 30 minutes), and number of tests in the battery (3, 10, and 15). All tests are implemented on a portable, lap-held, briefcase-sized microprocessor (NEC PC 8201A). Performances measured include information processing, memory, visual perception, reasoning, motor skills, etc. Current programs are underway to determine norms, reliabilities, stabilities, factor structure of tests, comparisons with marker tests, apparatus suitability, etc.

Kennedy, Robert S.↗

Automatic Blood Pressure Measurements During Exercise

Microprocessor circuits and a computer algorithm for automatically measuring blood pressure during ambulatory monitoring and exercise stress testing have been under development at SRI International. A system that records ECG, Korotkov sound, and arm cuff pressure for off-line calculation of blood pressure has been delivered to NASA, and an LSLE physiological monitoring system that performs the algorithm calculations in real-time is being constructed. The algorithm measures the time between the R-wave peaks and the corresponding Korotkov sound on-set (RK-interval). Since the curve of RK-interval versus cuff pressure during deflation is predictable and slowly varying, windows can be set around the curve to eliminate false Korotkov sound detections that result from noise. The slope of this curve, which will generally decrease during exercise, is the inverse of the systolic slope of the brachial artery pulse. In measurements taken during treadmill stress testing, the changes in slopes of subjects with coronary artery disease were markedly different from the changes in slopes of healthy subjects. Measurements of slope and O2 consumption were also made before and after ten days of bed rest during NASA/Ames Research Center bed rest studies. Typically, the maximum rate of O2 consumption during the post-bed rest test is less than the maximum rate during the pre-bed rest test. The post-bed rest slope changes differ from the pre-bed rest slope changes, and the differences are highly correlated with the drop in the maximum rate of O2 consumption. We speculate that the differences between pre- and post-bed rest slopes are due to a drop in heart contractility.

Weaver, Charles S.↗

Outline: Recent work at JPL Under MSREP

MSREP is a multi-faceted program with radiation effects in new technologies, development of testing and hardness assurance methods, continual evaluation of space and laboratory test data and support to NASA Projects. Other work in progress includes: 1) Device Scaling and New Phenomena; 2) Radiation Effects in Microprocessors; 3) Latchup Testing and Latchup Mitigation; and 4) Revised Radiation Design Approaches. This paper is in viewgraph form.

Source record↗

Imaging Electron Spectrometer (IES) Electron Preprocessor (EPP) Design

The Aerospace Corporation developed the Electron PreProcessor (EPP) to support the Imaging Electron Spectrometer (IES) that is part of the RAPID experiment on the ESA/NASA CLUSTER mission. The purpose of the EPP is to collect raw data from the IES and perform processing and data compression on it before transferring it to the RAPID microprocessor system for formatting and transmission to the CLUSTER satellite data system. The report provides a short history of the RAPID and CLUSTER programs and describes the EPP design. Four EPP units were fabricated, tested, and delivered for the original CLUSTER program. These were destroyed during a launch failure. Four more EPP units were delivered for the CLUSTER II program. These were successfully launched and are operating nominally on orbit.

Fennell, J. F.↗

PiVoT GPS Receiver

NASA Goddard Space Flight Center has built an open architecture, 24 channel spaceflight Global Positioning System (GPS) receiver. The compact PCI PiVoT GPS receiver card is based on the Mitel/GEC Plessey Builder 2 board. PiVoT uses two Plessey 2021 correlators to allow tracking of up to 24 separate GPS SV's on unique channels. Its four front ends can support four independent antennas, making it a useful card for hosting GPS attitude determination algorithms. It has been built using space quality, radiation tolerant parts. The PiVoT card works at a lower signal to noise ratio than the original Builder 2 board. It also hosts an improved clock oscillator. The PiVoT software is based on the original Piessey Builder 2 software ported to the Linux operating system. The software is posix compliant and can be easily converted to other posix operating systems. The software is open source to anyone with a licensing agreement with Plessey. Additional tasks can be added to the software to support GPS science experiments or attitude determination algorithms. The next generation PiVoT receiver will be a single radiation hardened compact PCI card containing the microprocessor and the GPS receiver optimized for use above the GPS constellation.

Wennersten, Miriam↗

Applications Performance on NAS Intel Paragon XP/S - 15#

The Numerical Aerodynamic Simulation (NAS) Systems Division received an Intel Touchstone Sigma prototype model Paragon XP/S- 15 in February, 1993. The i860 XP microprocessor with an integrated floating point unit and operating in dual -instruction mode gives peak performance of 75 million floating point operations (NIFLOPS) per second for 64 bit floating point arithmetic. It is used in the Paragon XP/S-15 which has been installed at NAS, NASA Ames Research Center. The NAS Paragon has 208 nodes and its peak performance is 15.6 GFLOPS. Here, we will report on early experience using the Paragon XP/S- 15. We have tested its performance using both kernels and applications of interest to NAS. We have measured the performance of BLAS 1, 2 and 3 both assembly-coded and Fortran coded on NAS Paragon XP/S- 15. Furthermore, we have investigated the performance of a single node one-dimensional FFT, a distributed two-dimensional FFT and a distributed three-dimensional FFT Finally, we measured the performance of NAS Parallel Benchmarks (NPB) on the Paragon and compare it with the performance obtained on other highly parallel machines, such as CM-5, CRAY T3D, IBM SP I, etc. In particular, we investigated the following issues, which can strongly affect the performance of the Paragon: a. Impact of the operating system: Intel currently uses as a default an operating system OSF/1 AD from the Open Software Foundation. The paging of Open Software Foundation (OSF) server at 22 MB to make more memory available for the application degrades the performance. We found that when the limit of 26 NIB per node out of 32 MB available is reached, the application is paged out of main memory using virtual memory. When the application starts paging, the performance is considerably reduced. We found that dynamic memory allocation can help applications performance under certain circumstances. b. Impact of data cache on the i860/XP: We measured the performance of the BLAS both assembly coded and Fortran coded. We found that the measured performance of assembly-coded BLAS is much less than what memory bandwidth limitation would predict. The influence of data cache on different sizes of vectors is also investigated using one-dimensional FFTs. c. Impact of processor layout: There are several different ways processors can be laid out within the two-dimensional grid of processors on the Paragon. We have used the FFT example to investigate performance differences based on processors layout.

Saini, Subhash↗

Performance of BLAS 3, FFTs and NAS Parallel Benchmarks on Cray T3D

Recently, a Cray T3D Emulator has been made available on the Cray Y-MP and C90 computers. The Pittsburgh Supercomputer Center has acquired a CRAY T3D system and many other centers like Jet Propulsion Laboratory (JPL) will have it by the end of 1994. The Cray T3D system is the firstphase system in Cray Research, Inc.'s (CRI) three-phase massively parallel processing (MPP) program. This system features a heterogeneous architecture that closely couples DEC's ALPHA microprocessors and CRI's parallel-vector technology, i.e. the Cray Y-MP and Cray C90. The Cray T3D Emulator will give prospective users a valuable experience in developing high performance applications on the MPP system. This emulator runs programs written in CRI's MPP Fortran programming model (data sharing and work sharing) or Parallel Virtual Machine (PVM) programming model. It will help the users to study data layout, data locality, and data reference patterns thereby providing feedback which will enable one to write more efficient parallel codes. An overview of the Cray T3D hardware, software, and three of its available programming models is presented.The Cray Fortran Programming Model comprising (a) Data Sharing, (b) Worksharing and (c) Message Passing, will be discussed with examples. We have also implemented distributed BLAS 3 (matrix-matrix multiplication) in data parallel model (using only CSHIFT); worksharing model using block distribution and collapsed distribution; and message passing model using PVM. We have also implemented 2D and 3D FFTs for radix-2 using PVM. The performance of NAS Parallel 'Benchmarks (NPB) on CRAY T3D will be compared with other highly parallel systems such as CM-5, Paragon, C90 etc.

Saini, Subhash↗

Rock Driller

The next series of planetary exploration missions require a method of extracting rock and soil core samples. Therefore a prototype ultrasonic core driller (UTCD) was developed to meet the constraints of Small Bodies Exploration and Mars Sample Return Missions. The constraints in the design are size, weight, power, and axial loading. The ultrasonic transducer requires a relatively low axial load, which is one of the reasons this technology was chosen. The ultrasonic generator breadboard section can be contained within the 5x5x3 limits and weighs less than two pounds. Based on results attained the objectives for the first phase were achieved. A number of transducer probes were made and tested. One version only drills, and the other will actually provide a small core from a rock. Because of a more efficient transducer/probe, it will run at very low power (less than 5 Watts) and still drill/core. The prototype generator was built to allow for variation of all the performance-effecting elements of the transducer/probe/end effector, i.e., pulse, duty cycle, frequency, etc. The heart of the circuitry is what will be converted to a surface mounted board for the next phase, after all the parameters have been optimized and the microprocessor feedback can be installed.

Peterson, Thomas M.↗

Full Duplex, Spread Spectrum Radio System

The goal of this project was to support the development of a full duplex, spread spectrum voice communications system. The assembly and testing of a prototype system consisting of a Harris PRISM spread spectrum radio, a TMS320C54x signal processing development board and a Zilog Z80180 microprocessor was underway at the start of this project. The efforts under this project were the development of multiple access schemes, analysis of full duplex voice feedback delays, and the development and analysis of forward error correction (FEC) algorithms. The multiple access analysis involved the selection between code division multiple access (CDMA), frequency division multiple access (FDMA) and time division multiple access (TDMA). Full duplex voice feedback analysis involved the analysis of packet size and delays associated with full loop voice feedback for confirmation of radio system performance. FEC analysis included studies of the performance under the expected burst error scenario with the relatively short packet lengths, and analysis of implementation in the TMS320C54x digital signal processor. When the capabilities and the limitations of the components used were considered, the multiple access scheme chosen was a combination TDMA/FDMA scheme that will provide up to eight users on each of three separate frequencies. Packets to and from each user will consist of 16 samples at a rate of 8,000 samples per second for a total of 2 ms of voice information. The resulting voice feedback delay will therefore be 4 - 6 ms. The most practical FEC algorithm for implementation was a convolutional code with a Viterbi decoder. Interleaving of the bits of each packet will be required to offset the effects of burst errors.

Harvey, Bruce A.↗

Parallel Processing Systems for Passive Ranging During Helicopter Flight

The complexity of rotorcraft missions involving operations close to the ground result in high pilot workload. In order to allow a pilot time to perform mission-oriented tasks, sensor-aiding and automation of some of the guidance and control functions are highly desirable. Images from an electro-optical sensor provide a covert way of detecting objects in the flight path of a low-flying helicopter. Passive ranging consists of processing a sequence of images using techniques based on optical low computation and recursive estimation. The passive ranging algorithm has to extract obstacle information from imagery at rates varying from five to thirty or more frames per second depending on the helicopter speed. We have implemented and tested the passive ranging algorithm off-line using helicopter-collected images. However, the real-time data and computation requirements of the algorithm are beyond the capability of any off-the-shelf microprocessor or digital signal processor. This paper describes the computational requirements of the algorithm and uses parallel processing technology to meet these requirements. Various issues in the selection of a parallel processing architecture are discussed and four different computer architectures are evaluated regarding their suitability to process the algorithm in real-time. Based on this evaluation, we conclude that real-time passive ranging is a realistic goal and can be achieved with a short time.

Sridhar, Bavavar↗

PiVoT GPS Receiver

NASA Goddard Space Flight Center has built an open architecture, 24 channel space flight GPS receiver. The CompactPCI PiVoT GPS receiver card is based on the Mitel/GEC Plessey Builder-2 board. PiVoT uses two Plessey 2021 correlators to allow tracking of up to 24 separate GPS SV's on unique channels. Its four front ends can support four independent antennas, making it a useful card for hosting GPS attitude determination algorithms. It has been built using space quality, radiation tolerant parts. The PiVoT card will track a weaker signal than the original Builder 2 board. It also hosts an improved clock oscillator. The PiVoT software is based on the original Plessey Builder 2 software ported to the Linux operating system. The software is POSIX complaint and can easily be converted to other POSIX operating systems. The software is open source to anyone with a licensing agreement with Plessey. Additional tasks can be added to the software to support GPS science experiments or attitude determination algorithms. The next generation PiVoT receiver will be a single radiation hardened CompactPCI card containing the microprocessor and the GPS receiver optimized for use above the GPS constellation. PiVoT was flown successfully on a balloon in July, 2001, for its first non-simulated flight.

Wennersten, Miriam Dvorak↗

High Performance Programming Using Explicit Shared Memory Model on Cray T3D1

The Cray T3D system is the first-phase system in Cray Research, Inc.'s (CRI) three-phase massively parallel processing (MPP) program. This system features a heterogeneous architecture that closely couples DEC's Alpha microprocessors and CRI's parallel-vector technology, i.e., the Cray Y-MP and Cray C90. An overview of the Cray T3D hardware and available programming models is presented. Under Cray Research adaptive Fortran (CRAFT) model four programming methods (data parallel, work sharing, message-passing using PVM, and explicit shared memory model) are available to the users. However, at this time data parallel and work sharing programming models are not available to the user community. The differences between standard PVM and CRI's PVM are highlighted with performance measurements such as latencies and communication bandwidths. We have found that the performance of neither standard PVM nor CRI s PVM exploits the hardware capabilities of the T3D. The reasons for the bad performance of PVM as a native message-passing library are presented. This is illustrated by the performance of NAS Parallel Benchmarks (NPB) programmed in explicit shared memory model on Cray T3D. In general, the performance of standard PVM is about 4 to 5 times less than obtained by using explicit shared memory model. This degradation in performance is also seen on CM-5 where the performance of applications using native message-passing library CMMD on CM-5 is also about 4 to 5 times less than using data parallel methods. The issues involved (such as barriers, synchronization, invalidating data cache, aligning data cache etc.) while programming in explicit shared memory model are discussed. Comparative performance of NPB using explicit shared memory programming model on the Cray T3D and other highly parallel systems such as the TMC CM-5, Intel Paragon, Cray C90, IBM-SP1, etc. is presented.

Simon, Horst D.↗

The NASA Ames Closed Environmental Research Chamber: Present Status

The Closed Environmental Research Chamber (CERC) at the NASA Ames Research Center was created to investigate both components and complete systems for life support of advanced space exploration missions. This facility includes a Main Chamber, an Airlock, a Sample Transfer Lock, a Vacuum System, an Air Recompression System, a dedicated control room and a pit area for housing supporting and environmental control systems. The Main Chamber provides 310 sq ft of internal working/living space on two levels. It is planned that the CERC will be a human-rated facility for habitation simulation under mass balance closure conditions. The internal pressure will be variable over the range of 14.7 psia to 5 psia with accompanying capability for variation in atmosphere composition to maintain the oxygen partial pressure at 160 mm Hg. The CERC will be provided with a core set of primary life support subsystems for temperature and humidity control, C02 removal and trace contaminant control. Interfacing with external life support technology test b~ds with be provided, along with connection to centralized, microprocessor-based data acquisition and control systems. This paper will discuss the current status of the CERC facility and show how it is being used to address the advanced technology requirements necessary to implement an integrated working and living environment for a planetary habitat. In particular, it will be shown how the CERC, along with a human-powered centrifuge, a planetary terrain simulator and advanced displays and a virtual reality capability will work together to develop and demonstration applicable technologies for future planetary habitats. Artificial intelligence and expert system programming techniques will be used extensively to provide an automated environment for a 4-person crew. There will be several robotic mechanisms performing exploration tasks external to the habitat that will be controlled through the virtual environment to provide representative workloads for the crew. Finally, there will be a discussion of how effective are innovative new multidisciplinary test facilities to the investigation of the wide range of human and machine problems inherent in exploration missions.

Gross, Anthony R.↗

Development of a Gas-Fed Pulse Detonation Research Engine

In response to the growing need for empirical data on pulse detonation engine performance and operation, NASA Marshall Space Flight Center has developed and placed into operation a low-cost gas-fed pulse detonation research engine. The guiding design strategy was to achieve a simple and flexible research apparatus, which was inexpensive to build and operate. As such, the engine was designed to operate as a heat sink device, and testing was limited to burst-mode operation with run durations of a few seconds. Wherever possible, maximum use was made of standard off-the-shelf industrial or automotive components. The 5-cm diameter primary tube is about 90-cm long and has been outfitted with a multitude of sensor and optical ports. The primary tube is fed by a coaxial injector through an initiator tube, which is inserted directly into the injector head face. Four auxiliary coaxial injectors are also integrated into the injector head assembly. All propellant flow is controlled with industrial solenoid valves. An automotive electronic ignition system was adapted for use, and spark plugs are mounted in both tubes so that a variety of ignition schemes can be examined. A microprocessor-based fiber-optic engine control system was developed to provide precise control over valve and ignition timing. Initial shakedown testing with hydrogen/oxygen mixtures verified the need for Schelkin spirals in both the initiator and primary tubes to ensure rapid development of the detonation wave. Measured pressure wave time-of-flight indicated detonation velocities of 2.4 km/sec and 2.2 km/sec in the initiator and primary tubes, respectively. These values implied a fuel-lean mixture corresponding to an H2 volume fraction near 0.5. The axial distribution for the detonation velocity was found to be essentially constant along the primary tube. Time-resolved thrust profiles were also acquired for both underfilled and overfilled tube conditions. These profiles are consistent with previous time-resolved measurements on single-cycle tubes where the thrust is found to peak as the detonation wave exits the tube, and decay as the tube blows down.

Litchford, Ron J.↗

RISC Processors and High Performance Computing

This tutorial will discuss the top five RISC microprocessors and the parallel systems in which they are used. It will provide a unique cross-machine comparison not available elsewhere. The effective performance of these processors will be compared by citing standard benchmarks in the context of real applications. The latest NAS Parallel Benchmarks, both absolute performance and performance per dollar, will be listed. The next generation of the NPB will be described. The tutorial will conclude with a discussion of future directions in the field. Technology Transfer Considerations: All of these computer systems are commercially available internationally. Information about these processors is available in the public domain, mostly from the vendors themselves. The NAS Parallel Benchmarks and their results have been previously approved numerous times for public release, beginning back in 1991.

Bailey, David H.↗

Energy Storage Flywheels on Spacecraft

With advances in carbon composite material, magnetic bearings, microprocessors, and high-speed power switching devices, work has begun on a space qualifiable Energy Momentum Wheel (EMW). An EMW is a device that can be used on a satellite to store energy, like a chemical battery, and manage angular momentum, like a reaction wheel. These combined functions are achieved by the simultaneous and balanced operation of two or more energy storage flywheels. An energy storage flywheel typically consists of a carbon composite rotor driven by a brushless DC motor/generator. Each rotor has a relatively large angular moment of inertia and is suspended on magnetic bearings to minimize energy loss. The use of flywheel batteries on spacecraft will increase system efficiencies (mass and power), while reducing design-production time and life-cycle cost. This paper will present a discussion of flywheel battery design considerations and a simulation of spacecraft system performance utilizing four flywheel batteries to combine energy storage and momentum management for a typical LEO satellite. A proposed set of control laws and an engineering animation will also be presented. Once flight qualified and demonstrated, space flywheel batteries may alter the architecture of most medium and high-powered spacecraft.

Bartlett, Robert O.↗