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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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All sourcesNASA NTRSDOE OSTI
NASA NTRS1993

A method of making a single layer multi-color luminescent display

The invention is a method of forming a multi-color luminescent display including the steps of depositing on an insulator substrate a smooth single layer of host material which itself may be a phosphor with the properties to host varying quantities of different impurities and introducing one or more of said different impurities into selected areas of the single layer of host material via an appropriately positioned mask as by thermal diffusion or ion-implantation to form a pattern of phosphors of different colors in the single layer of host material such that the top surface of the host layer remains smooth. Red phosphors are formed by adding impurities selected from the group consisting of Sm, SmF3, Eu, EuF3, and ZnS:MnTbF3 to a ZnS host; green phosphors by adding impurities selected from the group consisting of Tb and TbF3 to a ZnS host; and blue phosphors by adding impurities selected from the group consisting of Tm, Al, Ag, and Mg to a ZnS host.

Robertson, James B.↗
NASA NTRS1993

High-performance visible/UV CCD focal plane technology for spacebased applications

We describe recent technology developments aimed at large CCD imagers for space based applications in the visible and UV. Some of the principal areas of effort include work on reducing device degradation in the natural space-radiation environment, improvements in quantum efficiency in the visible and UV, and larger-device formats. One of the most serious hazards for space based CCD's operating at low signal levels is the displacement damage resulting from bombardment by energetic protons. Such damage degrades charge-transfer efficiency and increases dark current. We have achieved improved hardness to proton-induced displacement damage by selective ion implants into the CCD channel and by reduced temperature of operation. To attain high quantum efficiency across the visible and UV we have developed a technology for back-illuminated CCD's. With suitable antireflection (AR) coatings such devices have quantum efficiencies near 90 percent in the 500-700-nm band. In the UV band from 200 to 400 nm, where it is difficult to find coatings that are sufficiently transparent and can provide good matching to the high refractive index of silicon, we have been able to substantially increase the quantum efficiency using a thin film of HfO2 as an AR coating. These technology efforts were applied to a 420 x 420-pixel frame-transfer imager, and future work will be extended to a 1024 x 1024-pixel device now under development.

Burke, B. E.↗
NASA NTRS1993

Electrochemical patterning of amorphous carbon on diamond

The ability to pattern ion-implantation damaged or other nondiamond carbon on a diamond substrate is useful for fabricating a variety of devices. We accomplished such patterning by an unmasked implantation into a diamond substrate followed by photolithography and a selective electrochemical etch. The use of a high resistivity medium coupled with applied biases over 50 V permitted etching without requiring contact between the substrate and an electrode. Many electrolytes gave etches that exhibit high selectivity for nondiamond carbon over both diamond and dielectrics such as photoresist. Optical, electrical, and Raman spectroscopic measurements elucidate the effects of the etch on the implanted diamond surface.

Marchywka, Mike↗
NASA NTRS1983

Improved fabrication techniques for infrared bolometers

Techniques are described for producing improved infrared bolometers from doped germanium. Ion implantation and sputter metalization have been used to make ohmic electrical contacts to Ge:Ga chips. This method results in a high yield of small monolithic bolometers with very little low-frequency noise. When one of these chips is used as the thermometric element of a composite bolometer, it must be bonded to a dielectric substrate. The thermal resistance of the conventional epoxy bond has been measured and found to be undesirably large. A procedure for soldering the chip to a metalized portion of the substrate is described which reduced this resistance. The contribution of the metal film absorber to the heat capacity of a composite bolometer has been measured. The heat capacity of a NiCr absorber at 1.3 K can dominate the bolometer performance. A Bi absorber has significantly lower heat capacity. A low temperature blackbody calibrator has been built to measure the optical responsivity of bolometers. A composite bolometer system with a throughput of approx. 0.1 sr sq cm was constructed using the new techniques. In negligible background it has an optical NEP of 3.6 10((exp -15) W/sq root of Hz at 1.0 K with a time constant of 20 ms. The noise in this bolometer is white above 2.5 Hz and is somewhat below the value predicted by thermodynamic equilibrium theory. It is in agreement with calculations based on a recent nonequilibrium theory.

Lange, A. E.↗
NASA NTRS1994

Making Porous Luminescent Regions In Silicon Wafers

Regions damaged by ion implantation stain-etched. Porous regions within single-crystal silicon wafers fabricated by straightforward stain-etching process. Regions exhibit visible photoluminescence at room temperature and might constitute basis of novel class of optoelectronic devices. Stain-etching process has advantages over recently investigated anodic-etching process. Process works on both n-doped and p-doped silicon wafers. Related development reported in article, "Porous Si(x)Ge(1-x) Layers Within Single Crystals of Si," (NPO-18836).

Fathauer, Robert W.↗
NASA NTRS1988

Ku-band high efficiency GaAs MMIC power amplifiers

The development of Ku-band high efficiency GaAs MMIC power amplifiers is examined. Three amplifier modules operating over the 13 to 15 GHz frequency range are to be developed. The first MMIC is a 1 W variable power amplifier (VPA) with 35 percent efficiency. On-chip digital gain control is to be provided. The second MMIC is a medium power amplifier (MPA) with an output power goal of 1 W and 40 percent power-added efficiency. The third MMIC is a high power amplifier (HPA) with 4 W output power goal and 40 percent power-added efficiency. An output power of 0.36 W/mm with 49 percent efficiency was obtained on an ion implanted single gate MESFET at 15 GHz. On a dual gate MESFET, an output power of 0.42 W/mm with 27 percent efficiency was obtained. A mask set was designed that includes single stage, two stage, and three stage single gate amplifiers. A single stage 600 micron amplifier produced 0.4 W/mm output power with 40 percent efficiency at 14 GHz. A four stage dual gate amplifier generated 500 mW of output power with 20 dB gain at 17 GHz. A four-bit digital-to-analog converter was designed and fabricated which has an output swing of -3 V to +/- 1 V.

Tserng, H. Q.↗
NASA NTRS1994

Growth studies of erbium-doped GaAs deposited by metalorganic vapor phase epitaxy using noval cyclopentadienyl-based erbium sources

Erbium-doped GaAS layers were grown by metalorganic vapor phase epitaxy using two new sources, bis(i-propylcyclopentadienyl)cyclopentadienyl erbium and tris(t-butylcyclopentadienyl) erbium. Controlled Er doping in the range of 10(exp 17) - 10(exp 18)/cu cm was achieved using a relatively low source temperature of 90 C. The doping exhibits a second-order dependence on inlet source partial pressure, similar to behavior obtained with cyclopentadienyl Mg dopant sources. Equivalent amounts of oxygen and Er are present in 'as-grown' films indicating that the majority of Er dopants probably exist as Er-O complexes in the material. Er(+3) luminescence at 1.54 micrometers was measured from the as-grown films, but ion implantation of additional oxygen decreases the emission intensity. Electrical compensation of n-type GaAs layers codoped with Er and Si is directly correlated to the Er concentration is proposed to arise from the deep centers associated with Er which are responsible for a broad emission band near 0.90 micrometers present in the photoluminescence spectra of GaAs:Si, Er films.

Redwing, J. M.↗
NASA NTRS1990

Applying CLIPS to control of molecular beam epitaxy processing

A key element of U.S. industrial competitiveness in the 1990's will be the exploitation of advanced technologies which involve low-volume, high-profit manufacturing. The demands of such manufacture limit participation to a few major entities in the U.S. and elsewhere, and offset the lower manufacturing costs of other countries which have, for example, captured much of the consumer electronics market. One such technology is thin-film epitaxy, a technology which encompasses several techniques such as Molecular Beam Epitaxy (MBE), Chemical Beam Epitaxy (CBE), and Vapor-Phase Epitaxy (VPE). Molecular Beam Epitaxy (MBE) is a technology for creating a variety of electronic and electro-optical materials. Compared to standard microelectronic production techniques (including gaseous diffusion, ion implantation, and chemical vapor deposition), MBE is much more exact, though much slower. Although newer than the standard technologies, MBE is the technology of choice for fabrication of ultraprecise materials for cutting-edge microelectronic devices and for research into the properties of new materials.

Rabeau, Arthur A.↗
NASA NTRS1995

Design of a three-layer antireflection coating for high efficiency indium phosphide solar cells using a chemical oxide as first layer

It is well known that the behavior of III-V compound based solar cells is largely controlled by their surface, since the majority of light generated carriers (63% for GaAs and 79% for InP) are created within 0.2 mu m of the surface of the illuminated cell. Consequently, the always observed high surface recombination velocity (SRV) on these cells is a serious limiting factor for their high efficiency performance, especially for those with p-n junction made by either thermal diffusion or ion implantation. A good surface passivation layer, ideally a grown oxide as opposed to a deposited one, will cause a significant reduction in the SRV without adding interface problems, thus improving the performance of III-V compound based solar cells. Another significant benefit to the overall performance of the solar cells can be achieved by a substantial reduction of their large surface optical reflection by the use of a well designed antireflection (AR) coating. In this paper, we demonstrate the effectiveness of using a chemically grown thermally and chemically stable oxide, not only for surface passivation but also as an integral part of a 3-layer AR coating for thermally diffused p+n InP solar cells. A phosphorus-rich interfacial oxide, In(PO3)3, is grown at the surface of the p+ emitter using an etchant based on HNO3, o-H3PO4 and H2O2. This oxide has the unique properties of passivating the surface as well as serving as an efficient antireflective layer yielding a measured record high AMO open-circuit voltage of 890.3 mV on a thermally diffused InP(Cd,S) solar cell. Unlike conventional single layer AR coatings such as ZnS, Sb2O3, SiO or double layer AR coatings such as ZnS/MgF2 deposited by e-beam or resistive evaporation, this oxide preserves the stoichiometry of the InP surface. We show that it is possible to design a three-layer AR coating for a thermally diffused InP solar cell using the In(PO3)3 grown oxide as the first layer and Al2O3 and MgF2 as the second and third layers respectively, so as to yield an overall theoretical reflectance of less than 2%. Since chemical oxides are readily grown on III-V semiconductors materials, the technique of using the grown oxide layer to both passivate the surface as well as serve as the first of a multilayer AR coating should work well for all III-V compound-based solar cells.

Moulot, Jacques↗
NASA NTRS1994

Plasma Deposited SiO2 for Planar Self-Aligned Gate Metal-Insulator-Semiconductor Field Effect Transistors on Semi-Insulating InP

Metal-insulator-semiconductor (MIS) field effect transistors were fabricated on InP substrates using a planar self-aligned gate process. A 700-1000 A gate insulator of Si02 doped with phosphorus was deposited by a direct plasma enhanced chemical vapor deposition at 400 mTorr, 275 C, 5 W, and power density of 8.5 MW/sq cm. High frequency capacitance-voltage measurements were taken on MIS capacitors which have been subjected to a 700 C anneal and an interface state density of lxl0(exp 11)/eV/cq cm was found. Current-voltage measurements of the capacitors show a breakdown voltage of 107 V/cm and a insulator resistivity of 10(exp 14) omega cm. Transistors were fabricated on semi-insulating InP using a standard planar self-aligned gate process in which the gate insulator was subjected to an ion implantation activation anneal of 700 C. MIS field effect transistors gave a maximum extrinsic transconductance of 23 mS/mm for a gate length of 3 microns. The drain current drift saturated at 87.5% of the initial current, while reaching to within 1% of the saturated value after only 1x10(exp 3). This is the first reported viable planar InP self-aligned gate transistor process reported to date.

Tabory, Charles N.↗
NASA NTRS1997

Lubrication by Diamond and Diamondlike Carbon Coatings

Regardless of environment (ultrahigh vacuum, humid air, dry nitrogen, or water), ion-beam-deposited diamondlike carbon (DLC) and nitrogen-ion-implanted, chemical-vapor-deposited (CVD) diamond films had low steady-state coefficients of friction (less than 0.1) and low wear rates (less than or equal to 10(exp -6)cu mm/N(dot)m). These films can be used as effective wear-resistant, self-lubricating coatings regardless of environment. On the other hand, as-deposited, fine-grain CVD diamond films; polished, coarse-grain CVD diamond films; and polished and then fluorinated, coarse-grain CVD diamond films can be used as effective wear-resistant, self-lubricating coatings in humid air, in dry nitrogen, and in water, but they had a high coefficient of friction and a high wear rate in ultrahigh vacuum. The polished, coarse-grain CVD diamond film revealed an extremely low wear rate, far less than 10(exp 10) cu mm/N(dot)m, in water.

Miyoshi, Kazuhisa↗
NASA NTRS1996

The Ultrafine Mineralogy of a Molten Interplanetary Dust Particle as an Example of the Quench Regime of Atmospheric Entry Heating

Melting and degassing of interplanetary dust particle L2005B22 at approx. 1200 C was due to flash heating during atmospheric entry. Preservation of the porous particle texture supports rapid quenching from the peak heating temperature whereby olivine and pyroxene nanocrystals (3 nm-26 nm) show partial devitrification of the quenched melt at T approx. = 450 C - 740 C. The implied ultrahigh cooling rates are calculated at approx. 105 C/h-106 C/h, which is consistent with quench rates inferred from the temperature-time profiles based on atmospheric entry heating models. A vesicular rim on a nonstoichiometric relic forsterite grain in this particle represents either evaporative magnesium loss during flash heating or thermally annealed ion implantation texture.

Rietmeijer, Frans J. M.↗
NASA NTRS1999

Surface Design and Engineering Toward Wear-Resistant, Self-Lubricating Diamond Films and Coatings

The tribological properties of chemical-vapor-deposited (CVD) diamond films vary with the environment, possessing a Jekyll-and-Hyde character. CVD diamond has low coefficient of friction and high wear resistance in air but high coefficient of friction and low wear resistance in vacuum. Improving the tribological functionality of materials (such as achieving low friction and good wear resistance) was an aim of this investigation. Three studies on the surface design, surface engineering, and tribology of CVD diamond have shown that its friction and wear are significantly reduced in ultrahigh vacuum. The main criteria for judging whether diamond films are an effective wear-resistant, self-lubricating material were coefficient of friction and wear rate, which must be less than 0.1 and on the order of 10(exp 6) cu mm/N(dot)m, respectively. In the first study the presence of a thin film (less than 1 micron thick) of amorphous, nondiamond carbon (hydrogenated carbon, also called diamondlike carbon or DLC) on CVD diamond greatly decreased the coefficient of friction and the wear rate. Therefore, a thin DLC film on CVD diamond can be an effective wear-resistant, lubricating coating in ultrahigh vacuum. In the second study the presence of an amorphous, nondiamond carbon surface layer formed on CVD diamond by ion implantation significantly reduced the coefficient of friction and the wear rate in ultrahigh vacuum. Therefore, such surface layers are acceptable for effective self-lubricating, wear-resistant applications of CVD diamond. In the third study CVD diamond in contact with cubic boron nitride exhibited low coefficient of friction in ultra high vacuum. Therefore, this materials combination can provide an effective self-lubricating, wear-resistant couple in ultrahigh vacuum.

Miyoshi, Kazuhisa↗
NASA NTRS1999

Surface Design and Engineering Toward Wear-Resistant, Self-Lubricant Diamond Films and Coatings

This chapter describes three studies on the surface design, surface engineering, and tribology of chemical-vapor-deposited (CVD) diamond films and coatings toward wear-resistant, self-lubricating diamond films and coatings. Friction mechanisms and solid lubrication mechanisms of CVD diamond are stated. Effects of an amorphous hydrogenated carbon on CVD diamond, an amorphous, nondiamond carbon surface layer formed on CVD diamond by carbon and nitrogen ion implantation, and a materials combination of cubic boron nitride and CVD diamond on the adhesion, friction, and wear behaviors of CVD diamond in ultrahigh vacuum are described. How surface modification and the selected materials couple improved the tribological functionality of coatings, giving low coefficient of friction and good wear resistance, is explained.

Miyoshi, Kazuhisa↗
NASA NTRS1999

Design and Performance of the Astro-E/XRS Microcalorimeter Array and Anti-Coincidence Detector

The XRS instrument has an array of 32 micro-calorimeters at the focal plane. These calorimeters consist of ion-implanted silicon thermistors and HgTe thermalizing x-ray absorbers. These devices have demonstrated a resolution of 9 eV at 3 keV and 11 eV at 6 keV. We will discuss the basic physical parameters of this array, including the array layout, thermal conductance of the link to the heat sink, operating temperature, thermistor size, absorber choice, and means of attaching the absorber to the thermistor bearing element. We will present representative performance data, though a more detailed presentation of the results of the instrument calibration is presented elsewhere in these proceedings. A silicon ionization detector is located behind the calorimeter array and serves to reject events due to cosmic rays. We will briefly describe this anti-coincidence detector and its performance in conjunction with the array.

Stahle, C. K.↗
NASA NTRS1995

Design of a Three-Layer Antireflection Coating for High Efficiency Indium Phosphide Solar Cells Using a Chemical Oxide as First Layer

It is well known that the behavior of III-V compound based solar cells is largely controlled by their surface, since the majority of light generated carriers (63% for GaAs and 79% for InP) are created within 0.2 microns of the illuminated surface of the cell. Consequently, the always observed high surface recombination velocity (SRV) on these cells is a serious limiting factor for their high efficiency performance, especially for those with the p-n junction made by either thermal diffusion or ion implantation. A good surface passivation layer, ideally, a grown oxide as opposed to a deposited one, will cause a significant reduction in the SRV without adding interface problems, thus improving the performance of III-V compound based solar cells. Another significant benefit to the overall performance of the solar cells can be achieved by a substantial reduction of their large surface optical reflection by the use of a well designed antireflection (AR) coating. In this paper, we demonstrate the effectiveness of using a chemically grown, thermally and chemically stable oxide, not only for surface passivation but also as an integral part of a 3- layer AR coating for thermally diffused p(+)n InP solar cells. A phosphorus-rich interfacial oxide, In(PO3)3, is grown at the surface of the p(+) emitter using an etchant based on HNO3, o-H3PO4 and H2O2. This oxide has the unique properties of passivating the surface as well as serving as a fairly efficient antireflective layer yielding a measured record high AM0, 25 C, open-circuit voltage of 890.3 mV on a thermally diffused InP(Cd,S) solar cell. Unlike conventional single layer AR coatings such as ZnS, Sb2O3, SiO or double layer AR coatings such as ZnS/MgF2 deposited by e-beam or resistive evaporation, this oxide preserves the stoichiometry of the InP surface. We show that it is possible to design a three-layer AR coating for a thermally diffused InP solar cell using the In(PO3)3 grown oxide as the first layer and Al2O3, MgF2 or ZnS, MgF2 as the second and third layers respectively, so as to yield an overall theoretical reflectance of less than 2%. Since chemical oxides are readily grown on III-V semiconductor materials, the technique of using the grown oxide layer to both passivate the surface as well as serve as the first of a multilayer AR coating, should work well for essentially all III-V compound-based solar cells.

Moulot, Jacques↗
NASA NTRS2000

All-Metal Magnetic RAM

The factors that enter into the development of an all-metal, nonvolatile magnetic RAM, in which multilayer giant magnetoresistive films are used for all functions - storage, readout, and support electronics - are described. Four significant characteristics are expected to favor all-metal over hybrid magnetic RAM. First, silicon-technology fabrication requires a large number of masking steps, including complex ones such as ion implantation. Conversely, all-metal technology is inherently simple: fewer masking steps, no doping, scaling to lithographic limits, very little operating power. Second, the all-metal footprint is significantly smaller than the hybrid one. Third, an all-metal RAM is expected to be able to be miniaturized to lithographic limits; miniaturization of hybrid magnetic RAMs is likely to be limited by the semiconductor circuitry. Finally, semiconductor processing and magnetic processing in MRAM are done separately because the former requires high temperatures, whereas magnetic fabrication is a low-temperature process. By contrast, because both GMR electronics and the memory elements are made of the same materials, the two major components are deposited and patterned concurrently on the same substrate.

Torok, E. J.↗
NASA NTRS2002

Design and Fabrication of Two-Dimensional Semiconducting Bolometer Arrays for the High Resolution Airborne Wideband Camera (HAWC) and the Submillimeter High Angular Resolution Camera II (SHARC-II)

The High resolution Airborne Wideband Camera (HAWC) and the Submillimeter High Angular Resolution Camera II (SHARC 11) will use almost identical versions of an ion-implanted silicon bolometer array developed at the National Aeronautics and Space Administration's Goddard Space Flight Center (GSFC). The GSFC "Pop-Up" Detectors (PUD's) use a unique folding technique to enable a 12 x 32-element close-packed array of bolometers with a filling factor greater than 95 percent. A kinematic Kevlar(Registered Trademark) suspension system isolates the 200 mK bolometers from the helium bath temperature, and GSFC - developed silicon bridge chips make electrical connection to the bolometers, while maintaining thermal isolation. The JFET preamps operate at 120 K. Providing good thermal heat sinking for these, and keeping their conduction and radiation from reaching the nearby bolometers, is one of the principal design challenges encountered. Another interesting challenge is the preparation of the silicon bolometers. They are manufactured in 32-element, planar rows using Micro Electro Mechanical Systems (MEMS) semiconductor etching techniques, and then cut and folded onto a ceramic bar. Optical alignment using specialized jigs ensures their uniformity and correct placement. The rows are then stacked to create the 12 x 32-element array. Engineering results from the first light run of SHARC II at the CalTech Submillimeter Observatory (CSO) are presented.

Voellmer, George M.↗