Quantum Computer Systems for Scientific Discovery
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Energy efficiency and resilience are two crucial challenges for HPC systems to reach exascale. While energy efficiency and resilience issues have been extensively studied individually, little has been done to understand the interplay between energy efficiency and resilience for HPC systems. Decreasing the supply voltage associated with a given operating frequency for processors and other CMOS-based components can significantly reduce power consumption. However, this often raises system failure rates and consequently increases application execution time. In this work, we present an energy saving undervolting approach that leverages the mainstream resilience techniques to tolerate the increased failures caused by undervolting.
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A silicon metal-oxide semiconductor device transports a spin-polarized single electron. An array of silicon quantum dot electrodes is arranged atop a silicon dioxide layer of a silicon metal-oxide semiconductor. The array comprises at least a first electrode and a second electrode adjacent to the first electrode. A transport control logic for individually controls a voltage applied to the electrodes. The transport control logic is configured to gradually decrease a voltage at the first electrode while gradually increasing a voltage at the second electrode. Localization of the single electron is adiabatically transferred from the first electrode to the second electrode while maintaining a desired energy gap between a ground state and a first excited state of the single electron.
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