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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 109 records · Page 6
All sourcesNASA NTRSDOE OSTI
NASA NTRS1998

Memory monitoring by animals and humans

The authors asked whether animals and humans would use similarly an uncertain response to escape indeterminate memories. Monkeys and humans performed serial probe recognition tasks that produced differential memory difficulty across serial positions (e.g., primacy and recency effects). Participants were given an escape option that let them avoid any trials they wished and receive a hint to the trial's answer. Across species, across tasks, and even across conspecifics with sharper or duller memories, monkeys and humans used the escape option selectively when more indeterminate memory traces were probed. Their pattern of escaping always mirrored the pattern of their primary memory performance across serial positions. Signal-detection analyses confirm the similarity of the animals' and humans' performances. Optimality analyses assess their efficiency. Several aspects of monkeys' performance suggest the cognitive sophistication of their decisions to escape.

NASA Discipline Space Human Factors↗
NASA NTRSDate not supplied

Performance Optimization Methods for a Memory-Bound, Unstructured-Grid CFD Application on Massively Parallel GPU Platforms

Computational performance of the FUN3D unstructured-grid computational fluid dynamics (CFD) application on massively parallel GPU environments is memory-bound and highly dependent upon efficient reads from and atomic updates to the irregular cell-, edge-, and node-based data structures. In this talk, we present recent efforts into optimizing select performance-critical kernels on NVIDIA Tesla V100 and A100 GPUs and AMD CDNA MI100 GPUs. A novel use of L2 cache residency controls and asynchronous loads into on-chip shared memory are explored on the A100 GPU for the sparse iterative solver, which is dominated by mixed-precision, sparse matrix vector multiplication. Demonstrations show that these methods improve global memory bandwidth utilization by 13.5% on the A100 GPU. Several techniques are also presented that use registers and/or shared memory to facilitate array transposition and aggregation which combine to reduce the frequency and increase the cache efficiency of floating-point atomic updates to the irregular data structures. These methods are demonstrated to improve the kernel throughput by nearly 500% on select kernels on the AMD MI100 over atomic updates directly to global memory. Overall, both V100 and A100 GPUs outperformed the MI100 GPU on kernels dominated by double-precision atomic updates; however, the techniques demonstrated here reduced the performance gap and improved the MI100 performance.

GPU CPU unstructured CFD memory↗
NASA NTRSDate not supplied

Design and Analysis of Shape Memory Spring Tires for Martian and Lunar Rover Vehicles

Shape memory alloys (SMAs) have played an important role in various innovative engineering and medical applications, such as aerospace actuators, vibration damping devices, and coronary stents. In applications, shape memory alloys are commonly utilized in two fundamentally different ways: (i) making use of the superelasticity/ pseudoelasticity (SE/PE) phenomena, as in applications in biomedical engineering, and (ii) taking advantages of the shape memory effect (SME), as is used for actuators. Their ability to act in such vastly different capacities is mainly due to their unique capability to recover large amounts of deformation produced by either applied stresses or temperature changes. One recent emerging application in use of SMAs has been in the area of non-pneumatic tire designs for Martian or Lunar roving vehicles. These vehicles require tires that are capable of traversing rugged terrain while withstanding extreme temperatures and atmospheric conditions. Inspired by the flexible wire mesh tires used on three Lunar Roving Vehicle (LRV) missions to the Moon on Apollo 15, 16, and 17, a new compliant tire technology was developed by the NASA Glenn Research Center (GRC) and Goodyear Tire & Rubber, known as the Spring Tire. The Spring Tire consists of several hundred coiled springs woven into a flexible mesh and formed into the shape of a tire. Like the LRV wire mesh tires, the original Spring Tires were made from spring steel and were prone to permanent deformation when undergoing high localized loads. Later, a new iteration of this technology was invented, known as the ‘Superelastic Tire’. This new technology incorporated the use of superelastic SMA springs, which could effectively undergo approximately 30 times more reversible deformation than the steel spring. It also provided even greater durability and allowed for more flexibility in design, such as the use of other structural forms to reduce mass or increase load carrying capacity. Because of the unique nature of both the SMA material and the complex interactions between the springs, designing Spring Tires for a specific application requires extensive effort. Historically, design decisions have relied on full-scale empirical testing; however, this is very expensive and time consuming, especially when multiple iterations are needed. Therefore, developing a large-scale, robust, and predictive numerical model entailing complex spring interactions and the shape memory material behavior within a tire construct is the first essential step towards a successful design program. The current work focuses on implementation of the user-defined Shape Memory Alloy (SMA) model, otherwise known as SMA-GVIPs, in the Finite Element analysis (FEA) program ABAQUS for large-scale simulations of the GRC-developed Spring Tires made of SMA. The novelty of this work lies in the thorough, detail-oriented, and computationally efficient finite element analysis of full-scale SMA tires. A well-thought material characterization plan followed by model validation and a systemic sensitivity study on SMA tires has never been reported in the previous literature. The main objective of this study is to help the team improve and optimize the structural design of the SMA tires through in-depth numerical analysis and sensitivity studies. Various design variables (wire diameter, coil diameter, pitch, bead angle, and number of springs) were varied to study their influence on the global load-displacement response of the tire construct. A detailed investigation of the three-dimensional stress states was also carried out to enhance our understanding of the local changes as the tire goes through global deformation. It was concluded that a robust numerical model with a good predictive capability, together with a thoughtfully crafted sensitivity study can result in improved design iterations required to reach a desired tire performance while, significantly reducing manufacturing, labor and testing expenses. A summary of the Finite Element (FE) model construction will be presented together with a description of the user-defined SMA model, characterization process, experimental results, model validation, and numerical sensitivity study results.

shape memory alloys↗
NASA NTRS1984

Extending the Memory of Microcomputers

Memory increased while retaining real-time capabilities. Extra memory capacity added to microprocessor without increasing memory address length and special transfer instructions by dedicating block of space in main memory to hold addresses of locations in extra memory.

Wiker, G. A.↗
NASA NTRS1984

Investigation of fast initialization of spacecraft bubble memory systems

Bubble domain technology offers significant improvement in reliability and functionality for spacecraft onboard memory applications. In considering potential memory systems organizations, minimization of power in high capacity bubble memory systems necessitates the activation of only the desired portions of the memory. In power strobing arbitrary memory segments, a capability of fast turn on is required. Bubble device architectures, which provide redundant loop coding in the bubble devices, limit the initialization speed. Alternate initialization techniques are investigated to overcome this design limitation. An initialization technique using a small amount of external storage is demonstrated.

Looney, K. T.↗
NASA NTRS1986

Parallel structures in human and computer memory

If one thinks of our experiences as being recorded continuously on film, then human memory can be compared to a film library that is indexed by the contents of the film strips stored in it. Moreover, approximate retrieval cues suffice to retrieve information stored in this library. One recognizes a familiar person in a fuzzy photograph or a familiar tune played on a strange instrument. A computer memory that would allow a computer to recognize patterns and to recall sequences the way humans do is constructed. Such a memory is remarkably similiar in structure to a conventional computer memory and also to the neural circuits in the cortex of the cerebellum of the human brain. It is concluded that the frame problem of artificial intelligence could be solved by the use of such a memory if one were able to encode information about the world properly.

Kanerva, P.↗
NASA NTRS1986

Division of attention as a function of the number of steps, visual shifts, and memory load

The effects on divided attention of visual shifts and long-term memory retrieval during a monitoring task are considered. A concurrent vigilance task was standardized under all experimental conditions. The results show that subjects can perform nearly perfectly on all of the time-shared tasks if long-term memory retrieval is not required for monitoring. With the requirement of memory retrieval, however, there was a large decrease in accuracy for all of the time-shared activities. It was concluded that the attentional demand of longterm memory retrieval is appreciable (even for a well-learned motor sequence), and thus memory retrieval results in a sizable reduction in the capability of subjects to divide their attention. A selected bibliography on the divided attention literature is provided.

Chechile, R. A.↗
NASA NTRS1986

The application of a sparse, distributed memory to the detection, identification and manipulation of physical objects

To determine the relation of the sparse, distributed memory to other architectures, a broad review of the literature was made. The memory is called a pattern memory because they work with large patterns of features (high-dimensional vectors). A pattern is stored in a pattern memory by distributing it over a large number of storage elements and by superimposing it over other stored patterns. A pattern is retrieved by mathematical or statistical reconstruction from the distributed elements. Three pattern memories are discussed.

Kanerva, P.↗
NASA NTRS1988

PDA: A coupling of knowledge and memory for case-based reasoning

Problem solving in most domains requires reference to past knowledge and experience whether such knowledge is represented as rules, decision trees, networks or any variant of attributed graphs. Regardless of the representational form employed, designers of expert systems rarely make a distinction between the static and dynamic aspects of the system's knowledge base. The current paper clearly distinguishes between knowledge-based and memory-based reasoning where the former in its most pure sense is characterized by a static knowledge based resulting in a relatively brittle expert system while the latter is dynamic and analogous to the functions of human memory which learns from experience. The paper discusses the design of an advisory system which combines a knowledge base consisting of domain vocabulary and default dependencies between concepts with a dynamic conceptual memory which stores experimental knowledge in the form of cases. The case memory organizes past experience in the form of MOPs (memory organization packets) and sub-MOPs. Each MOP consists of a context frame and a set of indices. The context frame contains information about the features (norms) common to all the events and sub-MOPs indexed under it.

Bharwani, S.↗
NASA NTRS1990

Single-pass memory system evaluation for multiprogramming workloads

Modern memory systems are composed of levels of cache memories, a virtual memory system, and a backing store. Varying more than a few design parameters and measuring the performance of such systems has traditionally be constrained by the high cost of simulation. Models of cache performance recently introduced reduce the cost simulation but at the expense of accuracy of performance prediction. Stack-based methods predict performance accurately using one pass over the trace for all cache sizes, but these techniques have been limited to fully-associative organizations. This paper presents a stack-based method of evaluating the performance of cache memories using a recurrence/conflict model for the miss ratio. Unlike previous work, the performance of realistic cache designs, such as direct-mapped caches, are predicted by the method. The method also includes a new approach to the problem of the effects of multiprogramming. This new technique separates the characteristics of the individual program from that of the workload. The recurrence/conflict method is shown to be practical, general, and powerful by comparing its performance to that of a popular traditional cache simulator. The authors expect that the availability of such a tool will have a large impact on future architectural studies of memory systems.

Conte, Thomas M.↗
NASA NTRS1989

FFTs in external or hierarchical memory

A description is given of advanced techniques for computing an ordered FFT on a computer with external or hierarchical memory. These algorithms (1) require as few as two passes through the external data set, (2) use strictly unit stride, long vector transfers between main memory and external storage, (3) require only a modest amount of scratch space in main memory, and (4) are well suited for vector and parallel computation. Performance figures are included for implementations of some of these algorithms on Cray supercomputers. Of interest is the fact that a main memory version outperforms the current Cray library FFT routines on the Cray-2, the Cray X-MP, and the Cray Y-MP systems. Using all eight processors on the Cray Y-MP, this main memory routine runs at nearly 2 Gflops.

Bailey, David H.↗
NASA NTRS1990

Recoverable distributed shared virtual memory

The problem of rollback recovery in distributed shared virtual environments, in which the shared memory is implemented in software in a loosely coupled distributed multicomputer system, is examined. A user-transparent checkpointing recovery scheme and a new twin-page disk storage management technique are presented for implementing recoverable distributed shared virtual memory. The checkpointing scheme can be integrated with the memory coherence protocol for managing the shared virtual memory. The twin-page disk design allows checkpointing to proceed in an incremental fashion without an explicit undo at the time of recovery. The recoverable distributed shared virtual memory allows the system to restart computation from a checkpoint without a global restart.

Wu, Kun-Lung↗
NASA NTRS1990

Rapid recovery from transient faults in the fault-tolerant processor with fault-tolerant shared memory

The Draper fault-tolerant processor with fault-tolerant shared memory (FTP/FTSM), which is designed to allow application tasks to continue execution during the memory alignment process, is described. Processor performance is not affected by memory alignment. In addition, the FTP/FTSM incorporates a hardware scrubber device to perform the memory alignment quickly during unused memory access cycles. The FTP/FTSM architecture is described, followed by an estimate of the time required for channel reintegration.

Harper, Richard E.↗
NASA NTRS1989

An alternative design for a sparse distributed memory

A new design for a Sparse Distributed Memory, called the selected-coordinate design, is described. As in the original design, there are a large number of memory locations, each of which may be activated by many different addresses (binary vectors) in a very large address space. Each memory location is defined by specifying ten selected coordinates (bit positions in the address vectors) and a set of corresponding assigned values, consisting of one bit for each selected coordinate. A memory location is activated by an address if, for all ten of the locations's selected coordinates, the corresponding bits in the address vector match the respective assigned value bits, regardless of the other bits in the address vector. Some comparative memory capacity and signal-to-noise ratio estimates for the both the new and original designs are given. A few possible hardware embodiments of the new design are described.

Jaeckel, Louis A.↗
NASA NTRS1992

Sparse distributed memory and related models

Described here is sparse distributed memory (SDM) as a neural-net associative memory. It is characterized by two weight matrices and by a large internal dimension - the number of hidden units is much larger than the number of input or output units. The first matrix, A, is fixed and possibly random, and the second matrix, C, is modifiable. The SDM is compared and contrasted to (1) computer memory, (2) correlation-matrix memory, (3) feet-forward artificial neural network, (4) cortex of the cerebellum, (5) Marr and Albus models of the cerebellum, and (6) Albus' cerebellar model arithmetic computer (CMAC). Several variations of the basic SDM design are discussed: the selected-coordinate and hyperplane designs of Jaeckel, the pseudorandom associative neural memory of Hassoun, and SDM with real-valued input variables by Prager and Fallside. SDM research conducted mainly at the Research Institute for Advanced Computer Science (RIACS) in 1986-1991 is highlighted.

Kanerva, Pentti↗
NASA NTRS1992

Auto and hetero-associative memory using a 2-D optical logic gate

An optical system for auto-associative and hetero-associative recall utilizing Hamming distance as the similarity measure between a binary input image vector V(sup k) and a binary image vector V(sup m) in a first memory array using an optical Exclusive-OR gate for multiplication of each of a plurality of different binary image vectors in memory by the input image vector. After integrating the light of each product V(sup k) x V(sup m), a shortest Hamming distance detection electronics module determines which product has the lowest light intensity and emits a signal that activates a light emitting diode to illuminate a corresponding image vector in a second memory array for display. That corresponding image vector is identical to the memory image vector V(sup m) in the first memory array for auto-associative recall or related to it, such as by name, for hetero-associative recall.

Chao, Tien-Hsin↗
NASA NTRS1992

Enhanced fatigue and retention in ferroelectric thin film memory capacitors by post-top electrode anneal treatment

Thin film ferroelectric capacitors comprising a ferroelectric film sandwiched between electrodes for nonvolatile memory operations are rendered more stable by subjecting the capacitors to an anneal following deposition of the top electrode. The anneal is done so as to form the interface between the ferroelectric film and the top electrode. Heating in an air oven, laser annealing, or electron bombardment may be used to form the interface. Heating in an air oven is done at a temperature at least equal to the crystallization temperature of the ferroelectric film. Where the ferroelectric film comprises lead zirconate titanate, annealing is done at about 550 to 600 C for about 10 to 15 minutes. The formation treatment reduces the magnitude of charge associated with the nonswitching pulse in the thin film ferroelectric capacitors. Reduction of this charge leads to significantly more stable nonvolatile memory operations in both digital and analog memory devices. The formation treatment also reduces the ratio of change of the charge associated with the nonswitching pulse as a function of retention time. These improved memory devices exhibit greater performance in retention and reduced fatigue in memory arrays.

Thakoor, Sarita↗
NASA NTRS1993

Relaxing consistency in recoverable distributed shared memory

Relaxed memory consistency models have recently been proposed to tolerate memory access latency in both hardware and software distributed shared memory systems. In recoverable shared memory multiprocessors, relaxing consistency has the added benefit of reducing the number of checkpoints needed to avoid rollback propagation. In this paper, we introduce new checkpointing algorithms that take advantage of relaxed consistency to reduce the performance overhead of checkpointing. We also introduce a scheme based on lazy relaxed consistency, that reduces both checkpointing overhead and the overhead of avoiding error propagation in systems with error latency. Multiprocessor address traces are used to evaluate the relaxed consistency approach to checkpointing with distributed shared memory.

Janssens, Bob↗