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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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99 records · Page 6

A New Acceptor (N-type) Polyphenylenevinylene Building Block: SF-PPV-I

A new sulfone derivatized acceptor (n-type) polyphenylenevinylene "SF-PPV" with nano meter sizes and functional terminals has been synthesized and characterized. The SF-PPV-I that contains hydrocarbon alkyl-sulfone moieties has a strong photoluminescence in both solution and in solid thin film states. In dichloromethane, the 5-10 nm sized SF-PPV has a maximum emission at about 530 nm with excitation maximum at about 490 nm. UV-VIS shows a absorption peak onsite at about 500 nm. Optical spectroscopy and electrochemical studies revealed that the SF-PPV-I has an LUMO level at about -3.6 eV (relative to vacuum), and an HOMO level at about -6.1 eV. The average size (length) of SF-PPV-I can be controlled on the nano meter scale via synthetic means. The SF-PPV has the potential in developing polymer based supramolecular opto-electronic semiconductor devices.

Wang, Yiqing↗

Effects of ultrathin oxides in conducting MIS structures on GaAs

Schottky barrier-type GaAs baseline devices (semiconductor surface etched and then immediately metalized) and GaAs conducting metal oxide-semiconductor devices are fabricated and characterized. The baseline surfaces (no purposeful oxide) are prepared by a basic or an acidic etch, while the surface for the MIS devices are prepared by oxidizing after the etch step. The metallizations used are thin-film Au, Ag, Pd, and Al. It is shown that the introduction of purposeful oxide into these Schottky barrier-type structures examined on n-type GaAs modifies the barrier formation, and that thin interfacial layers can modify barrier formation through trapping and perhaps chemical reactions. For Au- and Pd-devices, enhanced photovoltaic performance of the MIS configuration is due to increased barrier height.

Childs, R. B.↗

Solar cell with improved N-region contact and method of forming the same

An improved solar cell, and method of forming the same are disclosed. It is characterized by a semiconductor silicon wafer of P-type material having diffused therein a shallow N-type region. A sintered silver contact is affixed to the surface of the N-type region at the outer surface. The improved solar cell is formulated from silver powder blended with silver metaphosphate for establishing a zone of increased carrier concentration. An aluminum or silver-aluminum alloy contact is affixed to the P-type wafer at the outer surface opposite the N-type region.

Bube, K. R.↗

Effect of reabsorbed recombination radiation on the saturation current of direct gap p-n junctions

The application of the radiative transfer theory for semiconductors to p-n homojunctions subject to low level injection conditions is discussed. By virtue of the interaction of the radiation field with free carriers across the depletion layer, the saturation current density in Shockley's expression for the diode current is reduced at high doping levels. The reduction, due to self-induced photon generation, is noticeable for n-type material owing to the small electron effective mass in direct band-gap III-V compounds. The effect is insignificant in p-type material. At an equilibrium electron concentration of 2 x 10 to the 18th/cu cm in GaAs, a reduction of the saturation current density by 15 percent is predicted. It is concluded that realistic GaAs p-n junctions possess a finite thickness.

Von Roos, O.↗

Modeling of Electronic Transport in Scanning Tunneling Microscope Tip-Carbon Nanotube Systems

A model is proposed for two observed current-voltage (I-V) patterns in a recent experiment with a scanning tunneling microscope tip and a carbon nanotube. We claim that there are two mechanical contact modes for a tip (metal) -nanotube (semiconductor) junction (1) with or (2) without a tiny vacuum gap (0.1 - 0.2 nm). With the tip grounded, the tunneling case in (1) would produce large dI/dV with V > 0, small dI/dV with V < 0, and I = 0 near V = 0 for an either n- or p-nanotube; the Schottky mechanism in (2) would result in I does not equal 0 only with V < 0 for an n-nanotube, and the bias polarities would be reversed for a p-nanotube. The two observed I-V patterns are thus entirely explained by a tip-nanotube contact of the two types, where the nanotube must be n-type.

Yamada, Toshishige↗

Temperature Distribution Within a Defect-Free Silicon Carbide Diode Predicted by a Computational Model

Most solid-state electronic devices diodes, transistors, and integrated circuits are based on silicon. Although this material works well for many applications, its properties limit its ability to function under extreme high-temperature or high-power operating conditions. Silicon carbide (SiC), with its desirable physical properties, could someday replace silicon for these types of applications. A major roadblock to realizing this potential is the quality of SiC material that can currently be produced. Semiconductors require very uniform, high-quality material, and commercially available SiC tends to suffer from defects in the crystalline structure that have largely been eliminated in silicon. In some power circuits, these defects can focus energy into an extremely small area, leading to overheating that can damage the device. In an effort to better understand the way that these defects affect the electrical performance and reliability of an SiC device in a power circuit, the NASA Glenn Research Center at Lewis Field began an in-house three-dimensional computational modeling effort. The goal is to predict the temperature distributions within a SiC diode structure subjected to the various transient overvoltage breakdown stresses that occur in power management circuits. A commercial computational fluid dynamics computer program (FLUENT-Fluent, Inc., Lebanon, New Hampshire) was used to build a model of a defect-free SiC diode and generate a computational mesh. A typical breakdown power density was applied over 0.5 msec in a heated layer at the junction between the p-type SiC and n-type SiC, and the temperature distribution throughout the diode was then calculated. The peak temperature extracted from the computational model agreed well (within 6 percent) with previous first-order calculations of the maximum expected temperature at the end of the breakdown pulse. This level of agreement is excellent for a model of this type and indicates that three-dimensional computational modeling can provide useful predictions for this class of problem. The model is now being extended to include the effects of crystal defects. The model will provide unique insights into how high the temperature rises in the vicinity of the defects in a diode at various power densities and pulse durations. This information also will help researchers in understanding and designing SiC devices for safe and reliable operation in high-power circuits.

Kuczmarski, Maria A.↗

Modeling of the Thermoelectric Properties of p-Type IrSb(sub 3)

IrSb(sub 3) is a compound of the skutterudite family of materials now being investigated at JPL. A combination of experimental and theoretical approaches has been recently applied at JPL to evaluate the potential of several thermoelectric materials such as n-type and p-type Si(sub 80) Ge(sub 20) alloys, n-type and p-type Bi(sub 2) Te(sub 3)-based alloys and p-type Ru(sub 2) Ge(sub 3) compound. The use of a comprehensive model for the thermal and electrical transport properties of a given material over its full temperature range of usefulness is a powerful tool for guiding experimental optimization of the composition, temperature and doping level as well as for predicting the maximum ZT value likely to be achieved.

skutterudite thermoelectric material thermoelectri↗

Radiation tolerant back biased CMOS VLSI

A CMOS circuit formed in a semiconductor substrate having improved immunity to total ionizing dose radiation, improved immunity to radiation induced latch up, and improved immunity to a single event upset. The architecture of the present invention can be utilized with the n-well, p-well, or dual-well processes. For example, a preferred embodiment of the present invention is described relative to a p-well process wherein the p-well is formed in an n-type substrate. A network of NMOS transistors is formed in the p-well, and a network of PMOS transistors is formed in the n-type substrate. A contact is electrically coupled to the p-well region and is coupled to first means for independently controlling the voltage in the p-well region. Another contact is electrically coupled to the n-type substrate and is coupled to second means for independently controlling the voltage in the n-type substrate. By controlling the p-well voltage, the effective threshold voltages of the n-channel transistors both drawn and parasitic can be dynamically tuned. Likewise, by controlling the n-type substrate, the effective threshold voltages of the p-channel transistors both drawn and parasitic can also be dynamically tuned. Preferably, by optimizing the threshold voltages of the n-channel and p-channel transistors, the total ionizing dose radiation effect will be neutralized and lower supply voltages can be utilized for the circuit which would result in the circuit requiring less power.

Maki, Gary K.↗

Porous silicon carbide (SiC) semiconductor device

A semiconductor device employs at least one layer of semiconducting porous silicon carbide (SiC). The porous SiC layer has a monocrystalline structure wherein the pore sizes, shapes, and spacing are determined by the processing conditions. In one embodiment, the semiconductor device is a p-n junction diode in which a layer of n-type SiC is positioned on a p-type layer of SiC, with the p-type layer positioned on a layer of silicon dioxide. Because of the UV luminescent properties of the semiconducting porous SiC layer, it may also be utilized for other devices such as LEDs and optoelectronic devices.

Shor, Joseph S.↗