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At least 109 records · Page 6
All sourcesNASA NTRSDOE OSTI
DOE OSTI2023

SIMS CHARACTERIZATION OF NITROGEN DOPING OF LCLS-II-HE PRODUCTION CAVITIES

The thermal diffusion of nitrogen into the surface of niobium has been shown to yield superior low-loss SRF performance. An effective solution was identified and promptly employed in the production of cryomodules for LCLS-II. With added experience and R&D, a modified process was chosen for use in the upgrade for LCLS-II-HE. Largely motivated by this circumstance, supporting research has significantly refined the technique for making calibrated secondary ion mass spectrometry (SIMS) measurements of the N concentration depth profiles produced by production processes. Standardized reference samples were included with four HE production cavities in their N-doping furnace runs. We report the calibrated dynamic SIMS depth profiles of N, C, and O for these samples, together with the cryogenic acceptance test performance of the associated cavities. Interpretation and comparison with similar samples acquired in other furnaces highlights the importance of intentional process quality control of furnace conditions.

Reece, Charles↗
DOE OSTI2025

Development of Transformative Preparation Methods to Push up High Q&G Performance of FRIB Spare HWR Cryomodule Cavities

The FRIB accelerator project construction, a top priority of US nuclear science, was completed in January 2022, and is now moving to user operation. The stable and reliable operation of the accelerating cryomodules is essential in achieving/fulfilling DOE and user expectations. So far, FRIB cryomodules meet all FRIB specifications for cavity performance. However, during the lifetime of machine operation, degradation of cryomodule performance is possible, as reported in similar operating facilities (CEBAF, SNS). If cryomodule degradation is observed at FRIB, the under-performing cryomodule will require replacement/maintenance. In effort to manage operational reliability, FRIB plans to construct a 0.53 half-wave cryomodule to serve as an active spare. In a parallel effort, FRIB will also work toward increasing operational Q and gradient of spare cryomodule cavities to gain an overall performance margin to support future operational reliability. The current FRIB cavity designs have a potential to operate at gradients higher than 8 MV/m, but are currently limited by field emission (FE) and/or high field Q slope (HFQS); known issue in buffered chemical polished (BCP) treated cavities. The proposal looks to develop transformative surface preparation treatments to improve the operational gradient of spare cryomodules higher than 10 MV/m while maintaining high Q. Thus, increasing operational margin by 30 - 50%. With the goal to improve operational reliability set, the proposal will investigate multiple objectives as possible paths forward to achieve an overall increase in cavity performance and gain a better understanding of SRF limiting mechanisms. The proposal will study the application of different chemical surface treatments to 0.53 half-wave cavities, with the addition of low temperature bakes (LTB), and measure their effects on accelerating performance. Proposed chemical treatments to be explored in this proposal include conventional EP acid mixtures, as well as innovated EP and BCP acid mixtures designed to simplify processing paths in migrating FE and HFQS. The proposed transformative treatment wet N-doping also has the potential to replicate recent advancements in SRF technology relating to nitrogen doping and high Q operation without the requirement for an ultra-high vacuum annealing furnace; currently being developed at FNAL and JLAB. In parallel, high Q performance relating to flux trapping will be investigated with the installation of a second layer of magnetic shielding in the vertical test Dewar. The research objectives presented in the proposal, and their corresponding effects on cavity performance, will provide essential knowledge and future guidance to the SRF community and provide possible paths for future SRF based projects and applications.

43 PARTICLE ACCELERATORS↗
DOE OSTI2023

Advancements in High-Q development for novel medium-velocity 644 MHz 5-cell elliptical superconducting RF cavities for continuous-wave operation in heavy-ion linacs

The Facility for Rare Isotope Beams is a world-leading center for experimental nuclear physics research, and relies on a first-in-kind superconducting RF driver linac to supply 400 kW beams of a uniquely large range of particles, from protons through the heaviest uranium ions. The FRIB400 project proposes to double the end energy of the current superconducting FRIB linac for the heaviest uranium ions from 200 MeV per nucleon (MeV/u) to 400 MeV/u, which equates to approximately 1 GeV for protons. The increased rare isotope production from higher-energy drive beams would deliver new and exciting capabilities to FRIB users, which include extending the facility's reach along the neutron drip-line, greatly increasing the facility's rare isotope yield, and significantly improving the precision of parameter measurements for the nuclear matter equation of state, which is a particularly timely complement to the recent advent of multi-messenger astronomy, and the study of neutron star mergers. The unique set of design parameters defined by the 400 MeV/u (uranium) energy goal, the physical size, continuous-wave operation, and cryogenic capacity of the extant facilities at FRIB, requires development of a first-in-kind beta = v/c = 0.65, 644 MHz 5-cell elliptical superconducting RF (SRF) cavity, with field-leading efficiency, measured by the cavity's intrinsic quality factor, Q_0. The field of SRF has recently experienced a very active period of development, which demonstrated the potential to raise the Q_0 of 1.3 GHz cavities by factors of two to three or more. In addition to uncovering fascinating new properties of the fundamental physics of superconducting RF phenomena, these improvements suggest substantial improvements could be made over the minimum Q_0 of the proposed FRIB400 upgrade SRF cavities, if these new techniques can be adapted to the beta = 0.65, 644 MHz regime. This work presents the first validation of the the novel beta = 0.65, 644 MHz 5-cell elliptical superconducting RF cavity design, and the first results of both conventional and advanced RF surface preparation techniques. In particular, this work focuses on two recently-developed high-Q_0 recipes: N-doping, and furnace baking, setting the current world-record Q_0 for this type of resonant cavity at 3.8 x 10^10 at the FRIB400 operating gradient of 17.5 MV/m. We also find evidence that these results may be further improved upon, and make the case for further RF surface preparation recipe optimization. We then pair these high-power RF investigations with techniques borrowed from material science to try to better understand the ways in which specific properties of the niobium material, such as grain structure and superconducting flux pinning force, can be related to its superconducting RF performance. These experiments better elucidate the effects of high-temperature annealing on niobium samples, which suggest methods of further optimizing cavity flux expulsion and thus SRF performance.Read

McGee, Kellen E.↗
NASA NTRS1986

Fabrication of an X-Ray Imaging Detector

X-ray detector array yields mosaic image of object emitting 1- to 30-keV range fabricated from n-doped silicon wafer. In proposed fabrication technique, thin walls of diffused n+ dopant divide wafer into pixels of rectangular cross section, each containing central electrode of thermally migrated p-type metal. This pnn+ arrangement reduces leakage current by preventing transistor action caused by pnp structure of earlier version.

Alcorn, G. E.↗
NASA NTRS1994

Cubic GaS: A Surface Passivator For GaAs

Thin films of cubic form of gallium sulfide (GaS) formed on surfaces of gallium arsenide (GaAs) substrates via metal/organic chemical vapor deposition (MOCVD). Deposited cubic GaS, crystalline lattice matched to substrate GaAs, neutralizes electrically active defects on surfaces of both n-doped and p-doped GaAs. Enabling important GaAs-based semiconducting materials to serve as substrates for metal/insulator/semiconductor (MIS) capacitors. Cubic GaS enables fabrication of ZnSe-based blue lasers and light-emitting diodes. Because GaS is optically transparent, deposited to form window layers for such optoelectronic devices as light-emitting diodes, solar optical cells, and semiconductor lasers. Its transparency makes it useful as interconnection material in optoelectronic integrated circuits. Also useful in peeled-film technology because selectively etched from GaAs.

Hepp, Aloysius F.↗
NASA NTRS1994

Making Porous Luminescent Regions In Silicon Wafers

Regions damaged by ion implantation stain-etched. Porous regions within single-crystal silicon wafers fabricated by straightforward stain-etching process. Regions exhibit visible photoluminescence at room temperature and might constitute basis of novel class of optoelectronic devices. Stain-etching process has advantages over recently investigated anodic-etching process. Process works on both n-doped and p-doped silicon wafers. Related development reported in article, "Porous Si(x)Ge(1-x) Layers Within Single Crystals of Si," (NPO-18836).

Fathauer, Robert W.↗
NASA NTRS1995

Better Ohmic Contacts For InP Semiconductor Devices

Four design modifications enable fabrication of improved ohmic contacts on InP-based semiconductor devices. First modification consists of insertion of layer of gold phosphide between n-doped InP and metal or other overlayer of contact material. Second, includes first modification plus use of particular metal overlayer to achieve very low contact resistivities. Third, also involves deposition of Au(2)P(3) interlayer; in addition, refractory metal (W or Ta) deposited to form contact overlayer. In fourth, contact layer of Auln alloy deposited directly on InP. Improved contacts exhibit low electrical resistances and fabricated without exposing devices to destructive predeposition or postdeposition treatments.

Weizer, Victor G.↗
NASA NTRS1995

The 1200 K compressive properties of N-containing NiAl

As part of a series of experiments to understand the role of N on the strength of NiAl, a heat of NiAl was enriched with N by melting and atomization to powder in a nitrogen atmosphere. Following consolidation of the powder by hot extrusion, 1200 K compressive properties were measured in air. Within the range of strain rates examined, 10(exp -3) to 10(exp -9) s(exp -1), the strength of the N-enriched NiAl was greater than that of a simple 15 micron grain size polycrystalline, binary NiAl alloy. For the most part the overall improvement in strength is ascribed to the fine grain size of the N-doped NiAl rather than the alloy chemistry; however, the alloy displayed a complex behavior exhibiting both weakening effects as well as strengthening ones.

Whittenberger, J. Daniel↗
NASA NTRS1996

Effect of variations in the doping profiles on the properties of doped multiple quantum well avalanche photodiodes

The purpose of this study is to use both theoretical and experimental evidence to determine the impact of doping imbalance and symmetry on the physical and electrical characteristics of doped multiple quantum well avalanche photodiodes (APD). Theoretical models have been developed to calculate the electric field valence and conduction bands, capacitance-voltage (CV), and carrier concentration versus depletion depth profiles. The models showed a strong correlation between the p- and n-doping balance inside the GaAs wells and the number of depleted stages and breakdown voltage of the APD. A periodic doping imbalance in the wells has been shown to result in a gradual increase (or decrease) in the electric field profile throughout the device which gave rise to partially depleted devices at low bias. The MQW APD structures that we modeled consisted of a 1 micron top p(+)-doped (3 x 10(exp 18) cm(exp -3)) GaAs layer followed by a 1 micron region of alternating layers of GaAs (500 A) and Al(0.42)Ga(0.58)As (500 A), and a 1 micron n(+) back layer (3 x 10(exp 18) cm(exp -3)). The GaAs wells were doped with p-i-n layers placed at the center of each well. The simulation results showed that in an APD with nine doped wells, and where the 50 A p-doped layer is off by 10% (p = 1.65 x 10(exp 18) cm(exp -3), n = 1.5 x 10(exp 18) cm(exp -3)), almost half of the MQW stages were shown to be undepleted at low bias which was a result of a reduction in the electric field near the p(+) cap layer by over 50% from its value in the balanced structure. Experimental CV and IV data on similar MBE grown MQW structures have shown very similar depletion and breakdown characteristics. The models have enabled us to better interpret our experimental data and to determine both the extent of the doping imbalances in the devices as well as the overall p- or n-type doping characteristics of the structures.

Menkara, H. M.↗
NASA NTRS1995

1200 K Compressive Properties of N-Containing Nial

As part of a series of experiments to understand the role of N on the strength of NiAl, a heat of NiAl was enriched with N by melting and atomization to powder in a nitrogen atmosphere. Following consolidation of the powder by hot extrusion, 1200 K compressive properties were measured in air. Within the range of strain rates examined, 10 exp -3 to 10 exp -9/s, the strength of the N-enriched NiAl was greater than that of a simple 15 micron grain size polycrystalline, binary NiAl alloy. For the most part the overall improvement in strength is ascribed to the fine grain size of the N-doped NiAl rather than the alloy chemistry; however, the alloy displayed a complex behavior exhibiting both weakening effects as well as strengthening ones.

Whittenberger, J. D.↗
NASA NTRS1996

Microalloying Improves the Low-Cycle Fatigue Behavior of Powder-Extruded NiAl

There is considerable interest in developing new structural materials in which high use temperatures and strength, coupled with low density, are the minimum requirements. The goal for these new materials is to provide operation well beyond the working range of conventional superalloys. Of the many intermetallics under consideration, NiAl is one of the few systems that has emerged as a promising candidate for further development. This is because of a number of property advantages--including low density, high melting temperature, high thermal conductivity, and excellent environmental resistance. However, binary NiAl lacks strength and creep resistance at elevated temperatures. Also, its poor high-temperature strength results in worse-than-predicted low-cycle fatigue (LCF) lives at low strain ranges at 727 C (1341 F) because of accelerated creep damage mechanisms that result in significant intergranular cracking. One approach for improving these properties involves microalloying NiAl with either Zr or N. As an integral part of this alloy-development program at the NASA Lewis Research Center, the low-cycle fatigue behavior of Zr- and N-doped nickel aluminides produced by extrusion of prealloyed powders was investigated and compared with similarly processed binary NiAl.

Source record↗
NASA NTRS1986

Reactively-sputtered zinc semiconductor films of high conductivity for heterojunction devices

A high conductivity, n-doped semiconductor film is produced from zinc, or Zn and Cd, and group VI elements selected from Se, S and Te in a reactive magnetron sputtering system having a chamber with one or two targets, a substrate holder, means for heating the substrate holder, and an electric field for ionizing gases in the chamber. Zinc or a compound of Zn and Cd is placed in the position of one of the two targets and doping material in the position of the other of the two targets. Zn and Cd may be placed in separate targets while a dopant is placed in the third target. Another possibility is to place an alloy of Zn and dopant, or Zn, Cd and dopant in one target, thus using only one target. A flow of the inert gas is ionized and directed toward said targets, while a flow of a reactant gas consisting of hydrides of the group VI elements is directed toward a substrate on the holder. The targets are biased to attract negatively ionized inert gas. The desired stochiometry for high conductivity is achieved by controlling the temperature of the substrate, and partial pressures of the gases, and the target power and total pressure of the gases in the chamber.

Stirn, Richard J.↗
NASA NTRS2009

G(sup 4)FET Implementations of Some Logic Circuits

Some logic circuits have been built and demonstrated to work substantially as intended, all as part of a continuing effort to exploit the high degrees of design flexibility and functionality of the electronic devices known as G(sup 4)FETs and described below. These logic circuits are intended to serve as prototypes of more complex advanced programmable-logicdevice-type integrated circuits, including field-programmable gate arrays (FPGAs). In comparison with prior FPGAs, these advanced FPGAs could be much more efficient because the functionality of G(sup 4)FETs is such that fewer discrete components are needed to perform a given logic function in G(sup 4)FET circuitry than are needed perform the same logic function in conventional transistor-based circuitry. The underlying concept of using G(sup 4)FETs as building blocks of programmable logic circuitry was also described, from a different perspective, in G(sup 4)FETs as Universal and Programmable Logic Gates (NPO-41698), NASA Tech Briefs, Vol. 31, No. 7 (July 2007), page 44. A G(sup 4)FET can be characterized as an accumulation-mode silicon-on-insulator (SOI) metal oxide/semiconductor field-effect transistor (MOSFET) featuring two junction field-effect transistor (JFET) gates. The structure of a G(sup 4)FET (see Figure 1) is the same as that of a p-channel inversion-mode SOI MOSFET with two body contacts on each side of the channel. The top gate (G1), the substrate emulating a back gate (G2), and the junction gates (JG1 and JG2) can be biased independently of each other and, hence, each can be used to independently control some aspects of the conduction characteristics of the transistor. The independence of the actions of the four gates is what affords the enhanced functionality and design flexibility of G(sup 4)FETs. The present G(sup 4)FET logic circuits include an adjustable-threshold inverter, a real-time-reconfigurable logic gate, and a dynamic random-access memory (DRAM) cell (see Figure 2). The configuration of the adjustable-threshold inverter is similar to that of an ordinary complementary metal oxide semiconductor (CMOS) inverter except that an NMOSFET (a MOSFET having an n-doped channel and a p-doped Si substrate) is replaced by an n-channel G(sup 4)FET

Mojarradi, Mohammad↗
NASA NTRS2007

Design and Fabrication of High-Efficiency CMOS/CCD Imagers

An architecture for back-illuminated complementary metal oxide/semiconductor (CMOS) and charge-coupled-device (CCD) ultraviolet/visible/near infrared- light image sensors, and a method of fabrication to implement the architecture, are undergoing development. The architecture and method are expected to enable realization of the full potential of back-illuminated CMOS/CCD imagers to perform with high efficiency, high sensitivity, excellent angular response, and in-pixel signal processing. The architecture and method are compatible with next-generation CMOS dielectric-forming and metallization techniques, and the process flow of the method is compatible with process flows typical of the manufacture of very-large-scale integrated (VLSI) circuits. The architecture and method overcome all obstacles that have hitherto prevented high-yield, low-cost fabrication of back-illuminated CMOS/CCD imagers by use of standard VLSI fabrication tools and techniques. It is not possible to discuss the obstacles in detail within the space available for this article. Briefly, the obstacles are posed by the problems of generating light-absorbing layers having desired uniform and accurate thicknesses, passivation of surfaces, forming structures for efficient collection of charge carriers, and wafer-scale thinning (in contradistinction to diescale thinning). A basic element of the present architecture and method - the element that, more than any other, makes it possible to overcome the obstacles - is the use of an alternative starting material: Instead of starting with a conventional bulk-CMOS wafer that consists of a p-doped epitaxial silicon layer grown on a heavily-p-doped silicon substrate, one starts with a special silicon-on-insulator (SOI) wafer that consists of a thermal oxide buried between a lightly p- or n-doped, thick silicon layer and a device silicon layer of appropriate thickness and doping. The thick silicon layer is used as a handle: that is, as a mechanical support for the device silicon layer during micro-fabrication.

Pain, Bedabrata↗
NASA NTRS2006

Silicon-Based Optical Modulator with Ferroelectric Layer

According to a proposal, a silicon dioxide layer in a high-speed, low-power, silicon- based electro-optical modulator would be replaced by a layer of lead zirconate titanate or other ferroelectric oxide material. The purpose of this modification is to enhance the power performance and functionality of the modulator. In its unmodified form, the particular silicon- based electro-optical modulator is of an advanced design that overcomes the speed limitation of prior silicon-based electro- optical modulators. Whereas modulation frequencies of such devices had been limited to about 20 MHz, this modulator can operate at modulation frequencies as high as 1 GHz. This modulator can be characterized as a silicon-waveguide-based metal oxide/semiconductor (MOS) capacitor phase shifter in which modulation of the index of refraction in silicon is obtained by exploiting the free-charge-carrier-plasma dispersion effect. As shown in the figure, the modulator includes an n-doped crystalline silicon slab (the silicon layer of a silicon- on-insulator wafer) and a p-doped polycrystalline silicon rib with a gate oxide layer (the aforementioned silicon dioxide layer) sandwiched between them. Under accumulation conditions, the majority charge carriers in the silicon waveguide modify the index of refraction so that a phase shift is induced in the optical mode propagating in the waveguide. The advantage of using an MOS capacitor phase shifter is that it is possible to achieve high modulation speed because there are no slow carrier-generation or -recombination processes involved in the accumulation operation. The main advantage of the proposed substitution of a ferroelectric oxide layer for the silicon dioxide layer would arise from the spontaneous polarization effect of the ferroelectric layer: This spontaneous polarization would maintain accumulation conditions in the absence of applied voltage. Consequently, once the device had been switched to a given optical state, it would remain in that state, even in the absence of applied voltage (in other words, even with power turned off). A secondary advantage is that because the ferroelectric layer would have an index of refraction larger than that of silicon dioxide, there could be some reduction of optical losses attributable to fabrication of the modulator

Sheldon, Douglas↗
NASA NTRS2005

N-Type delta Doping of High-Purity Silicon Imaging Arrays

A process for n-type (electron-donor) delta doping has shown promise as a means of modifying back-illuminated image detectors made from n-doped high-purity silicon to enable them to detect high-energy photons (ultraviolet and x-rays) and low-energy charged particles (electrons and ions). This process is applicable to imaging detectors of several types, including charge-coupled devices, hybrid devices, and complementary metal oxide/semiconductor detector arrays. Delta doping is so named because its density-vs.-depth characteristic is reminiscent of the Dirac delta function (impulse function): the dopant is highly concentrated in a very thin layer. Preferably, the dopant is concentrated in one or at most two atomic layers in a crystal plane and, therefore, delta doping is also known as atomic-plane doping. The use of doping to enable detection of high-energy photons and low-energy particles was reported in several prior NASA Tech Briefs articles. As described in more detail in those articles, the main benefit afforded by delta doping of a back-illuminated silicon detector is to eliminate a "dead" layer at the back surface of the silicon wherein high-energy photons and low-energy particles are absorbed without detection. An additional benefit is that the delta-doped layer can serve as a back-side electrical contact. Delta doping of p-type silicon detectors is well established. The development of the present process addresses concerns specific to the delta doping of high-purity silicon detectors, which are typically n-type. The present process involves relatively low temperatures, is fully compatible with other processes used to fabricate the detectors, and does not entail interruption of those processes. Indeed, this process can be the last stage in the fabrication of an imaging detector that has, in all other respects, already been fully processed, including metallized. This process includes molecular-beam epitaxy (MBE) for deposition of three layers, including metallization. The success of the process depends on accurate temperature control, surface treatment, growth of high-quality crystalline silicon, and precise control of thicknesses of layers. MBE affords the necessary nanometer- scale control of the placement of atoms for delta doping. More specifically, the process consists of MBE deposition of a thin silicon buffer layer, the n-type delta doping layer, and a thin silicon cap layer. The n dopant selected for initial experiments was antimony, but other n dopants as (phosphorus or arsenic) could be used. All n-type dopants in silicon tend to surface-segregate during growth, leading to a broadened dopant-concentration- versus-depth profile. In order to keep the profile as narrow as possible, the substrate temperature is held below 300 C during deposition of the silicon cap layer onto the antimony delta layer. The deposition of silicon includes a silicon- surface-preparation step, involving H-termination, that enables the growth of high-quality crystalline silicon at the relatively low temperature with close to full electrical activation of donors in the surface layer.

Blacksberg, Jordana↗
NASA NTRS2012

Large-Area Vacuum Ultraviolet Sensors

Pt/(n-doped GaN) Schottky-barrier diodes having active areas as large as 1 cm square have been designed and fabricated as prototypes of photodetectors for the vacuum ultraviolet portion (wavelengths approximately equal 200 nm) of the solar spectrum. In addition to having adequate sensitivity to photons in this wavelength range, these photodetectors are required to be insensitive to visible and infrared components of sunlight and to have relatively low levels of dark current.

Aslam, Shahid↗
DOE OSTI2022

Metastability and Degradation of CdTe Solar Cells Investigated by nm-Scale Electrical Potential Imaging

We report on investigations of reversible metastability and irreversible degradation of MZO/CdSeTe/CdTe devices from the perspective of electric field across the device using Kelvin probe force microscopy (KPFM). The device showed reversible transitions between the light-soak state (LSS) with the best device efficiency and the dark-soak state (DSS) with an inferior efficiency. However, it showed an irreversible degradation state (DgS) driven by long-hour light soaking at an elevated temperature. The nm-scale KPFM electric field imaging on cross-sections of the devices revealed different anomalous electric field profiles. The electric field at the LSS exhibits a main peak inside the CdSeTe layer but not at the MZO/CdSeTe heterointerface, demonstrating that working junction of the device is a buried homojunction (BHJ). At the DSS, a second electric field peak was observed at the MZO/CdSeTe interface with a similar strength to the main BHJ, which probably caused the decrease in fill factor at the DSS. At the DgS, the electric field peak at the MZO/CdSeTe interface increased significantly and a third electric field was measured at the back contact of the device. Device modeling using COMSOL and in alignment with both the electric field and device current-voltage curves suggest that a slightly low n-doped CdSeTe in the region near the MZO/CdSeTe interface caused the BHJ, and that either a loss of MZO doping or increase of the conduction band offset spike due to long-term stress caused the fill factor-dominated degradation and the increased electric field near the MZO/CdSeTe interface at the DgS. The former, MZO doping decrease, is more plausible by referring the related literature.

BHJ↗