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At least 109 records · Page 6

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NASA NTRS1994

The Influence of SiC on the Ablation Response of Advanced Refractory Composite Materials

In continuing our studies of advanced refractory composite materials we have recently completed an arc-jet test series of a diverse group of ceramics and ceramic matrix composites. The compositions range from continuous fiber reinforced ceramics to monoliths. Many of these materials contain SiC and one objective of this test series was to identify the influence of SiC oxidation mechanisms on material performance. Hence the arc heater was operated at two conditions; one in which the passive oxidation of SiC would be dominant and the other where the active oxidation of SiC would be dominant. It is shown here that the active oxidation mechanism of SiC does not dominate material performance when it is present at levels equal to or below 20 volume percent.

Bull, Jeffrey D.↗

NASA NTRS1999

Sensor Lead Wires Positioned on SiC-based Monolithic Ceramic and Fiber- reinforced Ceramic Matrix Composite Subcomponents with Flat and Curved Surfaces

There is strong interest in the development of silicon carbide-based monolithic ceramic and composite materials and components for demanding, high-temperature applications. Thorough characterization of material properties, including high-temperature testing under simulated or actual operating conditions, is a high priority for programs involved in developing these silicon carbide- (SiC) based materials and components. Members of the Sensors and Electronics Technology Branch at the NASA Lewis Research Center are developing minimally intrusive methods of measuring the properties (such as the surface temperature, strain, and heat flux characteristics) of components and subelements that are being tested or operated in hostile, high-temperature environments. Their primary goal is to instrument the test article or operating component with durable sensors that have a minimal effect on test conditions such as the gas flow across the surface of the item and the material response (including the through-thickness conduction of heat). Therefore, the main thrust of their work has been the development of thin-film sensors (e.g., thermocouples or strain gauges) for use on various advanced material test articles, including SiC/SiC composite components. There was a need for a better method of securing sensor lead wires on SiC-based components and subelements that would be tested at temperatures to 1000 C (or higher), to enhance the durability of the overall minimally intrusive sensor system. To address this need, Lewis researchers devised an alternative approach for positioning the sensor lead wires (which are connected to the thin-film sensors) on SiC or SiC/SiC components. A reaction-forming method of joining was used to strongly bond hoop-shaped monolithic SiC and SiC/SiC composite attachments of various sizes to both flat and curved surfaces of SiC/SiC composite subelements (see the photos). This approach is based on an affordable, robust ceramic joining technology, named ARCJoinT, which was developed at Lewis for the joining of SiC-based ceramics and fiber-reinforced composites.

Kiser, James D.↗

NASA NTRS2003

Packaging Technology Designed, Fabricated, and Assembled for High-Temperature SiC Microsystems

A series of ceramic substrates and thick-film metalization-based prototype microsystem packages designed for silicon carbide (SiC) high-temperature microsystems have been developed for operation in 500 C harsh environments. These prototype packages were designed, fabricated, and assembled at the NASA Glenn Research Center. Both the electrical interconnection system and the die-attach scheme for this packaging system have been tested extensively at high temperatures. Printed circuit boards used to interconnect these chip-level packages and passive components also are being fabricated and tested. NASA space and aeronautical missions need harsh-environment, especially high-temperature, operable microsystems for probing the inner solar planets and for in situ monitoring and control of next-generation aeronautical engines. Various SiC high-temperature-operable microelectromechanical system (MEMS) sensors, actuators, and electronics have been demonstrated at temperatures as high as 600 C, but most of these devices were demonstrated only in the laboratory environment partially because systematic packaging technology for supporting these devices at temperatures of 500 C and beyond was not available. Thus, the development of a systematic high-temperature packaging technology is essential for both in situ testing and the commercialization of high-temperature SiC MEMS. Researchers at Glenn developed new prototype packages for high-temperature microsystems using ceramic substrates (aluminum nitride and 96- and 90-wt% aluminum oxides) and gold (Au) thick-film metalization. Packaging components, which include a thick-film metalization-based wirebond interconnection system and a low-electrical-resistance SiC die-attachment scheme, have been tested at temperatures up to 500 C. The interconnection system composed of Au thick-film printed wire and 1-mil Au wire bond was tested in 500 C oxidizing air with and without 50-mA direct current for over 5000 hr. The Au thick-film metalization-based wirebond electrical interconnection system was also tested in an extremely dynamic thermal environment to assess thermal reliability. The I-V curve1 of a SiC high-temperature diode was measured in oxidizing air at 500 C for 1000 hr to electrically test the Au thick-film material-based die-attach assembly.

Chen, Liang-Yu↗

NASA NTRS2006

Deep Reactive Ion Etching (DRIE) of High Aspect Ratio SiC Microstructures using a Time-Multiplexed Etch-Passivate Process

High aspect ratio silicon carbide (SiC) microstructures are needed for microengines and other harsh environment micro-electro-mechanical systems (MEMS). Previously, deep reactive ion etching (DRIE) of low aspect ratio (AR less than or = 1) deep (greater than 100 micron) trenches in SiC has been reported. However, existing DRIE processes for SiC are not well-suited for definition of high aspect ratio features because such simple etch-only processes provide insufficient control over sidewall roughness and slope. Therefore, we have investigated the use of a time-multiplexed etch-passivate (TMEP) process, which alternates etching with polymer passivation of the etch sidewalls. An optimized TMEP process was used to etch high aspect ratio (AR greater than 5) deep (less than 100 micron) trenches in 6H-SiC. Power MEMS structures (micro turbine blades) in 6H-SiC were also fabricated.

Evans, Laura J.↗

NASA NTRS1994

Porous silicon carbide (SiC) semiconductor device

A semiconductor device employs at least one layer of semiconducting porous silicon carbide (SiC). The porous SiC layer has a monocrystalline structure wherein the pore sizes, shapes, and spacing are determined by the processing conditions. In one embodiment, the semiconductor device is a p-n junction diode in which a layer of n-type SiC is positioned on a p-type layer of SiC, with the p-type layer positioned on a layer of silicon dioxide. Because of the UV luminescent properties of the semiconducting porous SiC layer, it may also be utilized for other devices such as LEDs and optoelectronic devices.

Shor, Joseph S.↗

NASA NTRS2009

SiC Optically Modulated Field-Effect Transistor

An optically modulated field-effect transistor (OFET) based on a silicon carbide junction field-effect transistor (JFET) is under study as, potentially, a prototype of devices that could be useful for detecting ultraviolet light. The SiC OFET is an experimental device that is one of several devices, including commercial and experimental photodiodes, that were initially evaluated as detectors of ultraviolet light from combustion and that could be incorporated into SiC integrated circuits to be designed to function as combustion sensors. The ultraviolet-detection sensitivity of the photodiodes was found to be less than desired, such that it would be necessary to process their outputs using high-gain amplification circuitry. On the other hand, in principle, the function of the OFET could be characterized as a combination of detection and amplification. In effect, its sensitivity could be considerably greater than that of a photodiode, such that the need for amplification external to the photodetector could be reduced or eliminated. The experimental SiC OFET was made by processes similar to JFET-fabrication processes developed at Glenn Research Center. The gate of the OFET is very long, wide, and thin, relative to the gates of typical prior SiC JFETs. Unlike in prior SiC FETs, the gate is almost completely transparent to near-ultraviolet and visible light. More specifically: The OFET includes a p+ gate layer less than 1/4 m thick, through which photons can be transported efficiently to the p+/p body interface. The gate is relatively long and wide (about 0.5 by 0.5 mm), such that holes generated at the body interface form a depletion layer that modulates the conductivity of the channel between the drain and the source. The exact physical mechanism of modulation of conductivity is a subject of continuing research. It is known that injection of minority charge carriers (in this case, holes) at the interface exerts a strong effect on the channel, resulting in amplification of the photon-detection signal. A family of operating curves characterizing the OFET can be generated in a series of measurements performed at different intensities of incident ultraviolet light.

Tabib-Azar, Massood↗

NASA NTRS2011

Active Oxidation of SiC

The high temperature oxidation of silicon carbide occurs in either a passive or active mode, depending on temperature and oxygen potential. Passive oxidation forms a protective oxide film which limits attack of the SiC:SiC(s) + 3/2 O2(g) = SiO2(s) + CO(g.) Active oxidation forms a volatile oxide and leads to extensive attack of the SiC: SiC(s) + O2(g) = SiO(g) + CO(g). The transition points and rates of active oxidation are a major issue. Previous studies are reviewed and the leading theories of passive/active transitions summarized. Comparisons are made to the active/passive transitions in pure Si, which are relatively well-understood. Critical questions remain about the difference between the active-to-passive transition and passive-to-active transition. For Si, Wagner [2] points out that the active-to-passive transition is governed by the criterion for a stable Si/SiO2 equilibria and the passive-to-active transition is governed by the decomposition of the SiO2 film. This suggests a significant oxygen potential difference between these two transitions and our experiments confirm this. For Si, the initial stages of active oxidation are characterized by the formation of SiO(g) and further oxidation to SiO2(s) as micron-sized rods, with a distinctive morphology. SiC shows significant differences. The active-to-passive and the passive-to-active transitions are close. The SiO2 rods only appear as the passive film breaks down. These differences are explained in terms of the reactions at the SiC/SiO2 interface. In order to understand the breakdown of the passive film, pre-oxidation experiments are conducted. These involve forming dense protective scales of 0.5, 1, and 2 microns and then subjecting the samples with these scales to a known active oxidation environment. Microstructural studies show that SiC/SiO2 interfacial reactions lead to a breakdown of the scale with a distinct morphology.

Jacobson, Nathan S.↗

NASA NTRS2004

SiC-Based Miniature High-Temperature Cantilever Anemometer

The figure depicts a miniature cantilever-type anemometer that has been developed as a prototype of compact, relatively nonintrusive anemometers that can function at temperatures up to 600 C and that can be expected to be commercially mass-producible at low cost. The design of this anemometer, and especially the packaging aspect of the design, is intended to enable measurement of turbulence in the high-temperature, high-vibration environment of a turbine engine or in any similar environment. The main structural components of the anemometer include a single-crystal SiC cantilever and two polycrystalline SiC clamping plates, all made from chemical-vapor-deposited silicon carbide. Fabrication of these components from the same basic material eliminates thermal-expansion mismatch, which has introduced spurious thermomechanical stresses in cantilever-type anemometers of prior design. The clamping plates are heavily oxidized to improve electrical insulation at high temperature. A cavity that serves as a receptacle for the clamped end of the cantilever is etched into one end of one clamping plate. Trenches that collectively constitute a socket for a multipin electrical plug (for connection to external electronic circuitry) are etched into the opposite end of this clamping plate. Metal strips for electrical contact are deposited on one face of the other clamping plate. Piezoresistive single-crystal SiC thin-film strain gauges are etched in the n-type SiC epilayer in a Wheatstone-bridge configuration. Metal contact pads on the cantilever that extend into the clamping-receptacle area, are obtained by deposition and patterning using standard semiconductor photolithography and etching methods. The cantilever and the two clamping plates are assembled into a sandwich structure that is then clamped in a stainless-steel housing. The Wheatstone- bridge carrying SiC cantilever with the metal contact pads on the piezoresistors is slid into the receptacle in the bottom clamping plate. The top clamping plate is brought into contact with the bottom plate so that the narrow section of the metal strips on the top clamp plate aligns with the metal contact pads on the cantilever. When the parts are clamped together, the metal strips provide electrical connections between the Wheatstone-bridge contact points and the sides the trenches that constitute the socket for the multipin electrical plug. Hence, to connect the Wheatstone bridge to external circuitry for processing of the anemometer readout, one need only insert the plug in the socket. In operation, the cantilever end of the stainless-steel housing is mounted flush with an engine wall and the unclamped portion of the cantilever is exposed into the flow. The cantilever is deflected in direct proportion to the force induced by component of flow parallel to the engine wall and perpendicular to the broad exposed face of the cantilever. The maximum strain on the cantilever occurs at the clamped edge and is measured by the piezoresistors, which are located there. The corresponding changes in resistance manifest themselves in the output of the Wheatstone bridge.

Okojie, Robert S.↗

NASA NTRS2014

Structural Characterization of Lateral-grown 6H-SiC am-plane Seed Crystals by Hot Wall CVD Epitaxy

The performance of commercially available silicon carbide (SiC) power devices is limited due to inherently high density of screw dislocations (SD), which are necessary for maintaining polytype during boule growth and commercially viable growth rates. The NASA Glenn Research Center (GRC) has recently proposed a new bulk growth process based on axial fiber growth (parallel to the c-axis) followed by lateral expansion (perpendicular to the c-axis) for producing multi-faceted m-plane SiC boules that can potentially produce wafers with as few as one SD per wafer. In order to implement this novel growth technique, the lateral homoepitaxial growth expansion of a SiC fiber without introducing a significant number of additional defects is critical. Lateral expansion is being investigated by hot wall chemical vapor deposition (HWCVD) growth of 6H-SiC am-plane seed crystals (0.8mm x 0.5mm x 15mm) designed to replicate axially grown SiC single crystal fibers. The post-growth crystals exhibit hexagonal morphology with approximately 1500 m (1.5 mm) of total lateral expansion. Preliminary analysis by synchrotron white beam x-ray topography (SWBXT) confirms that the growth was homoepitaxial, matching the polytype of the respective underlying region of the seed crystal. Axial and transverse sections from the as grown crystal samples were characterized in detail by a combination of SWBXT, transmission electron microscopy (TEM) and Raman spectroscopy to map defect types and distribution. X-ray diffraction analysis indicates the seed crystal contained stacking disorders and this appears to have been reproduced in the lateral growth sections. Analysis of the relative intensity for folded transverse acoustic (FTA) and optical (FTO) modes on the Raman spectra indicate the existence of stacking faults. Further, the density of stacking faults is higher in the seed than in the grown crystal. Bundles of dislocations are observed propagating from the seed in m-axis lateral directions. Contrast extinction analysis of these dislocation lines reveals they are edge type basal plane dislocations that track the growth direction. Polytype phase transition and stacking faults were observed by high-resolution TEM (HRTEM), in agreement with SWBXT and Raman scattering.

Single Crystal↗

NASA NTRS2010

Development of SiC Large Tapered Crystal Growth

Majority of very large potential benefits of wide band gap semiconductor power electronics have NOT been realized due in large part to high cost and high defect density of commercial wafers. Despite 20 years of development, present SiC wafer growth approach is yet to deliver majority of SiC's inherent performance and cost benefits to power systems. Commercial SiC power devices are significantly de-rated in order to function reliably due to the adverse effects of SiC crystal dislocation defects (thousands per sq cm) in the SiC wafer.

Neudeck, Phil↗

NASA NTRS2004

Step Free Surface Heteroepitaxy of 3C-SiC Layers on Patterned 4H/6H-SiC Mesas and Cantilevers

The off-axis approach to SiC epitaxial growth has not prevented many substrate crystal defects from propagating into SiC epilayers, and does not permit the realization of SiC heteropolytype devices. This paper reviews recent advancements in SiC epitaxial growth that begin to overcome the above shortcomings for arrays of device-sized mesas patterned into on-axis 4H/6HSiC wafers. These on-axis mesa growth techniques have produced 4H/6H-SiC homoepilayers and 3C-SiC heteroepilayers with substantially lower dislocation densities. The results should enable improved homojunction and heterojunction silicon carbide prototype devices.

Neudeck, P. G.↗

NASA NTRS2015

Ultra High Temperature (UHT) SiC Fiber (Phase 2)

Silicon-carbide fiber-reinforced silicon-carbide ceramic matrix composites (SiCSiC CMC) are emerginglightweight re-usable structural materials not only for hot section components in gas turbine engines, but also for controlsurfaces and leading edges of reusable hypersonic vehicles as well as for nuclear propulsion and reactor components. Ithas been shown that when these CMC are employed in engine hot-section components, the higher the upper usetemperature (UUT) of the SiC fiber, the more performance benefits are accrued, such as higher operating temperatures,reduced component cooling air, reduced fuel consumption, and reduced emissions. The first generation of SiCSiC CMC with a temperature capability of 2200-2400F are on the verge of being introduced into the hot-section components ofcommercial and military gas turbine engines.Today the SiC fiber type currently recognized as the worlds best in terms ofthermo-mechanical performance is the Sylramic-iBN fiber. This fiber was previously developed by the PI at NASA GRC using patented processes to improve the high-cost commercial Sylramic fiber, which in turn was derived from anotherlow-cost low-performance commercial fiber. Although the Sylramic-iBN fiber shows state-of-the art creep and rupture resistance for use temperatures above 2550oF, NASA has shown by fundamental creep studies and model developmentthat its microstructure and creep resistance could theoretically be significantly improved to produce an Ultra HighTemperature (UHT) SiC fiber.This Phase II Seedling Fund effort has been focused on the key objective of effectively repeating the similar processes used for producing the Sylramic-iBN fiber using a design of experiments approach to first understand the cause of the less than optimum Sylramic-iBN microstructure and then attempting to develop processconditions that eliminate or minimize these key microstructural issues. In so doing, it is predicted that that theseadvanced process could result in an UHT SiC fiber with 20 times more creep resistance than the Sylramic-iBN fiber,which in turn would allow SiCSiC CMC to operate up to 2700oF and above, thereby further enhancing the performancebenefits of SiCSiC components in aero-propulsion engines. It was also envisioned that the fiber processes developedduring Phase II efforts would not only reduce production costs for the UHT fiber by using low-cost precursor fibers andcombined processes, but also allow the UHT fibers to be directly produced in preforms of the precursor fibers, possibly atthe facilities of the CMC fabricator.

SiC Ceramic Fiber↗

NASA NTRSDate not supplied

DC Modeling of 4H-SiC nJFET Gate Length Reduction at 500°C

The development of robust, high-performance integrated circuits (ICs) will enable numerous potential NASA missions of current interest, including long-duration robotic missions exploring the 460°C surface of Venus. Currently, NASA is looking towards SiC-based devices to provide such a solution. However, the current NASA silicon carbide (SiC) JFET device with a channel length of 6 μm (recently fabricated Gen. 11 ICs) limits mission-relevant circuit capabilities. In this study, we combined experiments with simulations to explore two straightforward fabrication strategies (shallow n− and deep n+) to reduce the SiC JFET channel length while maintaining turn-off behavior needed to realize 500 °C circuit operation. First, the material properties for 4H-SiC were implemented in COMSOL and the Poisson equation was solved for twelve 2D device designs. Then, based on the insights gained from the distribution of the electron concentration, electrostatic potential, and electric field for twelve designs (with three fabrication strategies), simulation for a 1 μm gate length nJFET with the turn-off performance comparable to the state-of-the-art.

4H-SiC nJFET↗

NASA NTRSDate not supplied

DC Modeling of 4H-SiC nJFET Gate Length Reduction at 500°C

4H-SiC nJFET↗

NASA NTRS1978

Beta-to-alpha transformation in polycrystalline SiC. II - Interfacial energetics

A phenomenological analysis of the energetics of the beta-to-alpha transformation in polycrystalline SiC is presented. It is found that the extreme anisotropy of the interfacial energy between alpha- and beta-SiC can account for the rapid growth of composite grains into the beta matrix during conventional sintering or hot-pressing processes. The composite grains consist of alpha-SiC plates 'sandwiched' between well-oriented and recrystallized beta-SiC 'envelopes'. The interfaces involving the 111 plane type of beta and (0001) of alpha have much lower energies than random beta/alpha interfaces.

Mitchell, T. E.↗

NASA NTRS1986

Compensation in epitaxial cubic SiC films

Hall measurements on four n-type cubic SiC films epitaxially grown by chemical vapor deposition on SiC substrates are reported. The temperature dependent carrier concentrations indicate that the samples are highly compensated. Donor ionization energies, E sub D, are less than one half the values previously reported. The values for E sub D and the donor concentration N sub D, combined with results for small bulk platelets with nitrogen donors, suggest the relation E sub D (N sub D) = E sub D(O) - alpha N sub N sup 1/3 for cubic SiC. A curve fit gives alpha is approx 2.6x10/5 meV cm and E sub D (O) approx 48 meV, which is the generally accepted value of E sub D(O) for nitrogen donors in cubic SiC.

Segall, B.↗

NASA NTRS1986

Dry etching of beta-SiC in CF4 and CF4 + O2 mixtures

Dry etching of cubic (100) beta-SiC single-crystal thin films produced via chemical-vapor deposition (CVD) has been performed in CF4 and CF4 + O2 mixtures, in both the reactive-ion-etching (RIE) and plasma-etching modes. The latter process yielded measurable etch rates, but produced a dark surface layer which appears, from the results of secondary-ion mass spectrometry, to be residual SiC. The RIE samples had no residual layer, but Auger electron spectroscopy did reveal a C-rich surface. The optimal RIE conditions were obtained with 10 sccm of pure CF4 at 40 mtorr and a power density of 0.548 W/sq cm, giving an etch rate of 23.3 nm/min. Neither the increase of temperature between 293 and 573 K, nor the incremental addition of O2 to CF4 to 50 percent, produced any strong effect on the etch rates of SiC during RIE. Pictorial evidence of fine line structures produced by RIE of beta-SiC films are also presented.

Palmour, J. W.↗

NASA NTRS1986

Corrosion pitting of SiC by molten salts

The corrosion of SiC by thin films of Na2CO3 and Na2SO4 at 1000 C is characterized by a severe pitting attack of the SiC substrate. A range of different Si and SiC substrates were examined to isolate the factors critical to pitting. Two types of pitting attack are identified: attack at structural discontinuities and a crater-like attack. The crater-like pits are correlated with bubble formation during oxidation of the SiC. It appears that bubbles create unprotected regions, which are susceptible to enhanced attack and, hence, pit formation.

Jacobson, N. S.↗