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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 109 records · Page 6
All sourcesNASA NTRSDOE OSTI
DOE OSTI2018

The shape recovery conditions for Fe–Mn–Si alloys: An interplay between martensitic transformation and plasticity

Highlights: • Fe15Mn5Si9Cr5Ni samples were rolled at 800 °C and annealed at 650 (C1) and 1000 °C (C2). • TEM analysis was performed. • High density of stacking faults and appropriate density of dislocation appears in C1. • Complex dislocation arrays due to plastic deformation are observed in C2. • Shape memory properties depend on the thermomechanical treatment. - Abstract: This work analyses the improvement of the shape memory properties of Fe-Mn-Si based alloys, and expands upon and deepens recently published developments concerning this topic. We prepared TEM specimens from a Fe-15Mn-5Si-9Cr-5Ni sheet rolled at 800 °C and annealed at 650 °C–92% shape recovery – and from another sheet annealed at 1000 °C–45% shape recovery. Here, we analyse the development of microstructure during the γ ↔ ε martensitic transformation and correlate it with the shape memory behaviour. Among the observed microstructural features, the introduction of complex dislocation arrays due to plastic deformation appears to be critical for shape memory development, since they can arrest the backward movement of Shockley partial dislocations over the original path. Tailoring the microstructure in order to introduce a high stacking-fault density accompanied by an appropriate dislocation density remains a key issue in the design of these kinds of functional materials.

36 MATERIALS SCIENCE↗
NASA NTRS1977

On the error probability of general trellis codes with applications to sequential decoding

An upper bound on the average probability of error for maximum-likelihood decoding of the ensemble of random L-branch binary trellis codes of rate R = 1/n with distinction between memory length and tail length is given. It is shown that the bound is independent of the length L of the information sequence if the memory length exceeds the tail length by a specified amount that depends on L. Sequential decoding simulations using the stack algorithm were conducted to test the dependence of the undetected error probability on tail length and memory length, and the results corroborated the theory.

Johannesson, R.↗
DOE OSTI2023

Giant Nonlinear Optical Response via Coherent Stacking of In-Plane Ferroelectric Layers

Thin ferroelectric materials hold great promise for compact nonvolatile memory and nonlinear optical and optoelectronic devices. Herein, an ultrathin in-plane ferroelectric material that exhibits a giant nonlinear optical effect, group-IV monochalcogenide SnSe, is reported. Nanometer-scale ferroelectric domains with ≈90°/270° twin boundaries or ≈180° domain walls are revealed in physical-vapor-deposited SnSe by lateral piezoresponse force microscopy. Atomic structure characterization reveals both parallel and antiparallel stacking of neighboring van der Waals ferroelectric layers, leading to ferroelectric or antiferroelectric ordering. Ferroelectric domains exhibit giant nonlinear optical activity due to coherent enhancement of second-harmonic fields and the as-resulted second-harmonic generation was observed to be 100 times more intense than monolayer WS 2 . This work demonstrates in-plane ferroelectric ordering and giant nonlinear optical activity in SnSe, which paves the way for applications in on-chip nonlinear optical components and nonvolatile memory devices.

36 MATERIALS SCIENCE↗
DOE OSTI2015

Design and testing of the first 2D Prototype Vertically Integrated Pattern Recognition Associative Memory

An associative memory-based track finding approach has been proposed for a Level 1 tracking trigger to cope with increasing luminosities at the LHC. The associative memory uses a massively parallel architecture to tackle the intrinsically complex combinatorics of track finding algorithms, thus avoiding the typical power law dependence of execution time on occupancy and solving the pattern recognition in times roughly proportional to the number of hits. This is of crucial importance given the large occupancies typical of hadronic collisions. The design of an associative memory system capable of dealing with the complexity of HL-LHC collisions and with the short latency required by Level 1 triggering poses significant, as yet unsolved, technical challenges. For this reason, an aggressive R&D program has been launched at Fermilab to advance state of-the-art associative memory technology, the so called VIPRAM (Vertically Integrated Pattern Recognition Associative Memory) project. The VIPRAM leverages emerging 3D vertical integration technology to build faster and denser Associative Memory devices. The first step is to implement in conventional VLSI the associative memory building blocks that can be used in 3D stacking, in other words, the building blocks are laid out as if it is a 3D design. In this paper, we report on the first successful implementation of a 2D VIPRAM demonstrator chip (protoVIPRAM00). The results show that these building blocks are ready for 3D stacking.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
NASA NTRS1976

Simulating an aerospace multiprocessor

The paper describes a simulator which was used to evaluate the architecture of an aerospace multiprocessor. The simulator models interactions among the processors, memories, the central data bus, and a possible 'job stack'. Special features of the simulator are discussed, including the use of explicitly coded and individually distinguishable 'job models' instead of a statistically defined 'job mix' and a specialized Job Model Definition Language to automate the detailed coding of the models. Some results are presented which show that when the simulator was employed in conjunction with queuing theory and Markov-process analysis, more insight into system behavior was obtained than would have been with any one technique alone.

Mallach, E. G.↗
NASA NTRS1995

High Density Memory Based on Quantum Device Technology

We explore the feasibility of ultra-high density memory based on quantum devices. Starting from overall constraints on chip area, power consumption, access speed, and noise margin, we deduce boundaries on single cell parameters such as required operating voltage and standby current. Next, the possible role of quantum devices is examined. Since the most mature quantum device, the resonant tunneling diode (RTD) can easily be integrated vertically, it naturally leads to the issue of 3D integrated memory. We propose a novel method of addressing vertically integrated bistable two-terminal devices, such as resonant tunneling diodes (RTD) and Esaki diodes, that avoids individual physical contacts. The new concept has been demonstrated experimentally in memory cells of field effect transistors (FET's) and stacked RTD's.

vanderWagt, Paul↗
NASA NTRS2000

NASA's 3D Flight Computer for Space Applications

The New Millennium Program (NMP) Integrated Product Development Team (IPDT) for Microelectronics Systems was planning to validate a newly developed 3D Flight Computer system on its first deep-space flight, DS1, launched in October 1998. This computer, developed in the 1995-97 time frame, contains many new computer technologies previously never used in deep-space systems. They include: advanced 3D packaging architecture for future low-mass and low-volume avionics systems; high-density 3D packaged chip-stacks for both volatile and non-volatile mass memory: 400 Mbytes of local DRAM memory, and 128 Mbytes of Flash memory; high-bandwidth Peripheral Component Interface (Per) local-bus with a bridge to VME; high-bandwidth (20 Mbps) fiber-optic serial bus; and other attributes, such as standard support for Design for Testability (DFT). Even though this computer system did not complete on time for delivery to the DS1 project, it was an important development along a technology roadmap towards highly integrated and highly miniaturized avionics systems for deep-space applications. This continued technology development is now being performed by NASA's Deep Space System Development Program (also known as X2000) and within JPL's Center for Integrated Space Microsystems (CISM).

Alkalai, Leon↗
NASA NTRS2010

Reconstituted Three-Dimensional Interactive Imaging

A method combines two-dimensional images, enhancing the images as well as rendering a 3D, enhanced, interactive computer image or visual model. Any advanced compiler can be used in conjunction with any graphics library package for this method, which is intended to take digitized images and virtually stack them so that they can be interactively viewed as a set of slices. This innovation can take multiple image sources (film or digital) and create a "transparent" image with higher densities in the image being less transparent. The images are then stacked such that an apparent 3D object is created in virtual space for interactive review of the set of images. This innovation can be used with any application where 3D images are taken as slices of a larger object. These could include machines, materials for inspection, geological objects, or human scanning. Illuminous values were stacked into planes with different transparency levels of tissues. These transparency levels can use multiple energy levels, such as density of CT scans or radioactive density. A desktop computer with enough video memory to produce the image is capable of this work. The memory changes with the size and resolution of the desired images to be stacked and viewed.

Hamilton, Joseph↗
NASA NTRSDate not supplied

A Passive fuel-Cell Surface power System (PaCeSS)

This effort produces a fully-passive surface power generation capability for fuel cell technology. The concept replaces the actively pumped thermal management of a state of the art (SOA) fuel cell/electrolyzer stack with a passive 2-phase thermosyphon for heat transport and a passive shape memory actuating radiator for temperature management. The concept addresses NASA fuel cell technology roadmap needs for greater reliability and longer operating life by eliminating life limiting elements of SOA fuel cell system design that drive failure modes associated with moving parts and control complexity. Applications map to surface power (primary fuel cell), surface energy storage (regenerable fuel cell) and in-situ resource utilization (electrolyzer/unitized reversible fuel cell). The first year of this effort concluded with independent demonstrations of 2-phase thermosyphon heat transport from a simulated fuel cell and temperature driven actuation of a shape memory actuating radiator. Results are in-character with underlying physics and demonstrate the potential to realize the objectives of this concept. his effort produces a fully-passive surface power generation capability for fuel cell technology. The concept replaces the actively pumped thermal management of a state of the art (SOA) fuel cell/electrolyzer stack with a passive 2-phase thermosyphon for heat transport and a passive shape memory actuating radiator for temperature management.

deionized water↗
DOE OSTI2016

Analysis of self-heating of thermally assisted spin-transfer torque magnetic random access memory

Thermal assistance has been shown to significantly reduce the required operation power for spin torque transfer magnetic random access memory (STT-MRAM). Proposed heating methods include modified material stack compositions that result in increased self-heating or external heat sources. Here, we analyze the self-heating process of a standard perpendicular magnetic anisotropy STT-MRAM device through numerical simulations in order to understand the relative contributions of Joule, thermoelectric Peltier and Thomson, and tunneling junction heating. A 2D rotationally symmetric numerical model is used to solve the coupled electro-thermal equations including thermoelectric effects and heat absorbed or released at the tunneling junction. We compare self-heating for different common passivation materials, positive and negative electrical current polarity, and different device thermal anchoring and boundaries resistance configurations. The variations considered are found to result in significant differences in maximum temperatures reached. Average increases of 3 K, 10 K, and 100 K for different passivation materials, positive and negative polarity, and different thermal anchoring configurations, respectively, are observed. Furthermore, the highest temperatures, up to 424 K, are obtained for silicon dioxide as the passivation material, positive polarity, and low thermal anchoring with thermal boundary resistance configurations. Interestingly it is also found that due to the tunneling heat, Peltier effect, device geometry, and numerous interfacial layers around the magnetic tunnel junction (MTJ), most of the heat is dissipated on the lower potential side of the magnetic junction. We have observed this asymmetry in heating and is important as thermally assisted switching requires heating of the free layer specifically and this will be significantly different for the two polarity operations, set and reset.

77 NANOSCIENCE AND NANOTECHNOLOGY↗
DOE OSTI2018

SimpleSSD: Modeling Solid State Drives for Holistic System Simulation

Existing solid state drive (SSD) simulators unfortunately lack hardware and/or software architecture models. Consequently, they are far from capturing the critical features of contemporary SSD devices. More importantly, while the performance of modern systems that adopt SSDs can vary based on their numerous internal design parameters and storage-level configurations, a full system simulation with traditional SSD models often requires unreasonably long runtimes and excessive computational resources. In this work, we propose SimpleSSD, a high-fidelity simulator that models all detailed characteristics of hardware and software, while simplifying the nondescript features of storage internals. In contrast to existing SSD simulators, SimpleSSD can easily be integrated into publicly-available full system simulators. Here, in addition, it can accommodate a complete storage stack and evaluate the performance of SSDs along with diverse memory technologies and microarchitectures. Thus, it facilitates simulations that explore the full design space at different levels of system abstraction.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2015

Three-dimensional stacked structured ASIC devices and methods of fabrication thereof

A 3D stacked sASIC is provided that includes a plurality of 2D reconfigurable structured structured ASIC (sASIC) levels interconnected through hard-wired arrays of 3D vias. The 2D sASIC levels may contain logic, memory, analog functions, and device input/output pad circuitry. During fabrication, these 2D sASIC levels are stacked on top of each other and fused together with 3D metal vias. Such 3D vias may be fabricated as through-silicon vias (TSVs). They may connect to the back-side of the 2D sASIC level, or they may be connected to top metal pads on the front-side of the 2D sASIC level.

36 MATERIALS SCIENCE↗
DOE OSTI2016

Sub-10 nm low current resistive switching behavior in hafnium oxide stack

In this letter, a tip-induced cell relying on the conductive atomic force microscope is proposed. It is verified as a referable replica of an integrated resistive random access memory (RRAM) device. On the basis of this cell, the functionality of sub-10 nm resistive switching is confirmed in hafnium oxide stack. Moreover, the low current switching behavior in the sub-10 nm dimension is found to be more pronounced than that of a 50 × 50 nm{sup 2} device. It shows better ON/OFF ratio and low leakage current. The enhanced memory performance is ascribed to a change in the shape of the conductive filament as the device dimensions are reduced to sub-10 nm. Therefore, device downscaling provides a promising approach for the resistance optimization that benefits the RRAM array design.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2014

GeTe sequences in superlattice phase change memories and their electrical characteristics

We studied GeTe structures in superlattice phase change memories (superlattice PCMs) with a [GeTe/Sb{sub 2}Te{sub 3}] stacked structure by X-ray diffraction (XRD) analysis. We examined the electrical characteristics of superlattice PCMs with films deposited at different temperatures. It was found that XRD spectra differed between the films deposited at 200 °C and 240 °C; the differences corresponded to the differences in the GeTe sequences in the films. We applied first-principles calculations to calculate the total energy of three different GeTe sequences. The results showed the Ge-Te-Ge-Te sequence had the lowest total energy of the three and it was found that with this sequence the superlattice PCMs did not run.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
NASA NTRS2011

Zero-Copy Objects System

Zero-Copy Objects System software enables application data to be encapsulated in layers of communication protocol without being copied. Indirect referencing enables application source data, either in memory or in a file, to be encapsulated in place within an unlimited number of protocol headers and/or trailers. Zero-copy objects (ZCOs) are abstract data access representations designed to minimize I/O (input/output) in the encapsulation of application source data within one or more layers of communication protocol structure. They are constructed within the heap space of a Simple Data Recorder (SDR) data store to which all participating layers of the stack must have access. Each ZCO contains general information enabling access to the core source data object (an item of application data), together with (a) a linked list of zero or more specific extents that reference portions of this source data object, and (b) linked lists of protocol header and trailer capsules. The concatenation of the headers (in ascending stack sequence), the source data object extents, and the trailers (in descending stack sequence) constitute the transmitted data object constructed from the ZCO. This scheme enables a source data object to be encapsulated in a succession of protocol layers without ever having to be copied from a buffer at one layer of the protocol stack to an encapsulating buffer at a lower layer of the stack. For large source data objects, the savings in copy time and reduction in memory consumption may be considerable.

Burleigh, Scott C.↗
DOE OSTI2017

Effect of different stages of deformation on the microstructure evolution of Ti-rich NiTi shape memory alloy

The main objective of this work was to investigate the thermomechanical behavior and microstructural changes of a Ti-rich NiTi shape memory alloy (SMA). The microstructural and texture evolution of aged NiTi alloy at different degrees of deformation were elicited by transmission electron microscopy (TEM). An effort was made to correlate results obtained from the tensile test with results from microstructure studies. The undeformed sample reveals a self-accommodated morphology with straight and well defined twin boundaries. At different stages of deformation, diverse mechanisms were involved. These mechanisms include marstraining, detwinning accompanied by dislocation movement, and finally, severe plastic deformation, subdivision and amorphization of the matrix. Under increasing strains, high density lattice defects were generated and the morphology of B19’ became disordered. - Graphical abstract: The summary of microstructure changes of the martensite twins during tensile deformation in polycrystalline NiTi SMAs. - Highlights: • Initial elastic response, dislocation avalanche and deformation bands were studied. • < 011 > Type II twin accompanied by detwinned area after 2% cold work was observed. • Visible parallel fine stacking faults showed plastic flow of the material. • At higher strains, subgrains changed to recrystallized, finely amorphous structure.

36 MATERIALS SCIENCE↗
NASA NTRS1977

Packaging of a large capacity magnetic bubble domain spacecraft recorder

A Solid State Spacecraft Data Recorder (SSDR), based on bubble domain technology, having a storage capacity of 10 to the 8th power bits, was designed and is being tested. The recorder consists of two memory modules each having 32 cells, each cell containing sixteen 100 kilobit serial bubble memory chips. The memory modules are interconnected to a Drive and Control Unit (DCU) module containing four microprocessors, 500 integrated circuits, a RAM core memory and two PROM's. The two memory modules and DCU are housed in individual machined aluminum frames, are stacked in brick fashion and through bolted to a base plate assembly which also houses the power supply.

Becker, F. J.↗
DOE OSTI2016

Thermal conductivity measurement of amorphous dielectric multilayers for phase-change memory power reduction

In this work, we investigate the temperature-dependent thermal conductivities of few nanometer thick alternating stacks of amorphous dielectrics, specifically SiO{sub 2}/Al{sub 2}O{sub 3} and SiO{sub 2}/Si{sub 3}N{sub 4}. Experiments using steady-state Joule-heating and electrical thermometry, while using a micro-miniature refrigerator over a wide temperature range (100–500 K), show that amorphous thin-film multilayer SiO{sub 2}/Si{sub 3}N{sub 4} and SiO{sub 2}/Al{sub 2}O{sub 3} exhibit through-plane room temperature effective thermal conductivities of about 1.14 and 0.48 W/(m × K), respectively. In the case of SiO{sub 2}/Al{sub 2}O{sub 3}, the reduced conductivity is attributed to lowered film density (7.03 → 5.44 × 10{sup 28 }m{sup –3} for SiO{sub 2} and 10.2 → 8.27 × 10{sup 28 }m{sup –3} for Al{sub 2}O{sub 3}) caused by atomic layer deposition of thin-films as well as a small, finite, and repeating thermal boundary resistance (TBR) of 1.5 m{sup 2} K/GW between dielectric layers. Molecular dynamics simulations reveal that vibrational mismatch between amorphous oxide layers is small, and that the TBR between layers is largely due to imperfect interfaces. Finally, the impact of using this multilayer dielectric in a dash-type phase-change memory device is studied using finite-element simulations.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗