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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 109 records · Page 6

Micropower logic circuits.

Complementary symmetry flip-flop and similar transistor micropower digital logic circuit design

DIGITAL TECHNIQUE↗

Long life assurance study for manned spacecraft long life hardware. Volume 2: Long life assurance studies of EEE parts and packaging

Guidelines for the design, development, and fabrication of electronic components and circuits for use in spacecraft construction are presented. The subjects discussed involve quality control procedures and test methodology for the following subjects: (1) monolithic integrated circuits, (2) hybrid integrated circuits, (3) transistors, (4) diodes, (5) tantalum capacitors, (6) electromechanical relays, (7) switches and circuit breakers, and (8) electronic packaging.

Source record↗

Upscaling of 500 °C Durable SiC JFET-R Integrated Circuits

At HiTEC2018, NASA Glenn Research Center reported the first demonstration of yearlong 500°C operation of ceramic-packaged “Generation 10” ~200-transistor integrated circuits (ICs) based on two-level interconnect silicon carbide (4H-SiC) junction field effect transistors and resistors (JFET-R). This HiTEC 2021submissionupdateson-going efforts at NASA Glenn spanning two subsequent prototype IC generations “11 and 12” to increase both complexity and durability of these ICs. Increased chip complexities of around 1000 transistors/chip for Gen. 11and near 3000 transistors/chip for Gen. 12 aremade possibleby reductions in minimum layout feature sizes (including resistorwidth shrinkage from 6 μm to 2μm) coupled with enlarged die size (from 3x3 mm to 5x5mm). Gen. 11 ICs electrically tested to date include an 8-bit delta-sigma analog to digital converter (ADC) as well as upscaled random access memory (RAM)and nearly 1 kbit read only memory (ROM). However, Gen. 11 prototype ICs exhibited significantly lower yield and durability than Gen. 10 ICs. Development of revised processing is being investigated towards mitigating these issues in subsequentGen. 12 fabrication runcurrentlyin progress.

Silicon Carbide↗

Upscaling of 500 °C Durable SiC JFET-R Integrated Circuits

At HiTEC 2018, NASA Glenn Research Center reported the first demonstration of yearlong 500 °C operation of ceramic-packaged “Generation 10” ~200-transistor integrated circuits (ICs) based on two-level interconnect silicon carbide (4H-SiC) junction field effect transistors and resistors (JFET-R). This HiTEC 2021 submission updates on-going efforts at NASA Glenn spanning two subsequent prototype IC generations “11 and 12” to increase both complexity and durability of these ICs. Increased chip complexities of around 1000 transistors/chip for Gen. 11 and near 3000 transistors/chip for Gen. 12 are made possible by reductions in minimum layout feature sizes (including resistor width shrinkage from 6 µm to 2 µm) coupled with enlarged die size (from 3 x 3 mm to 5 x 5 mm). Gen. 11 ICs electrically tested to date include an 8-bit delta-sigma analog to digital converter (ADC) as well as upscaled random access memory (RAM) and nearly 1 kbit read only memory (ROM). However, Gen. 11 prototype ICs exhibited significantly lower yield and durability than Gen. 10 ICs. Development of revised processing is being investigated towards mitigating these issues in subsequent Gen. 12 fabrication run currently in progress.

silicon carbide↗

Rapid evolution of analog circuits configured on a field programmable transistor array

The purpose of this paper is to illustrate evolution of analog circuits on a stand-alone board-level evolvable system (SABLES). SABLES is part of an effort to achieve integrated evolvable systems. SABLES provides autonomous, fast (tens to hundreds of seconds), on-chip circuit evolution involving about 100,000 circuit evaluations. Its main components are a JPL Field Programmable Transistor Array (FPTA) chip used as transistor-level reconfigurable hardware, and a TI DSP that implements the evolutionary algorithm controlling the FPTA reconfiguration. The paper details an example of evolution on SABLES and points out to certain transient and memory effects that affect the stability of solutions obtained reusing the same piece of hardware for rapid testing of individuals during evolution.

SABLES analog circuits field programmable transist↗

High noise immunity one shot

Multivibrator circuit, which includes constant current source, isolates line noise from timing circuitry and field effect transistor controls circuit's operational modes. Circuit has high immunity to supply line noise.

Schaffer, G. L.↗

Overload-protector/fault-indicator circuit

Circuit incorporates three-terminal current limiter (78M24) to increase overall reliability and to eliminate transistor burnouts resulting from shorted interconnection lines and other overloads. Fact-acting light emitting diodes across the limiters show status of transistor output circuits.

Paluka, J. R.↗

Material‐Driven Neuronal Oscillators and Filters via Active Reactance in CC‐NDR and VC‐NDR Electro‐Thermal Memristors

The continued scaling of artificial intelligence and telecommunications hardware is increasingly constrained by the power, bandwidth, and area limitations of transistor-based circuits. Neuromorphic processor units, analog oscillators, and active inductors and capacitors rely on complex multi-transistor architectures restricting material choices and incurring energy and footprint overhead. Here, we show that active reactance in electro-thermal memristors provides an intrinsic, material driven route to neuronal oscillator dynamics and signal processing. Using a physics-based compact modeling framework, we bridge negative differential resistance (NDR) and bias-tunable reactance, which underlies spiking dynamics in electro-thermal memristors. Memristors with negative temperature coefficients of resistance (TCR) manifest current-controlled (CC-) NDR and act as active inductors, thus generating spiking above a critical circuit capacitance; whereas memristors with positive TCR manifest voltage-controlled (VC-) NDR and active capacitance, leading to spiking above a critical inductance. By creating a compact model for La 0.7 Ca 0.3 MnO 3 as a representative VC-NDR material and comparing it with LaCoO 3 manifesting CC-NDR, we explain the physical origins of their distinct current-voltage characteristics, reactive phase shifts and consequent spiking behaviors. Finally, we demonstrate tunable filtering enabled by the active reactance of electro-thermal memristors, establishing them as a compact hardware platform for neuronal oscillator functionality and integrated filtering beyond conventional CMOS.

active reactance↗

Dual mode solid state power switch

A solid state amplifier has an output transistor stage and an input transistor stage interconnected as a Darlington circuit. An interstage transistor interconnecting the collectors of the two stages of the Darlington circuit is connected with the first stage transistor in a compound configuration. When the load current furnished by the amplifier is less than a predetermined value, the output stage operates as a simple saturated switch with its base drive current flowing through the emitter-base junction of the first stage which produces no collector current because the base-emitter junction of the interstage transistor is reverse-biased. When the load current exceeds said predetermined value, the interstage transistor begins to conduct allowing the input and output stages to operate as a Darlington amplifier and diverting a significant portion of the base drive current of the output transistor back into the load.

Maus, Louis C.↗

Recovering Energy From Relays

Magnetic energy stored in relay recovered with aid of simple circuit. Circuit recovers more than 20 percent of energy stored in relay winding and returns it to powerline. New three-transistor driver circuit requires no additional winding.

Mclyman, C. W.↗

Preventing Simultaneous Conduction In Switching Transistors

High voltage spikes and electromagnetic interference suppressed. Power-supply circuit including two switching transistors easily modified to prevent simultaneous conduction by both transistors during switching intervals. Diode connected between collector of each transistor and driving circuit for opposite transistor suppresses driving signal to transistor being turned on until transistor being turned off ceases to carry current.

Mclyman, William T.↗