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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 109 records · Page 6
All sourcesNASA NTRSDOE OSTI
NASA NTRS2005

Characteristics Of Ferroelectric Logic Gates Using a Spice-Based Model

A SPICE-based model of an n-channel ferroelectric field effect transistor has been developed based on both theoretical and empirical data. This model was used to generate the I-V characteristic of several logic gates. The use of ferroelectric field effect transistors in memory circuits is being developed by several organizations. The use of FFETs in other circuits, both analog and digital needs to be better understood. The ability of FFETs to have different characteristics depending on the initial polarization can be used to create logic gates. These gates can have properties not available to standard CMOS logic gates, such as memory, reconfigurability and memory. This paper investigates basic properties of FFET logic gates. It models FFET inverter, NAND gate and multi-input NAND gate. The I-V characteristics of the gates are presented as well as transfer characteristics and timing. The model used is a SPICE-based model developed from empirical data from actual Ferroelectric transistors. It simulates all major characteristics of the ferroelectric transistor, including polarization, hysteresis and decay. Contrasts are made of the differences between FFET logic gates and CMOS logic gates. FFET parameters are varied to show the effect on the overall gate. A recodigurable gate is investigated which is not possible with CMOS circuits. The paper concludes that FFETs can be used in logic gates and have several advantages over standard CMOS gates.

MacLeod, Todd C.↗
NASA NTRS1978

Multiplexer/demultiplexer flexibility enhancement program

This final report summarizes the accomplishments of the NASA/JSC MDM Flexibility Enhancement Program, Contract NAS9-15359 as carried out by Sperry Flight Systems from April through December 1977. Included are discussions of major statement of work tasks and the results, conclusions and recommended actions. All tasks called out in the amended SOW were carried out. Significant development tasks which were completed included the following: (1) Development, breadboard and test of a Pulse Output 28-volt Module. (2) Development and test of a 32-channel DC Analog Input (DCIN) Differential Module. (3) Development and test of a sequence memory module using an M2708 EPROM which can be programmed in the unit. (4) Development and test of a radiator top cover for a radiation-cooled Flexible MDM.

Source record↗
NASA NTRS2012

Lunar Reconnaissance Orbiter (LRO) Command and Data Handling Flight Electronics Subsystem

A document describes a high-performance, modular, and state-of-the-art Command and Data Handling (C&DH) system developed for use on the Lunar Reconnaissance Orbiter (LRO) mission. This system implements a complete hardware C&DH subsystem in a single chassis enclosure that includes a processor card, 48 Gbytes of solid-state recorder memory, data buses including MIL-STD-1553B, custom RS-422, SpaceWire, analog collection, switched power services, and interfaces to the Ka-Band and S-Band RF communications systems. The C&DH team capitalized on extensive experience with hardware and software with PCI bus design, SpaceWire networking, Actel FPGA design, digital flight design techniques, and the use of VxWorks for the real-time operating system. The resulting hardware architecture was implemented to meet the LRO mission requirements. The C&DH comprises an enclosure, a backplane, a low-voltage power converter, a single-board computer, a communications interface board, four data storage boards, a housekeeping and digital input/output board, and an analog data acquisition board. The interfaces between the C&DH and the instruments and avionics are connected through a SpaceWire network, a MIL-STD-1553 bus, and a combination of synchronous and asynchronous serial data transfers over RS-422 and LVDS (low-voltage differential-signaling) electrical interfaces. The C&DH acts as the spacecraft data system with an instrument data manager providing all software and internal bus scheduling, ingestion of science data, distribution of commands, and performing science operations in real time.

Nguyen, Quang↗
NASA NTRS1985

Method of and apparatus for generating an interstitial point in a data stream having an even number of data points

Apparatus for doubling the data density rate of an analog to digital converter or doubling the data density storage capacity of a memory deviced is discussed. An interstitial data point midway between adjacent data points in a data stream having an even number of equal interval data points is generated by applying a set of predetermined one-dimensional convolute integer coefficients which can include a set of multiplier coefficients and a normalizer coefficient. Interpolator means apply the coefficients to the data points by weighting equally on each side of the center of the even number of equal interval data points to obtain an interstital point value at the center of the data points. A one-dimensional output data set, which is twice as dense as a one-dimensional equal interval input data set, can be generated where the output data set includes interstitial points interdigitated between adjacent data points in the input data set. The method for generating the set of interstital points is a weighted, nearest-neighbor, non-recursive, moving, smoothing averaging technique, equivalent to applying a polynomial regression calculation to the data set.

Edwards, T. R.↗
NASA NTRS1996

Remote Monitor Alarm System

A remote monitor alarm system monitors discrete alarm and analog power supply voltage conditions at remotely located communications terminal equipment. A central monitoring unit (CMU) is connected via serial data links to each of a plurality of remote terminal units (RTUS) that monitor the alarm and power supply conditions of the remote terminal equipment. Each RTU can monitor and store condition information of both discrete alarm points and analog power supply voltage points in its associated communications terminal equipment. The stored alarm information is periodically transmitted to the CMU in response to sequential polling of the RTUS. The number of monitored alarm inputs and permissible voltage ranges for the analog inputs can be remotely configured at the CMU and downloaded into programmable memory at each RTU. The CMU includes a video display, a hard disk memory, a line printer and an audio alarm for communicating and storing the alarm information received from each RTU.

Stute, Robert A.↗
NASA NTRS1996

Hardware/Software Issues for Video Guidance Systems: The Coreco Frame Grabber

The F64 frame grabber is a high performance video image acquisition and processing board utilizing the TMS320C40 and TMS34020 processors. The hardware is designed for the ISA 16 bit bus and supports multiple digital or analog cameras. It has an acquisition rate of 40 million pixels per second, with a variable sampling frequency of 510 kHz to MO MHz. The board has a 4MB frame buffer memory expandable to 32 MB, and has a simultaneous acquisition and processing capability. It supports both VGA and RGB displays, and accepts all analog and digital video input standards.

Bales, John W.↗
NASA NTRS2018

Guideline for Single-Event Effect (SEE) Testing of System on a Chip (SOC) Devices

The use of complex single and multicore processors with significant cache memory, on-chip peripherals, memory controllers, and high speed input/output (IO) that integrate many of the parts of a traditional computer system is becoming more common in space applications. Such devices are often referred to as system on a chip devices (SOCs), even though the term is used somewhat inaccurately due to the lack of analog and mixed signal subcircuits. These devices are complex combinations of single- or multi-core processors with memory controllers, high-speed input/output (IO), and other peripheral structures that formerly would have been handled by off-chip resources. In the past the processors were tested for single event effects (SEE) separately, and the peripherals were often put into custom application-specific integrated circuits (ASICs) along with other resources required by the user. Performance and cost pressures have pushed commercial devices to incorporate many of the functional blocks into a single chip, an SOC. The NASA Electronic Parts and Packaging Program (NEPP) has been examining ways to perform SEE radiation hardness assurance (RHA) testing of these processor-centric SOCs to achieve reasonable understanding of their performance in space missions.

Guertin, Steven M.↗
NASA NTRS1980

Eight microprocessor-based instrument data systems in the Galileo Orbiter spacecraft

Instrument data systems consist of a microprocessor, 3K bytes of Read Only Memory and 3K bytes of Random Access Memory. It interfaces with the spacecraft data bus through an isolated user interface with a direct memory access bus adaptor, and/or parallel data from instrument devices such as registers, buffers, analog to digital converters, multiplexers, and solid state sensors. These data systems support the spacecraft hardware and software communication protocol, decode and process instrument commands, generate continuous instrument operating modes, control the instrument mechanisms, acquire, process, format, and output instrument science data.

Barry, R. C.↗
NASA NTRS1991

Rapidly quantifying the relative distention of a human bladder

A device and method was developed to rapidly quantify the relative distention of the bladder of a human subject. An ultrasonic transducer is positioned on the human subject near the bladder. A microprocessor controlled pulser excites the transducer by sending an acoustic wave into the human subject. This wave interacts with the bladder walls and is reflected back to the ultrasonic transducer where it is received, amplified, and processed by the receiver. The resulting signal is digitized by an analog to digital converter, controlled by the microprocessor again, and is stored in data memory. The software in the microprocessor determines the relative distention of the bladder as a function of the propagated ultrasonic energy. Based on programmed scientific measurements and the human subject's past history as contained in program memory, the microprocessor sends out a signal to turn on any or all of the available alarms. The alarm system includes and audible alarm, the visible alarm, the tactile alarm, and the remote wireless alarm.

Companion, John A.↗
NASA NTRS1994

Mode shape analysis using a commercially available peak store video frame buffer

Time exposure photography, sometimes coupled with strobe illumination, is an accepted method for motion analysis that bypasses frame by frame analysis and resynthesis of data. Garden variety video cameras can now exploit this technique using a unique frame buffer that is a non-integrating memory that compares incoming data with that already stored. The device continuously outputs an analog video signal of the stored contents which can then be redigitized and analyzed using conventional equipment. Historically, photographic time exposures have been used to record the displacement envelope of harmonically oscillating structures to show mode shape. Mode shape analysis is crucial, for example, in aeroelastic testing of wind tunnel models. Aerodynamic, inertial, and elastic forces can couple together leading to catastrophic failure of a poorly designed aircraft. This paper will explore the usefulness of the peak store device as a videometric tool and in particular discuss methods for analyzing a targeted vibrating plate using the 'peak store' in conjunction with calibration methods familiar to the close-range videometry community. Results for the first three normal modes will be presented.

Snow, Walter L.↗
NASA NTRS2008

Ferroelectric Field-Effect Transistor Differential Amplifier Circuit Analysis

There has been considerable research investigating the Ferroelectric Field-Effect Transistor (FeFET) in memory circuits. However, very little research has been performed in applying the FeFET to analog circuits. This paper investigates the use of FeFETs in a common analog circuit, the differential amplifier. The two input Metal-Oxide-Semiconductor (MOS) transistors in a general MOS differential amplifier circuit are replaced with FeFETs. Resistors are used in place of the other three MOS transistors. The FeFET model used in the analysis has been previously reported and was based on experimental device data. Because of the FeFET hysteresis, the FeFET differential amplifier has four different operating modes depending on whether the FeFETs are positively or negatively polarized. The FeFET differential amplifier operation in the different modes was analyzed by calculating the amplifier voltage transfer and gain characteristics shown in figures 2 through 5. Comparisons were made between the FeFET differential amplifier and the standard MOS differential amplifier. Possible applications and benefits of the FeFET differential amplifier are discussed.

Phillips, Thomas A.↗
NASA NTRS1986

Advanced life support control/monitor instrumentation concepts for flight application

Development of regenerative Environmental Control/Life Support Systems requires instrumentation characteristics which evolve with successive development phases. As the development phase moves toward flight hardware, the system availability becomes an important design aspect which requires high reliability and maintainability. This program was directed toward instrumentation designs which incorporate features compatible with anticipated flight requirements. The first task consisted of the design, fabrication and test of a Performance Diagnostic Unit. In interfacing with a subsystem's instrumentation, the Performance Diagnostic Unit is capable of determining faulty operation and components within a subsystem, perform on-line diagnostics of what maintenance is needed and accept historical status on subsystem performance as such information is retained in the memory of a subsystem's computerized controller. The second focus was development and demonstration of analog signal conditioning concepts which reduce the weight, power, volume, cost and maintenance and improve the reliability of this key assembly of advanced life support instrumentation. The approach was to develop a generic set of signal conditioning elements or cards which can be configured to fit various subsystems. Four generic sensor signal conditioning cards were identified as being required to handle more than 90 percent of the sensors encountered in life support systems. Under company funding, these were detail designed, built and successfully tested.

Heppner, D. B.↗
NASA NTRS1990

Programmable synaptic devices for electronic neural nets

The architecture, design, and operational characteristics of custom VLSI and thin film synaptic devices are described. The devices include CMOS-based synaptic chips containing 1024 reprogrammable synapses with a 6-bit dynamic range, and nonvolatile, write-once, binary synaptic arrays based on memory switching in hydrogenated amorphous silicon films. Their suitability for embodiment of fully parallel and analog neural hardware is discussed. Specifically, a neural network solution to an assignment problem of combinatorial global optimization, implemented in fully parallel hardware using the synaptic chips, is described. The network's ability to provide optimal and near optimal solutions over a time scale of few neuron time constants has been demonstrated and suggests a speedup improvement of several orders of magnitude over conventional search methods.

Moopenn, A.↗
NASA NTRS2003

Collaborative Software Development Approach Used to Deliver the New Shuttle Telemetry Ground Station

United Space Alliance (USA) developed and used a new software development method to meet technical, schedule, and budget challenges faced during the development and delivery of the new Shuttle Telemetry Ground Station at Kennedy Space Center. This method, called Collaborative Software Development, enabled KSC to effectively leverage industrial software and build additional capabilities to meet shuttle system and operational requirements. Application of this method resulted in reduced time to market, reduced development cost, improved product quality, and improved programmer competence while developing technologies of benefit to a small company in California (AP Labs Inc.). Many modifications were made to the baseline software product (VMEwindow), which improved its quality and functionality. In addition, six new software capabilities were developed, which are the subject of this article and add useful functionality to the VMEwindow environment. These new software programs are written in C or VXWorks and are used in conjunction with other ground station software packages, such as VMEwindow, Matlab, Dataviews, and PVWave. The Space Shuttle Telemetry Ground Station receives frequency-modulation (FM) and pulse-code-modulated (PCM) signals from the shuttle and support equipment. The hardware architecture (see figure) includes Sun workstations connected to multiple PCM- and FM-processing VersaModule Eurocard (VME) chassis. A reflective memory network transports raw data from PCM Processors (PCMPs) to the programmable digital-to-analog (D/A) converters, strip chart recorders, and analysis and controller workstations.

Kirby, Randy L.↗
NASA NTRS2013

Direct Numerical Simulation of Transition in a Swept-Wing Boundary Layer

Direct numerical simulation (DNS) is performed to examine laminar to turbulent transition due to high-frequency secondary instability of stationary crossflow vortices in a subsonic swept-wing boundary layer for a realistic natural-laminar-flow airfoil configuration. The secondary instability is introduced via inflow forcing derived from a two-dimensional, partial-differential-equation based eigenvalue computation; and the mode selected for forcing corresponds to the most amplified secondary instability mode which, in this case, derives a majority of its growth from energy production mechanisms associated with the wall-normal shear of the stationary basic state. Both the growth of the secondary instability wave and the resulting onset of laminar-turbulent transition are captured within the DNS computations. The growth of the secondary instability wave in the DNS solution compares well with linear secondary instability theory when the amplitude is small; the linear growth is followed by a region of reduced growth resulting from nonlinear effects before an explosive onset of laminar breakdown to turbulence. The peak fluctuations are concentrated near the boundary layer edge during the initial stage of transition, but rapidly propagates towards the surface during the process of laminar breakdown. Both time-averaged statistics and flow visualization based on the DNS reveal a sawtooth transition pattern that is analogous to previously documented surface flow visualizations of transition due to stationary crossflow instability. The memory of the stationary crossflow vortex is found to persist through the transition zone and well beyond the location of the maximum skin friction.

Duan, Lian↗
NASA NTRS1972

Coordination and establishment of centralized facilities and services for the University of Alaska ERTS survey of the Alaskan environment

The author has identified the following significant results. Specifications have been prepared for the engineering design and construction of a digital color display unit which will be used for automatic processing of ERTS data. The color display unit is a disk refresh memory with computer interfaced input and a color cathode ray tube output display. The system features both analog and digital post disk data manipulation and a versatile color coding device suitable for displaying not only images, but also computer generated graphics such as diagrams, maps, and overlays. Input is from IBM compatible 9 track, 800 BPI tapes, as generated by an IBM 360 computer. ERTS digital tapes are read into the 360, where various analyses such as maximum likelihood classification are performed and the results are written on a magnetic tape which is the input to the color display unit. The greatest versatility in the data manipulation area is provided by the minicomputer built into the color display unit, which is off-line from the main 360 computer. The minicomputer is able to read any line from the refresh disk and place it in its 4K-16 bit memory. Considerable flexibility is available for post-processing enhancement of images by the investigator.

Belon, A. E.↗
NASA NTRS1980

Measurement of Electromagnetic Properties of Lightning with 10 Nanosecond Resolution

Electromagnetic data recorded from lightning strikes are presented. The data analysis reveals general characteristics of fast electromagnetic fields measured at the ground including rise times, amplitudes, and time patterns. A look at the electromagnetic structure of lightning shows that the shortest rise times in the vicinity of 30 ns are associated with leader leader streamers. Lightning location is based on electromagnetic field characteristics and is compared to a nearby sky camera. The fields from both leaders and return strokes were measured and are discussed. The data were obtained during 1978 and 1979 from lightning strikes occuring within 5 kilometers of an underground metal instrumentation room located on South Baldy peak near Langmuir Laboratory, New Mexico. The computer controlled instrumentation consisted of sensors previously used for measuring the nuclear electromagnetic pulse (EMP) and analog-digital recorders with 10 ns sampling, 256 levels of resolution, and 2 kilobytes of internal memory.

Baum, C. E.↗