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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 109 records · Page 6

A multigigabit link layer protocol for single picosecond latency determinism using AMD ultrascale+ GTH and GTY transreceivers

recision timing distribution systems require determin istic and repeatable high speed serial data link latency. The EIC Timing Data Link will employ a specialized link layer protocol for deterministic multigigabit communication us ing AMD Ultrascale+ GTH and GTY transceivers. Link la tency must also be measurable to accurately compensate in real time for latency variations of the physical medium. The point-to-point link is full duplex and fully synchronous with a latency control algorithm to align the internal clocks of each system with picosecond resolution. Deterministic clock domain crossing between systems is ensured using static timing analysis of the elastic buffer control signals.

43 PARTICLE ACCELERATORS↗

OpenSAMPL: An Open Source Library for Timing and Synchronization Measurements and Analytics

Today's power grid operators are implementing timing and synchronization solutions that provide resilience to Global Navigation Satellite System (GNSS) vulnerabilities. These vendor-specific solutions often come with additional software applications that are designed to monitor that vendor's synchronization performance data. However, resilient timing architectures often resulting in multi-vendor solutions, including approaches that blend terrestrial clocks with space-based subscription services. In such an environment, collecting, analyzing, and visualizing data from a variety of sources within a single platform was heretofore not possible. To address this need, the US Department of Energy's Center for Alternative Synchronization and Timing (CAST) developed OpenSAMPL, the Open Synchronized Analytics and Monitoring Platform, an open-source Python framework for processing, loading, and observing clock measurement data from distributed devices. OpenSAMPL enables the ingestion of diverse clock-probe sources into a scalable time-series database and applies robust analytics. OpenSAMPL currently supports two vendor data pipelines, and will be extended to more in the near future, enabling seamless monitoring of a variety of timing and synchronization devices in a common environment.

Grant, Josh [ORNL] (ORCID:0000000163475060)↗

Synchronization System for Next Generation Light Sources

An alternative synchronization technique – one that would allow explicit control of the pulse train including its repetition rate and delay is clearly desired. We propose such a scheme. Our method is based on optical interferometry and permits synchronization of the pulse trains generated by two independent mode-locked lasers. As the next generation x-ray sources will be driven by a clock signal derived from a mode-locked optical source, our technique will provide a way to synchronize x-ray probe with the optical pump pulses.

43 PARTICLE ACCELERATORS↗

Picosecond Synchronization System for the Distribution of Photon Pairs Through a Fiber Link Between Fermilab and Argonne National Laboratories

Here we demonstrate a three-node quantum network for C-band photon pairs using 2 pairs of 59 km of deployed fiber between Fermi and Argonne National Laboratories. The C-band pairs are directed to nodes using a standard telecommunication switch and the detection system is synchronized to picosecond scale timing resolution using a coexisting O-or L-band optical clock distribution system. We measure a reduction of coincidence to-accidental ratio (CAR) of the C-band pairs from 51 ± 2 to 5.3 ± 0.4 due to Raman scattering of the O-band clock pulses. Despite this reduction, the CAR is nevertheless suitable for quantum networks.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Picosecond Synchronization System for Quantum Networks

The operation of long-distance quantum networks requires photons to be synchronized and must account for length variations of quantum channels. We demonstrate a 200 MHz clock-rate fiber optic-based telecommunication C-band quantum network using off-the-shelf components combined with custom-made electronics. The network is backed by a scalable and fully automated synchronization system with ps-scale timing resolution. Synchronization of the photons is achieved by distributing O-band-wavelength laser pulses between network nodes. Specifically, we distribute photon pairs between three nodes, and measure a reduction of coincidence-to-accidental ratio from 77 to only 42 when the synchronization system is enabled, which permits high-fidelity qubit transmission. Our demonstration sheds light on the role of noise in quantum communication and represents a key step in realizing deployed co-existing classical-quantum networks.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Billion-atom synchronous parallel kinetic Monte Carlo simulations of critical 3D Ising systems

An extension of the synchronous parallel kinetic Monte Carlo (spkMC) algorithm developed by Martinez et al. [J. Comp. Phys. 227 (2008) 3804] to discrete lattices is presented. The method solves the master equation synchronously by recourse to null events that keep all processors' time clocks current in a global sense. Boundary conflicts are resolved by adopting a chessboard decomposition into non-interacting sublattices. We find that the bias introduced by the spatial correlations attendant to the sublattice decomposition is within the standard deviation of serial calculations, which confirms the statistical validity of our algorithm. We have analyzed the parallel efficiency of spkMC and find that it scales consistently with problem size and sublattice partition. We apply the method to the calculation of scale-dependent critical exponents in billion-atom 3D Ising systems, with very good agreement with state-of-the-art multispin simulations.

97 MATHEMATICS AND COMPUTING↗

Empirical Evaluation of GPS Clock Accuracy for Isochronous Droop-Based Inverters: Preprint

Grid-forming inverters rely upon an internal reference to regulate the grid’s voltage and frequency. Without a reliable reference, issues such as loss of synchronism, frequency instability, and unequal power sharing can occur. One proposed internal phase reference for grid-forming inverters is generated by the controller’s clock, but this is affected by nonidealities in the crystal oscillator leading to time drift in the phase reference. To improve the controller’s clock accuracy, the Global Positioning System (GPS) can be used to calibrate the internal clock. Previously, GPS-based clock calibration was explored theoretically and various methods were developed for mitigating frequency/phase drift at the power system level. This paper experimentally validates the direct performance of GPS time-calibration at the controller level and justifies its use in maintaining an accurate phase reference for droop-based grid-forming inverters.

clock drift↗

Empirical Evaluation of GPS Clock Accuracy for Isochronous Droop-based Inverters

Grid-forming inverters rely upon an internal reference to regulate the grid 's voltage and frequency. Without a reliable reference, issues such as loss of synchronism, frequency instability, and unequal power sharing can occur. One proposed internal phase reference for grid-forming inverters is generated by the controller's clock, but this is affected by nonidealities in the crystal oscillator leading to time drift in the phase reference. To improve the controller's clock accuracy, the Global Positioning System (GPS) can be used to calibrate the internal clock. Previously, GPS-based clock calibration was explored theoretically and various methods were developed for mitigating frequency/phase drift at the power system level. This paper experimentally validates the direct performance of GPS time-calibration at the controller level and justifies its use in maintaining an accurate phase reference for droop-based grid-forming inverters.

clock drift↗

From primordial clocks to circadian oscillators

Circadian rhythms play an essential part in many biological processes, and only three prokaryotic proteins are required to constitute a true post-translational circadian oscillator1. The evolutionary history of the three Kai proteins indicates that KaiC is the oldest member and a central component of the clock. Subsequent additions of KaiB and KaiA regulate the phosphorylation state of KaiC for time synchronization. The canonical KaiABC system in cyanobacteria is well understood but little is known about more ancient systems that only possess KaiBC. However, there are reports that they might exhibit a basic, hourglass-like timekeeping mechanism. Here we investigate the primordial circadian clock in Rhodobacter sphaeroides , which contains only KaiBC, to elucidate its inner workings despite missing KaiA. Using a combination of X-ray crystallography and cryogenic electron microscopy, we find a new dodecameric fold for KaiC, in which two hexamers are held together by a coiled-coil bundle of 12 helices. This interaction is formed by the carboxy-terminal extension of KaiC and serves as an ancient regulatory moiety that is later superseded by KaiA. A coiled-coil register shift between daytime and night-time conformations is connected to phosphorylation sites through a long-range allosteric network that spans over 140 Å. Our kinetic data identify the difference in the ATP-to-ADP ratio between day and night as the environmental cue that drives the clock. They also unravel mechanistic details that shed light on the evolution of self-sustained oscillators.

59 BASIC BIOLOGICAL SCIENCES↗

Light quality modulates metabolic synchronization over the diel phases of crassulacean acid metabolism

Temporal compartmentation of carboxylation processes is a defining feature of crassulacean acid metabolism and involves circadian control of key metabolic and transport steps that regulate the supply and demand for carbon over a 24h cycle. Recent insights on the molecular workings of the circadian clock and its connection with environmental inputs raise new questions on the importance of light quality and, by analogy, certain photoreceptors for synchronizing the metabolic components of CAM. The present work tested the hypothesis that optimal coupling of stomatal conductance, net CO2 uptake, and the reciprocal turnover of carbohydrates and organic acids over the diel CAM cycle requires both blue and red light input signals. Contrasting monochromatic wavelengths of blue, green, and red light (i.e. 475, 530, 630nm) with low fluence rates (10 μmol m–2 s–1) were administered for 16 hours each diel cycle for a total treatment time of 48 hours to the obligate CAM bromeliad, Aechmea ‘Maya’. Of the light treatments imposed, low-fluence blue light was a key determinant in regulating stomatal responses, organic acid mobilization from the vacuole, and daytime decarboxylation. However, the reciprocal relationship between starch and organic acid turnover that is typical for CAM was uncoupled under low-fluence blue light. Under low-fluence red or green light, the diel turnover of storage carbohydrates was orchestrated in line with the requirements of CAM, but a consistent delay in acid consumption at dawn compared with plants under white or low-fluence blue light was noted. Consistent with the acknowledged influences of both red and blue light as input signals for the circadian clock, the data stress the importance of both red and blue-light signalling pathways for synchronizing the metabolic and physiological components of CAM over the day/night cycle.

54 ENVIRONMENTAL SCIENCES↗

A seamless acquisition digital storage oscilloscope with three-dimensional waveform display

In traditional digital storage oscilloscope (DSO), sampled data need to be processed after each acquisition. During data processing, the acquisition is stopped and oscilloscope is blind to the input signal. Thus, this duration is called dead time. With the rapid development of modern electronic systems, the effect of infrequent events becomes significant. To capture these occasional events in shorter time, dead time in traditional DSO that causes the loss of measured signal needs to be reduced or even eliminated. In this paper, a seamless acquisition oscilloscope without dead time is proposed. In this oscilloscope, three-dimensional waveform mapping (TWM) technique, which converts sampled data to displayed waveform, is proposed. With this technique, not only the process speed is improved, but also the probability information of waveform is displayed with different brightness. Thus, a three-dimensional waveform is shown to the user. To reduce processing time further, parallel TWM which processes several sampled points simultaneously, and dual-port random access memory based pipelining technique which can process one sampling point in one clock period are proposed. Furthermore, two DDR3 (Double-Data-Rate Three Synchronous Dynamic Random Access Memory) are used for storing sampled data alternately, thus the acquisition can continue during data processing. Therefore, the dead time of DSO is eliminated. In addition, a double-pulse test method is adopted to test the waveform capturing rate (WCR) of the oscilloscope and a combined pulse test method is employed to evaluate the oscilloscope's capture ability comprehensively. The experiment results show that the WCR of the designed oscilloscope is 6 250 000 wfms/s (waveforms per second), the highest value in all existing oscilloscopes. The testing results also prove that there is no dead time in our oscilloscope, thus realizing the seamless acquisition.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Distributed Order Recording Techniques for Efficient Record-and-Replay of Multi-threaded Programs

After all these years and all these other shared memory programming frameworks, OpenMP is still the most popular one. However, its greater levels of non-deterministic execution makes debugging and testing more challenging. The ability to record and deterministically replay the program execution is key to address this challenge. However, scalably replaying OpenMP programs is still an unresolved problem. In this paper, we propose two novel techniques that use Distributed Clock (DC) and Distributed Epoch (DE) recording schemes to eliminate excessive thread synchronization for OpenMP record and replay. Our evaluation on representative HPC applications with ReOMP, which we used to realize DC and DE recording, shows that our approach is 2-5x more efficient than traditional approaches that synchronize on every shared-memory access. Furthermore, we demonstrate that our approach can be easily combined with MPI-level replay tools to replay non-trivial MPI+OpenMP applications. We achieve this by integrating ReOMP into ReMPI, an existing scalable MPI record-and-replay tool, with only a small MPI-scale-independent runtime overhead.

Fu, Xiang↗

Optimum Full Information, Unlimited Complexity, Invariant and Minimax Clock Skew and Offset Estimators for IEEE 1588

This paper presents the problem of clock skew and offset estimation for the IEEE 1588 precision time protocol. Built on the classical two-way message exchange scheme, IEEE 1588 is a prominent synchronization protocol for packet switched networks. Because of the presence of random queuing delays in a packet switched network, the joint recovery of clock skew and offset from the received packet timestamps can be viewed as a statistical estimation problem. Recently, assuming perfect clock skew information, minimax optimum clock offset estimators were developed for IEEE 1588. Building on this work, we first develop joint optimum invariant clock skew and offset estimators for IEEE 1588 for known queuing delay statistics and unlimited computational complexity. We then show the developed estimators are minimax optimum, i.e., these estimators minimize the maximum skew normalized mean square estimation error over all possible values of the unknown parameters. Minimax optimum estimators that utilize information from past timestamps to improve accuracy are also introduced. The developed optimum estimators provide useful fundamental limits for evaluating the performance of clock skew and offset estimation schemes. These performance limits can aid system designers to develop algorithms with the desired computational complexity that achieve performance close to the performance of the optimum estimators. If a designer finds an approach with a complexity they find acceptable and which provides performance close to the optimum performance, they can use it and know they have near optimum performance. This is precisely the approach used in communications when comparing to capacity.

Cellular networks↗

Quantum-authenticated clock signal

The present disclosure is directed to a system and method of distributing time information to enable synchronization in an authenticated manner via a quantum channel. A source device may transmit a timing signal, T on a communication channel from the source device to a receiver device. The timing signal T may be include a time or times stored in memory or calculated using a previously agreed upon formula. The method may include transmitting a quantum system Q from the source device to the receiver device. The quantum system may be prepared in a randomly chosen state and may be measured by the receiver device in a randomly chosen measurement basis.

47 OTHER INSTRUMENTATION↗

Synchronization system and method for wireless communicating nodes

A system includes first and second wireless nodes having a clock with plural times, a wireless transceiver, and a processor cooperating with the transceiver to transmit and receive packets. The second node transceivers wirelessly communicate with the first or other second node transceivers. The second nodes include a Kalman filter with an output, plural filter gains, and an input representing the difference between: about the time of the clock when a received packet should have ideally been received, and a time when the received packet was actually received as measured by the clock. A circuit provides dynamic adjustment of the filter gains. The Kalman filter output estimates the difference between the time of the receiving node clock and a corresponding one of the times of the transmitting node clock. The second processor cooperates with the Kalman filter output to adjust the times of the receiving node clock.

Armstrong, Brian S. R.↗

Sampling synchronization through GPS signals

A method uses a distributed data acquisition system with multiple, physically unconnected, data acquisition units, that can be in wireless communication with a remote host, to timestamp measurement data with sub-microsecond time base accuracy of sampling clock relative to an absolute timeframe. A current absolute time is derived from messages received from a satellite radio beacon positioning system (GPS). Measurement data is sampled by each unit at a specified sampling rate. Using hardware logic, batches of sampled data are associated with corresponding timestamps representing the absolute time at which the data was sampled. Data and timestamps may be transmitted to the host. A time offset bias is compensated by comparing timestamps against a nominal time based on start time and nominal sampling rate. The sampling clock rate may be disciplined using time pulses from the GPS receiver. An initial start of data sampling by all units can also be synchronized.

Zhuge, James Q.↗

Three-phase Four-leg Inverter LabVIEW FPGA Control Code [SWR-16-26]

In the area of power electronics control, Field Programmable Gate Arrays (FPGAs) have the capability to outperform their Digital Signal Processor (DSP) counterparts due to the FPGA’s ability to implement true parallel processing and therefore facilitate higher switching frequencies, higher control bandwidth, and/or enhanced functionality. National Instruments (NI) has developed two platforms, Compact RIO (cRIO) and Single Board RIO (sbRIO), which combine a real-time processor with an FPGA. The FPGA can be programmed with a subset of the well-known LabVIEW graphical programming language. The use of cRIO and sbRIO for power electronics control has developed over the last few years to include control of three-phase inverters. Most three-phase inverter topologies include three switching legs. The addition of a fourth-leg to natively generate the neutral connection allows the inverter to serve single-phase loads in a microgrid or stand-alone power system and to balance the three-phase voltages in the presence of significant load imbalance. However, the control of a four-leg inverter is much more complex. In particular, instead of standard two-dimensional space vector modulation (SVM), the inverter requires three-dimensional space vector modulation (3D-SVM). The candidate software implements complete control algorithms in LabVIEW FPGA for a three-phase four-leg inverter. The software includes feedback control loops, three-dimensional space vector modulation gate-drive algorithms, advanced alarm handling capabilities, contactor control, power measurements, and debugging and tuning tools. The feedback control loops allow inverter operation in AC voltage control, AC current control, or DC bus voltage control modes based on external mode selection by a user or supervisory controller. The software includes the ability to synchronize its AC output to the grid or other voltage-source before connection. The software also includes provisions to allow inverter operation in parallel with other voltage regulating devices on the AC or DC buses. This flexibility allows the Inverter to operate as a stand-alone voltage source, connected to the grid, or in parallel with other controllable voltage sources as part of a microgrid or remote power system. In addition, as the inverter is expected to operate under severe unbalanced conditions, the software includes algorithms to accurately compute real and reactive power for each phase based on definitions provided in the IEEE Standard 1459: IEEE Standard Definitions for the Measurement of Electric Power Quantities Under Sinusoidal, Nonsinusoidal, Balanced, or Unbalanced Conditions. Finally, the software includes code to output analog signals for debugging and for tuning of control loops. The software fits on the Xilinx Virtex V LX110 FPGA embedded in the NI cRIO-9118 FPGA chassis, and with a 40 MHz base clock, supports a modulation update rate of 40 MHz, user-settable switching frequencies and synchronized control loop update rates of tens of kHz, and reference waveform generation, including Phase Lock Loop (PLL), update rate of 100 kHz.

Martin, Gregory↗

OpenSAMPL

OpenSAMPL (Open Synchronization Analytics and Monitoring PLatform) is a Python framework for processing, loading, and managing clock probe time series data and metadata from different vendors.

Grant, Josh [Oak Ridge National Laboratory (ORNL),↗