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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 109 records · Page 6
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NASA NTRS2006

NASA Tech Briefs, March 2006

Topics covered include: Medical Signal-Conditioning and Data-Interface System; Instruments for Reading Direct-Marked Data-Matrix Symbols; Processing EOS MLS Level-2 Data; Ground Processing of Data From the Mars Exploration Rovers; Estimating Total Electron Content Using 1,000+ GPS Receivers; NASA Solar Array Demonstrates Commercial Potential; Improved Control of Charging Voltage for Li-Ion Battery; Programmable Pulse-Position-Modulation Encoder; Wavelength-Agile External-Cavity Diode Laser for DWDM; Pattern-Recognition Processor Using Holographic Photopolymer; Submicrosecond Power-Switching Test Circuit; Three-Function Logic Gate Controlled by Analog Voltage; Integrated System for Autonomous Science; Montage Version 3.0; Utilizing AI in Temporal, Spatial, and Resource Scheduling; Satellite Image Mosaic Engine; Architecture for Control of the K9 Rover; HFGMC Enhancement of MAC/GMC; Automated Activation and Deactivation of a System Under Test; Cleaning Carbon Nanotubes by Use of Mild Oxygen Plasmas; Generating Aromatics From CO2 on Mars or Natural Gas on Earth; Attaching Thermocouples by Peening or Crimping; Heat Treatment of Friction-Stir-Welded 7050 Aluminum Plates; Generating Breathable Air Through Dissociation of N2O; High-Performance Scanning Acousto-Ultrasonic System; Correction for Thermal EMFs in Thermocouple Feedthroughs; Using Quasiparticle Poisoning To Detect Photons; Estimating Resolution Lengths of Hybrid Turbulence Models; Education and Training Module in Alertness Management; Cargo-Positioning System for Next-Generation Spacecraft; Micro-Imagers for Spaceborne Cell-Growth Experiments; Holographic Solar Photon Thrusters; Plasma-Based Detector of Outer-Space Dust Particles; and Generation of Data-Rate Profiles of Ka-Band Deep-Space Links.

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NASA NTRS1992

A radiation-hard, low-background multiplexer design for spacecraft imager applications

A possible multiplexer design for the focal plane for the Cassini Visible and Infrared Mapping Spectrometer (VIMS) is reviewed. The instrument's requirements for the multiplexed array are summarized. The VIMS instrument has a modest radiation-hardness requirement due to the trajectory and planetary environments in which the instrument will be required to operate. The total ionizing dose hardness requirement is a few tens of kilorads. A thin-gate oxide of a few hundred angstroms thickness is to be used. Field hardness is to be achieved by guard bands or hardened dielectric isolation. The design is argued to meet the low-noise and radiation-hardness required for imaging at Saturn. The design is versatile enough to provide double-correlated and double-uncorrelated sampling, which is accomplished in the signal processing electronics outside the focal plane.

Staller, Craig↗
NASA NTRS1989

The MSFC large-area imaging multistep proportional counter

A large-area multistep imaging proportional counter that is being currently developed at the Marshall Space Flight Center is described. The device, known as a multistep fluorescence gated detector, consists of a multiwire proportional counter (MWPC) with a preamplification region. The MWCP features superior spatial resolution with a very high degree of background rejection. It is ideally suited for use in X-ray astronomy in 20-100 keV energy range. The paper includes the MWPC schematic and a list of instrument specifications.

Ramsey, B. D.↗
NASA NTRS1977

Time delay and integration array (TDI) using charge transfer device technology. Phase 2, volume 1: Technical

The 20x9 TDI array was developed to meet the LANDSAT Thematic Mapper Requirements. This array is based upon a self-aligned, transparent gate, buried channel process. The process features: (1) buried channel, four phase, overlapping gate CCD's for high transfer efficiency without fat zero; (2) self-aligned transistors to minimize clock feedthrough and parasitic capacitance; and (3) transparent tin oxide electrode for high quantum efficiency with front surface irradiation. The requirements placed on the array and the performance achieved are summarized. This data is the result of flat field measurements only, no imaging or dynamic target measurements were made during this program. Measurements were performed with two different test stands. The bench test equipment fabricated for this program operated at the 8 micro sec line time and employed simple sampling of the gated MOSFET output video signal. The second stand employed Correlated Doubled Sampling (CDS) and operated at 79.2 micro sec line time.

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NASA NTRS1975

Effect of damping on excitability of high-order normal modes

The effect of localized structural damping on the excitability of higher-order large space telescope spacecraft modes is investigated. A preprocessor computer program is developed to incorporate Voigt structural joint damping models in a finite-element dynamic model. A postprocessor computer program is developed to select critical modes for low-frequency attitude control problems and for higher-frequency fine-stabilization problems. The selection is accomplished by ranking the flexible modes based on coefficients for rate gyro, position gyro, and optical sensor, and on image-plane motions due to sinusoidal or random PSD force and torque inputs.

Merchant, D. H.↗
NASA NTRS2009

Hardware Implementation of a Bilateral Subtraction Filter

A bilateral subtraction filter has been implemented as a hardware module in the form of a field-programmable gate array (FPGA). In general, a bilateral subtraction filter is a key subsystem of a high-quality stereoscopic machine vision system that utilizes images that are large and/or dense. Bilateral subtraction filters have been implemented in software on general-purpose computers, but the processing speeds attainable in this way even on computers containing the fastest processors are insufficient for real-time applications. The present FPGA bilateral subtraction filter is intended to accelerate processing to real-time speed and to be a prototype of a link in a stereoscopic-machine- vision processing chain, now under development, that would process large and/or dense images in real time and would be implemented in an FPGA. In terms that are necessarily oversimplified for the sake of brevity, a bilateral subtraction filter is a smoothing, edge-preserving filter for suppressing low-frequency noise. The filter operation amounts to replacing the value for each pixel with a weighted average of the values of that pixel and the neighboring pixels in a predefined neighborhood or window (e.g., a 9 9 window). The filter weights depend partly on pixel values and partly on the window size. The present FPGA implementation of a bilateral subtraction filter utilizes a 9 9 window. This implementation was designed to take advantage of the ability to do many of the component computations in parallel pipelines to enable processing of image data at the rate at which they are generated. The filter can be considered to be divided into the following parts (see figure): a) An image pixel pipeline with a 9 9- pixel window generator, b) An array of processing elements; c) An adder tree; d) A smoothing-and-delaying unit; and e) A subtraction unit. After each 9 9 window is created, the affected pixel data are fed to the processing elements. Each processing element is fed the pixel value for its position in the window as well as the pixel value for the central pixel of the window. The absolute difference between these two pixel values is calculated and used as an address in a lookup table. Each processing element has a lookup table, unique for its position in the window, containing the weight coefficients for the Gaussian function for that position. The pixel value is multiplied by the weight, and the outputs of the processing element are the weight and pixel-value weight product. The products and weights are fed to the adder tree. The sum of the products and the sum of the weights are fed to the divider, which computes the sum of products the sum of weights. The output of the divider is denoted the bilateral smoothed image. The smoothing function is a simple weighted average computed over a 3 3 subwindow centered in the 9 9 window. After smoothing, the image is delayed by an additional amount of time needed to match the processing time for computing the bilateral smoothed image. The bilateral smoothed image is then subtracted from the 3 3 smoothed image to produce the final output. The prototype filter as implemented in a commercially available FPGA processes one pixel per clock cycle. Operation at a clock speed of 66 MHz has been demonstrated, and results of a static timing analysis have been interpreted as suggesting that the clock speed could be increased to as much as 100 MHz.

Huertas, Andres↗
NASA NTRS2000

Analysis and Enhancement of Low-Light-Level Performance of Photodiode-Type CMOS Active Pixel Images Operated with Sub-Threshold Reset

Noise in photodiode-type CMOS active pixel sensors (APS) is primarily due to the reset (kTC) noise at the sense node, since it is difficult to implement in-pixel correlated double sampling for a 2-D array. Signal integrated on the photodiode sense node (SENSE) is calculated by measuring difference between the voltage on the column bus (COL) - before and after the reset (RST) is pulsed. Lower than kTC noise can be achieved with photodiode-type pixels by employing "softreset" technique. Soft-reset refers to resetting with both drain and gate of the n-channel reset transistor kept at the same potential, causing the sense node to be reset using sub-threshold MOSFET current. However, lowering of noise is achieved only at the expense higher image lag and low-light-level non-linearity. In this paper, we present an analysis to explain the noise behavior, show evidence of degraded performance under low-light levels, and describe new pixels that eliminate non-linearity and lag without compromising noise.

Pain, Bedabrata↗
NASA NTRS2010

NASA Accelerates SpaceCube Technology into Orbit

On May 11, 2009, STS-125 Space Shuttle Atlantis blasted off from Kennedy Space Center on a historic mission to service the Hubble Space Telescope (HST). In addition to sending up the hardware and tools required to repair the observatory, the servicing team at NASA's Goddard Space Flight Center also sent along a complex experimental payload called Relative Navigation Sensors (RNS). The main objective of the RNS payload was to provide real-time image tracking of HST during rendezvous and docking operations. RNS was a complete success, and was brought to life by four Xilinx FPGAs (Field Programmable Gate Arrays) tightly packed into one integrated computer called SpaceCube. SpaceCube is a compact, reconfigurable, multiprocessor computing platform for space applications demanding extreme processing capabilities based on Xilinx Virtex 4 FX60 FPGAs. In a matter of months, the concept quickly went from the white board to a fully funded flight project. The 4-inch by 4-inch SpaceCube processor card was prototyped by a group of Goddard engineers using internal research funding. Once engineers were able to demonstrate the processing power of SpaceCube to NASA, HST management stood behind the product and invested in a flight qualified version, inserting it into the heart of the RNS system. With the determination of putting Xilinx into space, the team strengthened to a small army and delivered a fully functional, space qualified system to the mission.

Petrick, David↗
NASA NTRS1972

A radar image of Venus.

Radar scans of Venus have yielded a brightness map of a large portion of the surface. The bright area in the south (alpha) and the twin such areas in the north (beta and delta) were first discovered by spectral analysis of radar echos. When range-gating is also applied, their shapes are revealed, and they are seen to be roundish and about 1000 km across. Although radar brightness can be the result of either intrinsic reflectivity or surface roughness, polarization studies show these features to be rough (to the scale of the wavelength, 12.5 cm). Dark, circular areas can also be seen, many with bright central spots. The dark areas are probably smooth. The blurring of the equatorial strip is an artifact of the range-Doppler geometry; all resolution disappears at the equator. Another artifact of the method is the 'ghost', in the south, of the images of beta and delta. Such ghosts appear only at the eastern and western extremes of the map.

Goldstein, R. M.↗
NASA NTRS2011

SAD5 Stereo Correlation Line-Striping in an FPGA

High precision SAD5 stereo computations can be performed in an FPGA (field-programmable gate array) at much higher speeds than possible in a conventional CPU (central processing unit), but this uses large amounts of FPGA resources that scale with image size. Of the two key resources in an FPGA, Slices and BRAM (block RAM), Slices scale linearly in the new algorithm with image size, and BRAM scales quadratically with image size. An approach was developed to trade latency for BRAM by sub-windowing the image vertically into overlapping strips and stitching the outputs together to create a single continuous disparity output. In stereo, the general rule of thumb is that the disparity search range must be 1/10 the image size. In the new algorithm, BRAM usage scales linearly with disparity search range and scales again linearly with line width. So a doubling of image size, say from 640 to 1,280, would in the previous design be an effective 4 of BRAM usage: 2 for line width, 2 again for disparity search range. The minimum strip size is twice the search range, and will produce an output strip width equal to the disparity search range. So assuming a disparity search range of 1/10 image width, 10 sequential runs of the minimum strip size would produce a full output image. This approach allowed the innovators to fit 1280 960 wide SAD5 stereo disparity in less than 80 BRAM, 52k Slices on a Virtex 5LX330T, 25% and 24% of resources, respectively. Using a 100-MHz clock, this build would perform stereo at 39 Hz. Of particular interest to JPL is that there is a flight qualified version of the Virtex 5: this could produce stereo results even for very large image sizes at 3 orders of magnitude faster than could be computed on the PowerPC 750 flight computer. The work covered in the report allows the stereo algorithm to run on much larger images than before, and using much less BRAM. This opens up choices for a smaller flight FPGA (which saves power and space), or for other algorithms in addition to SAD5 to be run on the same FPGA.

Villalpando, Carlos Y.↗
NASA NTRS1975

The effects of localized damping on structural response

The effect of localized structural damping on the excitability of higher order normal modes of the large space telescope was investigated. A preprocessor computer program was developed to incorporate Voigt structural joint damping models in a NASTRAN finite-element dynamic model. A postprocessor computer program was developed to select critical modes for low-frequency attitude control problems and for higher frequency fine-stabilization problems. The mode selection is accomplished by ranking the flexible modes based on coefficients for rate gyro, position gyro, and optical sensors, and on image-plane motions due to sinusoidal or random power spectral density force and torque inputs.

Merchant, D. H.↗
NASA NTRS2010

Reconfigurable Hardware for Compressing Hyperspectral Image Data

High-speed, low-power, reconfigurable electronic hardware has been developed to implement ICER-3D, an algorithm for compressing hyperspectral-image data. The algorithm and parts thereof have been the topics of several NASA Tech Briefs articles, including Context Modeler for Wavelet Compression of Hyperspectral Images (NPO-43239) and ICER-3D Hyperspectral Image Compression Software (NPO-43238), which appear elsewhere in this issue of NASA Tech Briefs. As described in more detail in those articles, the algorithm includes three main subalgorithms: one for computing wavelet transforms, one for context modeling, and one for entropy encoding. For the purpose of designing the hardware, these subalgorithms are treated as modules to be implemented efficiently in field-programmable gate arrays (FPGAs). The design takes advantage of industry- standard, commercially available FPGAs. The implementation targets the Xilinx Virtex II pro architecture, which has embedded PowerPC processor cores with flexible on-chip bus architecture. It incorporates an efficient parallel and pipelined architecture to compress the three-dimensional image data. The design provides for internal buffering to minimize intensive input/output operations while making efficient use of offchip memory. The design is scalable in that the subalgorithms are implemented as independent hardware modules that can be combined in parallel to increase throughput. The on-chip processor manages the overall operation of the compression system, including execution of the top-level control functions as well as scheduling, initiating, and monitoring processes. The design prototype has been demonstrated to be capable of compressing hyperspectral data at a rate of 4.5 megasamples per second at a conservative clock frequency of 50 MHz, with a potential for substantially greater throughput at a higher clock frequency. The power consumption of the prototype is less than 6.5 W. The reconfigurability (by means of reprogramming) of the FPGAs makes it possible to effectively alter the design to some extent to satisfy different requirements without adding hardware. The implementation could be easily propagated to future FPGA generations and/or to custom application-specific integrated circuits.

Aranki, Nazeeh↗
NASA NTRS1995

Development and applications of laser-induced incandescence

Several NASA-funded investigations focus on soot processes and radiative influences of soot in diffusion flames given their simplicity, practical significance, and potential for theoretical modeling. Among the physical parameters characterizing soot, soot volume fraction, f(sub v), a function of particle size and number density, is often of chief practical interest in these investigations, as this is the geometrical property that directly impacts radiative characteristics and the temperature field of the flame and is basic to understanding soot growth and oxidation processes. Diffusion flames, however, present a number of challenges to the determination of f(sub v) via traditional extinction measurements. Laser-induced incandescence (LII) possesses several advantages compared to line-of-sight extinction techniques for determination of f(sub v). Since LII is not a line-of-sight technique, similar to fluorescence, it possesses geometric versatility allowing spatially resolved measurements of f(sub v) in real time in nonaxisymmetric systems without using deconvolution techniques. The spatial resolution of LII is determined by the detector and imaging magnification used. Neither absorption by polycyclic aromatic hydrocarbons (PAH's) nor scattering contributes to the signal. Temporal capabilities are limited only by the laser pulse and camera gate duration, with measurements having been demonstrated with 10 ns resolution. Because of these advantages, LII should be applicable to a variety of combustion processes involving both homogeneous and heterogeneous phases. Our work has focussed on characterization of the technique as well as exploration of its capabilities and is briefly described.

Vanderwal, Randy L.↗
NASA NTRS2016

An Efficient, FPGA-Based, Cluster Detection Algorithm Implementation for a Strip Detector Readout System in a Time Projection Chamber Polarimeter

A fundamental challenge in a spaceborne application of a gas-based Time Projection Chamber (TPC) for observation of X-ray polarization is handling the large amount of data collected. The TPC polarimeter described uses the APV-25 Application Specific Integrated Circuit (ASIC) to readout a strip detector. Two dimensional photoelectron track images are created with a time projection technique and used to determine the polarization of the incident X-rays. The detector produces a 128x30 pixel image per photon interaction with each pixel registering 12 bits of collected charge. This creates challenging requirements for data storage and downlink bandwidth with only a modest incidence of photons and can have a significant impact on the overall mission cost. An approach is described for locating and isolating the photoelectron track within the detector image, yielding a much smaller data product, typically between 8x8 pixels and 20x20 pixels. This approach is implemented using a Microsemi RT-ProASIC3-3000 Field-Programmable Gate Array (FPGA), clocked at 20 MHz and utilizing 10.7k logic gates (14% of FPGA), 20 Block RAMs (17% of FPGA), and no external RAM. Results will be presented, demonstrating successful photoelectron track cluster detection with minimal impact to detector dead-time.

Polarimeter↗
NASA NTRS1995

Developing Low-Noise GaAs JFETs For Cryogenic Operation

Report discusses aspects of effort to develop low-noise, low-gate-leakage gallium arsenide-based junction field-effect transistors (JFETs) for operation at temperature of about 4 K as readout amplifiers and multiplexing devices for infrared-imaging devices. Transistors needed to replace silicon transistors, relatively noisy at 4 K. Report briefly discusses basic physical principles of JFETs and describes continuing process of optimization of designs of GaAs JFETs for cryogenic operation.

Cunningham, Thomas J.↗
NASA NTRS2003

NASA Tech Briefs, March 2003

Topics covered include: Tool for Bending a Metal Tube Precisely in a Confined Space; Multiple-Use Mechanisms for Attachment to Seat Tracks; Force-Measuring Clamps; Cellular Pressure-Actuated Joint; Block QCA Fault-Tolerant Logic Gates; Hybrid VLSI/QCA Architecture for Computing FFTs; Arrays of Carbon Nanotubes as RF Filters in Waveguides; Carbon Nanotubes as Resonators for RF Spectrum Analyzers; Software for Viewing Landsat Mosaic Images; Updated Integrated Mission Program; Software for Sharing and Management of Information; Update on Integrated Optical Design Analyzer; Optical-Quality Thin Polymer Membranes; Rollable Thin Shell Composite-Material Paraboloidal Mirrors; Folded Resonant Horns for Power Ultrasonic Applications; Touchdown Ball-Bearing System for Magnetic Bearings; Flux-Based Deadbeat Control of Induction-Motor Torque; Block Copolymers as Templates for Arrays of Carbon Nanotubes; Throttling Cryogen Boiloff To Control Cryostat Temperature; Collaborative Software Development Approach Used to Deliver the New Shuttle Telemetry Ground Station; Turbulence in Supercritical O2/H2 and C7H16/N2 Mixing Layers; and Time-Resolved Measurements in Optoelectronic Microbioanal.

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NASA NTRS2003

NASA Tech Briefs, April 2003

Topics include: Tool for Bending a Metal Tube Precisely in a Confined Space; Multiple-Use Mechanisms for Attachment to Seat Tracks; Force-Measuring Clamps; Cellular Pressure-Actuated Joint; Block QCA Fault-Tolerant Logic Gates; Hybrid VLSI/QCA Architecture for Computing FFTs; Arrays of Carbon Nanotubes as RF Filters in Waveguides; Carbon Nanotubes as Resonators for RF Spectrum Analyzers; Software for Viewing Landsat Mosaic Images; Updated Integrated Mission Program; Software for Sharing and Management of Information; Optical-Quality Thin Polymer Membranes; Rollable Thin Shell Composite-Material Paraboloidal Mirrors; Folded Resonant Horns for Power Ultrasonic Applications; Touchdown Ball-Bearing System for Magnetic Bearings; Flux-Based Deadbeat Control of Induction-Motor Torque; Block Copolymers as Templates for Arrays of Carbon Nanotubes; Throttling Cryogen Boiloff To Control Cryostat Temperature; Collaborative Software Development Approach Used to Deliver the New Shuttle Telemetry Ground Station; Turbulence in Supercritical O2/H2 and C7H16/N2 Mixing Layers; and Time-Resolved Measurements in Optoelectronic Microbioanal.

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NASA NTRS1990

An imaging system for PLIF/Mie measurements for a combusting flow

The equipment required to establish an imaging system can be divided into four parts: (1) the light source and beam shaping optics; (2) camera and recording; (3) image acquisition and processing; and (4) computer and output systems. A pulsed, Nd:YAG-pummped, frequency-doubled dye laser which can freeze motion in the flowfield is used for an illumination source. A set of lenses is used to form the laser beam into a sheet. The induced fluorescence is collected by an UV-enhanced lens and passes through an UV-enhanced microchannel plate intensifier which is optically coupled to a gated solid state CCD camera. The output of the camera is simultaneously displayed on a monitor and recorded on either a laser videodisc set of a Super VHS VCR. This videodisc set is controlled by a minicomputer via a connection to the RS-232C interface terminals. The imaging system is connected to the host computer by a bus repeater and can be multiplexed between four video input sources. Sample images from a planar shear layer experiment are presented to show the processing capability of the imaging system with the host computer.

Wey, C. C.↗