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Results for “hardware-in-the-loop”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 109 records · Page 6
All sourcesNASA NTRSDOE OSTI
NASA NTRS1992

Rapid development of the X-31 simulation to support flight-testing

The X-31 Enhanced Fighter Maneuverability Program has been recognized to form the International Test Organization, with the NASA Dryden Flight Research Facility (NASA-Dryden) as the responsible test organization. The two X-31 research aircraft and engineering support personnel were colocated at NASA-Dryden, with flight test operations beginning in Apr. 1992. Therefore, rapid development of a hardware-in-the-loop simulation was needed to support the flight test operations at NASA-Dryden, and to perform verification and validation of flight control software. The X-31 simulation system requirements, distributed simulation system architecture, simulation components math models to the visual system, and the advanced capabilities the X-31 simulation provides. In addition, unique software tools and the methods used to rapidly develop this simulation system will be highlighted.

Mackall, Dale↗
NASA NTRS1992

Learning and optimization with cascaded VLSI neural network building-block chips

To demonstrate the versatility of the building-block approach, two neural network applications were implemented on cascaded analog VLSI chips. Weights were implemented using 7-b multiplying digital-to-analog converter (MDAC) synapse circuits, with 31 x 32 and 32 x 32 synapses per chip. A novel learning algorithm compatible with analog VLSI was applied to the two-input parity problem. The algorithm combines dynamically evolving architecture with limited gradient-descent backpropagation for efficient and versatile supervised learning. To implement the learning algorithm in hardware, synapse circuits were paralleled for additional quantization levels. The hardware-in-the-loop learning system allocated 2-5 hidden neurons for parity problems. Also, a 7 x 7 assignment problem was mapped onto a cascaded 64-neuron fully connected feedback network. In 100 randomly selected problems, the network found optimal or good solutions in most cases, with settling times in the range of 7-100 microseconds.

Duong, T.↗
NASA NTRS1993

The Spacelab IPS Star Simulator

The cost of doing business in space is very high. If errors occur while in orbit the costs grow and desired scientific data may be corrupted or even lost. The Spacelab Instrument Pointing System (IPS) Star Simulator is a unique test bed that allows star trackers to interface with simulated stars in a laboratory before going into orbit. This hardware-in-the-loop testing of equipment on earth increases the probability of success while in space. The IPS Star Simulator provides three fields of view 2.55 x 2.55 deg each for input into star trackers. The fields of view are produced on three separate monitors. Each monitor has 4096 x 4096 addressable points and can display 50 stars (pixels) maximum at a given time. The pixel refresh rate is 1000 Hz. The spectral output is approximately 550 nm. The available relative visual magnitude range is two to eight visual magnitudes. The star size is less than 100 arcsec. The minimum star movement is less than 5 arcsec and the relative position accuracy is approximately 40 arcsec. The purpose of this paper is to describe the IPS Star Simulator design and to provide an operational scenario so others may gain from the approach and possible use of the system.

Wessling, Francis C., III↗
NASA NTRS1993

Space Shuttle Main Engine real time stability analysis

The Space Shuttle Main Engine (SSME) is a reusable, high performance, liquid rocket engine with variable thrust. The engine control system continuously monitors the engine parameters and issues propellant valve control signals in accordance with the thrust and mixture ratio commands. A real time engine simulation lab was installed at MSFC to verify flight software and to perform engine dynamic analysis. A real time engine model was developed on the AD100 computer system. This model provides sufficient fidelity on the dynamics of major engine components and yet simplified enough to be executed in real time. The hardware-in-the-loop type simulation and analysis becomes necessary as NASA is continuously improving the SSME technology, some with significant changes in the dynamics of the engine. The many issues of interfaces between new components and the engine can be better understood and be resolved prior to the firing of the engine. In this paper, the SSME real time simulation Lab at the MSFC, the SSME real time model, SSME engine and control system stability analysis, both in real time and non-real time is presented.

Kuo, F. Y.↗
NASA NTRS1993

Flight research simulation takes off

The simulation configurations used in research flight test, including nonreal-time, real-time all-software, hardware-in-the-loop, iron bird, and aircraft-in-the-loop, are reviewed. It is concluded that progress in simulation technology will demonstrate new concepts, evaluate designs, enhance the quality of flight test, and minimize flight risks.

Schilling, Lawrence J.↗
NASA NTRS1993

Real-time dynamic simulation of the Cassini spacecraft using DARTS. Part 2: Parallel/vectorized real-time implementation

Part 1 of this paper presented the requirements for the real-time simulation of Cassini spacecraft along with some discussion of the DARTS algorithm. Here, in Part 2 we discuss the development and implementation of parallel/vectorized DARTS algorithm and architecture for real-time simulation. Development of the fast algorithms and architecture for real-time hardware-in-the-loop simulation of spacecraft dynamics is motivated by the fact that it represents a hard real-time problem, in the sense that the correctness of the simulation depends on both the numerical accuracy and the exact timing of the computation. For a given model fidelity, the computation should be computed within a predefined time period. Further reduction in computation time allows increasing the fidelity of the model (i.e., inclusion of more flexible modes) and the integration routine.

Fijany, A.↗
NASA NTRS1995

Propulsion Controlled Aircraft design and development

This paper describes the design, development, and ground testing of the propulsion controlled aircraft (PCA) flight control system. A backup flight control system which uses only engine thrust, the PCA system utilizes collective and differential thrust changes to steer an aircraft that experiences partial or complete failure of the hydraulically actuated control surfaces. The objective of the program was to investigate, in flight, the throttles-only control capability of the F-15, using manual control, and also an augmented PCA mode in which computer-controlled thrust was used for flight control. The objective included PCA operation in up-and-away flight and, if performance was adequate, a secondary objective to make actual PCA landings. The PCA design began with a feasibility study which evaluated many control law designs. The study was done using off-line control analysis, simulation, and on-line manned flight simulator tests. Control laws, cockpit displays, and cockpit controls were evaluated by NASA test pilots. A flight test baseline configuration was selected based on projected flight performance, applicability to transport and fighter aircraft, and funding costs. During the PCA software and hardware development, the initial design was updated as data became available from throttle-only flight experiments conducted by NASA on the F-15. This information showed basic airframe characteristics that were not observed in the F-15 flight simulator and resulted in several design changes. After the primary objectives of the PCA flight testing were accomplished, additional PCA modes of operation were developed and implemented. The evolution of the PCA system from the initial feasibility study, control law design, simulation, hardware-in-the-loop tests, pilot-in-the-loop tests, and ground tests is presented.

Wells, Edward A.↗
NASA NTRS1995

Library reuse in a rapid development environment

The Aeroscience and Flight Mechanics Division (AFMD) established a Rapid Development Laboratory (RDL) to investigate and improve new 'rapid development' software production processes and refine the use of commercial, off-the-shelf (COTS) tools. These tools and processes take an avionics design project from initial inception through high fidelity, real-time, hardware-in-the-loop (HIL) testing. One central theme of a rapid development process is the use and integration of a variety of COTS tools: This paper discusses the RDL MATRIX(sub x)(R) libraries, as well as the techniques for managing and documenting these libraries. This paper also shows the methods used for building simulations with the Advanced Simulation Development System (ASDS) libraries, and provides metrics to illustrate the amount of reuse for five complete simulations. Combining ASDS libraries with MATRIX(sub x)(R) libraries is discussed.

Uhde, JO↗
NASA NTRS1995

Performance validation of the ANSER control laws for the F-18 HARV

The ANSER control laws were implemented in Ada by NASA Dryden for flight test on the High Alpha Research Vehicle (HARV). The Ada implementation was tested in the hardware-in-the-loop (HIL) simulation, and results were compared to those obtained with the NASA Langley batch Fortran implementation of the control laws which are considered the 'truth model.' This report documents the performance validation test results between these implementations. This report contains the ANSER performance validation test plan, HIL versus batch time-history comparisons, simulation scripts used to generate checkcases, and detailed analysis of discrepancies discovered during testing.

Messina, Michael D.↗
NASA NTRS1995

Performance validation of the ANSER Control Laws for the F-18 HARV

The ANSER control laws were implemented in Ada by NASA Dryden for flight test on the High Alpha Research Vehicle (HARV). The Ada implementation was tested in the hardware-in-the-loop (HIL) simulation, and results were compared to those obtained with the NASA Langley batch Fortran implementation of the control laws which are considered the 'truth model'. This report documents the performance validation test results between these implementations. This report contains the ANSER performance validation test plan, HIL versus batch time-history comparisons, simulation scripts used to generate checkcases, and detailed analysis of discrepancies discovered during testing.

Messina, Michael D.↗
NASA NTRS1995

Flight simulation software at NASA Dryden Flight Research Center

The NASA Dryden Flight Research Center has developed a versatile simulation software package that is applicable to a broad range of fixed-wing aircraft. This package has evolved in support of a variety of flight research programs. The structure is designed to be flexible enough for use in batch-mode, real-time pilot-in-the-loop, and flight hardware-in-the-loop simulation. Current simulations operate on UNIX-based platforms and are coded with a FORTRAN shell and C support routines. This paper discusses the features of the simulation software design and some basic model development techniques. The key capabilities that have been included in the simulation are described. The NASA Dryden simulation software is in use at other NASA centers, within industry, and at several universities. The straightforward but flexible design of this well-validated package makes it especially useful in an engineering environment.

Norlin, Ken A.↗
NASA NTRS1995

Cascaded VLSI neural network architecture for on-line learning

High-speed, analog, fully-parallel and asynchronous building blocks are cascaded for larger sizes and enhanced resolution. A hardware-compatible algorithm permits hardware-in-the-loop learning despite limited weight resolution. A comparison-intensive feature classification application has been demonstrated with this flexible hardware and new algorithm at high speed. This result indicates that these building block chips can be embedded as application-specific-coprocessors for solving real-world problems at extremely high data rates.

Duong, Tuan A.↗
NASA NTRS1996

Performance Validation of Version 152.0 ANSER Control Laws for the F-18 HARV

The Actuated Nose Strakes for Enhanced Rolling (ANSER) Control Laws were modified as a result of Phase 3 F/A-18 High Alpha Research Vehicle (HARV) flight testing. The control law modifications for the next software release were designated version 152.0. The Ada implementation was tested in the Hardware-In-the-Loop (HIL) simulation and results were compared to those obtained with the NASA Langley batch Fortran implementation of the control laws which are considered the 'truth model.' This report documents the performance validation test results between these implementations for ANSER control law version 152.0.

Messina, Michael D.↗
NASA NTRS1993

Embeddable Reconfigurable Neuroprocessors

Reconfigurable and cascadable building block neural network chips, fabricated using analog VLSI design tools, are interfaced to a PC. The building block chip designs, the cascadability and the hardware-in-the-loop supervised learning aspects of these chips are described.

Neuroprocessors↗
NASA NTRSDate not supplied

Controls for Electrified Aircraft Propulsion

Advanced electrified aircraft propulsion (EAP) concepts with integrated power, propulsion, and thermal systems require the development of equally sophisticated controllers to fly safe and efficient missions. Hybrid electric aircraft utilize electric machines mechanically coupled to the engine shafts to extract and insert power for a variety of purposes. Additionally, electric machines may drive propulsive fans pulling from a combination of on-board energy storage devices and engine extracted power. NASA’s investment in hybrid electric aircraft hardware-in-the-loop testing enables controls research on representative engine models using a novel emulation and scaling methodology. High-voltage, high-power electrical powertrain presents several technical risks at altitude. High-power requires high efficiency to minimize losses. Superconducting electric machines and power distribution research at NASA has identified key challenges with potential controls solutions. These risks necessitate the development of controllers robust to model uncertainty, disturbances, and fault conditions. System health management and fault detection schemes play an important role in a multi-layer controls approach that utilizes a supervisor which oversees inner loops for the highly coupled power, propulsion, and thermal systems. Such a supervisory controller enables coordinates energy transfer between engines, energy storage devices, electric machines, propulsors, and heat exchangers. Existing methods have shown an improvement in engine operability using the hybrid electric powertrain.

Halle E Buescher↗
DOE OSTI2025

Real-Time Testbed for Studying Cyberattacks and Defense in DER-integrated Smart Inverter Systems

In this paper, we propose a Hardware-in-the-Loop (HIL) simulation testbed suitable for the implementation and testing of realistic cyberattacks on grid-tied smart inverter systems integrated with Distributed Energy Resources (DER) that use the Distributed Network Protocol-3 (DNP3) protocol for communications between grid components. Specifically, our testbed combines a Real-Time Digital Simulator (RTDS) NovaCor device, outfitted with GNETx2 network interface cards, a gridtied DER topology implemented via the RTDS software package RSCAD, and a custom virtual network that emulates a man in the middle attacker. The Man-in-the-Middle (MITM) attacker captures DNP3 traffic and falsifies telemetry data in DNP3 packets to trigger unwarranted commands from a DNP3 controller that exploit smart inverter grid support functions. We choose DNP3 and implement grid support functions according to the IEEE Std. 1547-2018 mandated for the interconnection and interoperability of DER power systems with associated power components. Furthermore, we develop a protocol payload agnostic attack detection framework that leverages the round-trip time (RTT) anomalies between DNP3 requests and responses and can detect the presence of attacks without having to analyze the payload’s contents, while balancing trade-offs between false alarm counts, missed detections, and time to detection. To facilitate further research, we publicly release benign and attack network traffic exchanged between various sensors, controllers, and actuators in our grid-tied inverter testbed.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2026

Energy Systems Integration Facility Stewardship Summary: Fiscal Year 2025

A summary of NLR's stewardship of the nationally unique Energy Systems Integration Facility (ESIF) highlighting performance metrics, capability upgrades, and examples of R&D impact. 2025 brought a national focus on energy and ESIF is meeting the moment. All eyes are on data centers and domestic manufacturing and bringing the benefits of artificial intelligence to power system planning and operations. In step with national priorities, ESIF is building out capabilities that advance secure, reliable, and affordable power. ESIF hosted 190 multidisciplinary research projects, 855 high-performance computer users, and collaborated with 81 partners from industry, academia, research, and federal agencies. These research projects resulted in an AI method for detecting high-impedance faults with 90% accuracy, a grid controls demonstration in Connecticut, power quality validation of CorePower's flagship inductor, and a cybersecurity assessment of potential rogue capabilities in digitally connected energy devices. Facility infrastructure improvements enhanced the thermal research network, the SCADA system, the cyber range, power hardware-in-the-loop testing, and more. With support from the U.S Department of Energy (DOE), the ESIF laboratories continue to deliver leading solutions for secure, reliable, and affordable power.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2024

A CHIL Validation of Machine Learning-Assisted Methods for Real-Time Controls of Solar PV for Grid Services

Recent research has highlighted the potential for solar to act as a zero-marginal-cost and zero-emission flexibility resource on the bulk power system when operated with advanced control systems. To increase the performance of these systems, leading technologies, including machine learning (ML) and hierarchical inverter set point allocation, have been proposed; however, these technologies lack comprehensive validation under real-world application scenarios. This paper addresses this gap by designing and developing a controller-hardware-in-the-loop framework to evaluate the performance of different flexible solar technologies in responding to automatic generation control signals in a closed-loop fashion. Simulation results indicate the superior performance of an ML-based approach compared to the conventional reference-control grouping-based approach, showcasing its potential to support grid stability and operational efficiency.

closed-loop validation↗