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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 109 records · Page 6
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

Superionic fluoride gate dielectrics with low diffusion barrier for two-dimensional electronics

Exploration of new dielectrics with a large capacitive coupling is an essential topic in modern electronics when conventional dielectrics suffer from the leakage issue near the breakdown limit. Here, to address this looming challenge, we demonstrate that rare-earth metal fluorides with extremely low ion migration barriers can generally exhibit an excellent capacitive coupling over 20 μF cm -2 (with an equivalent oxide thickness of ~0.15 nm and a large effective dielectric constant near 30) and great compatibility with scalable device manufacturing processes. Such a static dielectric capability of superionic fluorides is exemplified by MoS 2 transistors exhibiting high on/off current ratios over 10 8 , ultralow subthreshold swing of 65 mV dec -1 and ultralow leakage current density of ~10 -6 A cm -2 . Therefore, the fluoride-gated logic inverters can achieve notably higher static voltage gain values (surpassing ~167) compared with a conventional dielectric. Furthermore, the application of fluoride gating enables the demonstration of NAND, NOR, AND and OR logic circuits with low static energy consumption. In particular, the superconductor–insulator transition at the clean-limit Bi 2 Sr 2 CaCu 2 O 8+δ can also be realized through fluoride gating. In conclusion, our findings highlight fluoride dielectrics as a pioneering platform for advanced electronic applications and for tailoring emergent electronic states in condensed matter.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2021

Efficient Quantum Gate Discovery with Optimal Control

Optimal control theory provides a framework for numerical discovery of device controls that implement quantum logic gates, but common objective functions used for optimization often assign arbitrarily high costs to otherwise useful controls. We propose a framework for designing objective functions that permit novel gate designs such as echo pulses or locally-equivalent gates. We use numerical simulations to demonstrate the efficacy of the new objective functions by designing microwave-only pulses that act as entangling gates for superconducting transmon architectures. We observe that the proposed objective functions lead to higher fidelity controls in fewer optimization iterations than obtainable by traditional objective functions.

Kairys, Paul↗
DOE OSTI2021

Full configuration interaction simulations of exchange-coupled donors in silicon using multi-valley effective mass theory

Abstract Donor spins in silicon have achieved record values of coherence times and single-qubit gate fidelities. The next stage of development involves demonstrating high-fidelity two-qubit logic gates, where the most natural coupling is the exchange interaction. To aid the efficient design of scalable donor-based quantum processors, we model the two-electron wave function using a full configuration interaction method within a multi-valley effective mass theory. We exploit the high computational efficiency of our code to investigate the exchange interaction, valley population, and electron densities for two phosphorus donors in a wide range of lattice positions, orientations, and as a function of applied electric fields. The outcomes are visualized with interactive images where donor positions can be swept while watching the valley and orbital components evolve accordingly. Our results provide a physically intuitive and quantitatively accurate understanding of the placement and tuning criteria necessary to achieve high-fidelity two-qubit gates with donors in silicon.

Joecker, Benjamin (ORCID:0000000302635440)↗
DOE OSTI2023

Two Circuits for Directing and Controlling Ballistic Fluxons

Reversible logic schemes using flux solitons (fluxons) on long Josephson junctions (LJJs) have recently been proposed. The attraction of the fluxon is that it propagates ballistically along an LJJ until it encounters a change in the character of the LJJ, often a designed circuit element. Logic gates involve fluxons interacting with circuit elements and with other fluxons. However, testing of ballistic fluxon circuits requires other circuits outside the logic family to direct and control fluxon motion. Here we discuss two such non-reversible fluxon control circuits. First, the polarity filter gate is a simple non-reversible gate that allows one polarity of fluxon to pass, while reflecting the other polarity. In the off state both polarities reflect. Second, the polarity separator generalizes on the polarity filter concept and allows separation of the two fluxon polarities into different LJJs. We discuss simulations of these structures and possible applications.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
NASA NTRS1990

Pass transistor implementations of multivalued logic

A simple straight-forward Karnaugh map logic design procedure for realization of multiple-valued logic circuits is presented in this paper. Pass transistor logic gates are used to realize multiple-valued networks. This work is an extension of pass transistor implementations for binary-valued logic.

Maki, G.↗
NASA NTRS2006

Micro-Inspector Avionics Module (MAM): A Self-Contained Low Power, Reconfigurable Avionics Platform for Small Spacecrafts and Instruments

This paper describes development of a radiation tolerant, low power, reconfigurable avionics module aimed at meeting the avionics needs of the JPL Micro-Inspector spacecraft. This module represents a complete avionics system, consisting of two PowerPC 405 CPUs embedded within a reconfigurable FPGA fabric of over 8 Million logic gates, 64MB of EDAC protected Flash storage and 128MB of EDAC protected DDR SDRAM or SDRAM memories, along with FPGA SEU mitigation logic, and all necessary power conversion. Processor SEU mitigation is achieved by running the two processors in a lock-step and compare configuration. All of these building blocks are integrated into a double sided circuit board that takes as little as 6 square inches of board space. This module can be embedded into a user system as part of a bigger circuit assembly or as a self contained module. This module is being developed as part of a JPL led Micro-Inspector Program, funded by NASA ESMD aimed at producing a 10Kg micro spacecraft.

configurable↗
NASA NTRS1988

VLSI Architecture Of A Binary Up/Down Counter

Identical stages contain relatively-few logic gates. New algorithm simplifies design of binary up/down counter. Design suitable for very-large-scale integrated circuits. Contains simple "pipeline" array of identical cells. Programmable logic unit converts increment and decrement input signals to "U" and "D" signals required by algorithm of counter.

Hsu, In-Shek↗
DOE OSTI2024

Realistic Cost to Execute Practical Quantum Circuits using Direct Clifford+T Lattice Surgery Compilation

We report a resource estimation pipeline that explicitly compiles quantum circuits expressed using the Clifford+T gate set into a surface code lattice surgery instruction set. The cadence of magic state requests from the compiled circuit enables the optimization of magic state distillation and storage requirements in a post-hoc analysis. To compile logical circuits into lattice surgery operations, we build upon the open-source Lattice Surgery Compiler. The revised compiler operates in two stages: the first translates logical gates into an abstract, layout-independent instruction set; the second compiles these into local lattice surgery instructions that are allocated to hardware tiles according to a specified resource layout. The second stage retains logical parallelism while avoiding resource contention in the fault-tolerant layer, aiding realism. Additionally, users can specify dedicated tiles at which magic states are replenished, enabling resource costs from the logical computation to be considered independently from magic state distillation and storage. We demonstrate the applicability of our pipeline to large practical quantum circuits by providing resource estimates for the ground state estimation of molecules. Finally, we find that variable magic state consumption rates in real circuits can cause the resource costs of magic state storage to dominate unless production is varied to suit.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2022

A multi-stage single photochrome system for controlled photoswitching responses

The ability of molecular photoswitches to convert on/off responses into large macroscale property change is fundamental to light-responsive materials. However, moving beyond simple binary responses necessitates the introduction of new elements that control the chemistry of the photoswitching process at the molecular scale. To achieve this goal, we designed, synthesized and developed a single photochrome, based on a modified donor–acceptor Stenhouse adduct (DASA), capable of independently addressing multiple molecular states. The multi-stage photoswitch enables complex switching phenomena. To demonstrate this, we show spatial control of the transformation of a three-stage photoswitch by tuning the population of intermediates along the multi-step reaction pathway of the DASAs without interfering with either the first or final stage. This allows for a photonic three-stage logic gate where the secondary wavelength solely negates the input of the primary wavelength. Finally, these results provide a new strategy to move beyond traditional on/off binary photochromic systems and enable the design of future molecular logic systems.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
NASA NTRS1989

Timing Sampler For Delay Measurements

Integrated circuit called timing sampler used to measure delays in complementary metal oxide/silicon logic gates. Circuit chip contains chains of inverters and metal traces having minimum parasitic delays (delay chains), circuits to compare pulse timings, and output multiplexer. Timing sampler enables delay measurements for both positive and negative logic-level transitions by use of variety of circuit geometries representing tentative practical designs.

Blaes, Brent R.↗
NASA NTRS1976

Two-dimensional radiant energy array computers and computing devices

Two dimensional digital computers and computer devices operate in parallel on rectangular arrays of digital radiant energy optical signal elements which are arranged in ordered rows and columns. Logic gate devices receive two input arrays and provide an output array having digital states dependent only on the digital states of the signal elements of the two input arrays at corresponding row and column positions. The logic devices include an array of photoconductors responsive to at least one of the input arrays for either selectively accelerating electrons to a phosphor output surface, applying potentials to an electroluminescent output layer, exciting an array of discrete radiant energy sources, or exciting a liquid crystal to influence crystal transparency or reflectivity.

Schaefer, D. H.↗
DOE OSTI2020

Graph Theory and IC Component Design Analysis

Graph analysis in large integrated circuit (IC) designs is an essential tool for verifying design logic and timing via dynamic timing analysis (DTA). IC designs resemble graphs with each logic gate as a vertex and the conductive connections between gates as edges. Using DTA digital statistical correlations, graph condensation, and graph partitioning, it is possible to identify high-entropy component centers and paths within an IC design. Identification of high-entropy component centers (HECC) enables focused DTA, effectively lowering the computational complexity of DTA on large integrated circuit graphs. In this paper, a devised methodology termed IC layout subgraph component center identification (CCI) is used to identify described. CCI lowers DTA computationally complexity by condensing IC graphs into reduced subgraphs in which dominant logic functions are verified.

42 ENGINEERING↗
NASA NTRS1988

A fault injection experiment using the AIRLAB Diagnostic Emulation Facility

The preparation for, conduct of, and results of a simulation based fault injection experiment conducted using the AIRLAB Diagnostic Emulation facilities is described. An objective of this experiment was to determine the effectiveness of the diagnostic self-test sequences used to uncover latent faults in a logic network providing the key fault tolerance features for a flight control computer. Another objective was to develop methods, tools, and techniques for conducting the experiment. More than 1600 faults were injected into a logic gate level model of the Data Communicator/Interstage (C/I). For each fault injected, diagnostic self-test sequences consisting of over 300 test vectors were supplied to the C/I model as inputs. For each test vector within a test sequence, the outputs from the C/I model were compared to the outputs of a fault free C/I. If the outputs differed, the fault was considered detectable for the given test vector. These results were then analyzed to determine the effectiveness of some test sequences. The results established coverage of selt-test diagnostics, identified areas in the C/I logic where the tests did not locate faults, and suggest fault latency reduction opportunities.

Baker, Robert↗
DOE OSTI2026

Surface-Functionalized, Two-Dimensional Polymer Electrochromic Layers as Ultrafast, Multi-State Infrared Optical Gates

Electrochromic devices have widespread application potential, but the currently available switching speeds limit broad real-world implementation of this technology. Here, we report surface-engineered two-dimensional polymers with ionophilic pores that offer unprecedented switching speeds in solid-state, two-terminal, electrochromic devices. In particular, we demonstrate that a crystalline donor–acceptor 2DP functionalized with ethylene glycol oligomers exhibits multistate infrared absorption that is 4× faster (t c = 320 ms) with 3× coloration efficiency (491 cm 2 C –1 ) compared to an alkyl functionalized 2DP constructed from the same chromophores. The functionalized nanoporous surfaces enable rapid switching in these materials under either oxidative or reductive conditions, allowing us to access a range of robust, stable optical responses in a single electrochromic layer. These attributes led us to leverage surface-functionalized 2DPs as multistate infrared logic gates. Collectively, this work demonstrates that surface engineering of nanoporous crystalline lattices is a promising approach to co-optimize the electronic and ionic conductivities required to achieve rapidly switchable electrochromic layers. Beyond speed and efficiency, the demonstration of multistate infrared characteristics shows that electrochromic frameworks are useful in integrated optoelectronic circuits. This positions surface-engineered 2DPs as improved electrochromic coatings and a new material platform for photonic information processing and adaptive devices.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
NASA NTRS2007

Using G4FETs as a Data Router for In-Plane Crossing of Signal Paths

Theoretical analysis and some experiments have demonstrated that siliconon- insulator (SOI) 4-gate transistors the type known as G(exp 4)FETs could be efficiently used for in-plane crossing of signal paths. Much of the effort of designing very-large-scale integrated (VLSI) circuits is focused on area-efficient routing of signals. The main source of difficulty in VLSI signal routing is the requirement to prevent crossing, in the same plane, of wires that are meant to be kept electrically insulated from each other. Consequently, it often becomes necessary to design and build VLSI circuits in multiple layers with vias (connections between conductors in different layers at selected locations). Suitable devices that would prevent, or at least sufficiently suppress, undesired electrical coupling (cross-talk) between wires crossing in the same plane would enable compact, simpler implementation complex interconnection networks with in-plane crossings that, heretofore, have not been possible in VLSI circuitry. The use of G4FETs as in-plane signal-crossing devices or routers, in combination with the use of G(exp 4)FETs as universal programmable logic gates, would create opportunities for reducing complexity in VLSI design.

Fijany, Amir↗
NASA NTRS2010

Use of a Frequency Divider to Evaluate an SOI NAND Gate Device, Type CHT-7400, for Wide Temperature Applications

Frequency dividers constitute essential elements in designing phase-locked loop circuits and microwave systems. In addition, they are used in providing required clocking signals to microprocessors and can be utilized as digital counters. In some applications, particularly space missions, electronics are often exposed to extreme temperature conditions. Therefore, it is required that circuits designed for such applications incorporate electronic parts and devices that can tolerate and operate efficiently in harsh temperature environments. While present electronic circuits employ COTS (commercial-off- the-shelf) parts that necessitate and are supported with some form of thermal control systems to maintain adequate temperature for proper operation, it is highly desirable and beneficial if the thermal conditioning elements are eliminated. Amongst these benefits are: simpler system design, reduced weight and size, improved reliability, simpler maintenance, and reduced cost. Devices based on silicon-on-insulator (SOI) technology, which utilizes the addition of an insulation layer in the device structure to reduce leakage currents and to minimize parasitic junctions, are well suited for high temperatures due to reduced internal heating as compared to the conventional silicon devices, and less power consumption. In addition, SOI electronic integrated circuits display good tolerance to radiation by virtue of introducing barriers or lengthening the path for penetrating particles and/or providing a region for trapping incident ionization. The benefits of these parts make them suitable for use in deep space and planetary exploration missions where extreme temperatures and radiation are encountered. Although designed for high temperatures, very little data exist on the operation of SOI devices and circuits at cryogenic temperatures. In this work, the performance of a divide-by-two frequency divider circuit built using COTS SOI logic gates was evaluated over a wide temperature range and thermal cycling to determine suitability for use in space exploration missions and terrestrial fields under extreme temperature conditions.

Patterson, Richard L.↗
DOE OSTI2024

Embedded Fluidic Sensing and Control with Soft Open‐Cell Foams

Abstract The synthesis of soft matter intelligence with circuit‐driven logic has enabled a new class of robots that perform complex tasks or conform to specialized form factors in unique ways that cannot be realized through conventional designs. Translating this hybrid approach to fluidic systems, the present work addresses the need for sheet‐based circuit materials by leveraging the innate porosity of foam—a soft material—to develop pneumatic components that support digital logic, mixed‐signal control, and analog force sensing in wearables and soft robots. Analytical tools and experimental techniques developed in this work serve to elucidate compressible gas flow through porous sheets, and to inform the design of centimeter‐sized foam resistors with fluidic resistances on the order of 10 9 Pa s m −3 . When embedded inside soft robots and wearables, these resistors facilitate diverse functionalities spanning both sensing and control domains, including digital logic using textile logic gates, digital‐to‐analog signal conversion using ladder networks, and analog sensing of forces up to 40 N via compression‐induced changes in resistance. By combining features of both circuit‐based and materials‐based approaches, foam‐enabled fluidic circuits serve as a useful paradigm for future hybrid robotic architectures that fully embody the sensing and computing capabilities of soft fluidic materials.

Rajappan, Anoop↗
DOE OSTI2020

Bis–Calix[4]pyrroles: Preparation, structure, complexation properties and beyond

Calix[4]pyrrole and its derivatives are key members of the supramolecular Parthenon along with other well-recognized receptor systems, such as crown ethers, cyclodextrins (CDs), cucurbiturils, calixarenes and pillararenes. Calix[4]pyrroles are relatively easy–to–make and widely recognized for their ability to bind anions and ion pairs. Many review papers relating to aspects of calix[4]pyrrole chemistry have been published within the past decades. These reviews have focused primarily on monomeric calix[4]pyrroles. The emergent area of Bis–calix[4]pyrroles, species wherein two calix[4]pyrrole subunits are linked by one or more “walls”, has not benefited from such treatment, even though the species in question often exhibit enhanced binding affinities and selectivities relative to their single calix[4[pyrrole congeners. This review is designed to summarize recent progress involving bis–calix[4]pyrroles. Advances in the design, synthesis, and coordination chemistry of bis–calix[4]pyrroles containing “one wall”, “two walls”, “three walls”, and “four walls”, as well as their possible application in ion recognition, sensing and logic gate construction, will be detailed. Lastly, the hope is that this review will provide a guide for the design and preparation of new multi-component calix[4]pyrrole receptors possessing improved recognition properties, thereby advancing host–guest chemistry in new and useful directions.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗