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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 109 records · Page 6
All sourcesNASA NTRSDOE OSTI
DOE OSTI2022

Drivers for paralleled semiconductor switches

An apparatus includes a plurality of parallel-connected semiconductor switches (e.g., silicon carbide (SiC) metal oxide semiconductor field effect transistors (MOSFETs) or other wide-bandgap semiconductor switches) and a plurality of driver circuits having outputs configured to be coupled to control terminals of respective ones of the plurality of semiconductor switches and configured to drive the parallel-connected semiconductor switches responsive to a common switch state control signal. The driver circuits may have respective different power supplies, which may be adjustable. Respective output resistors may couple respective ones of the driver circuits to respective ones of the semiconductor switches. The output resistors may be adjustable.

Nojima, Geraldo↗
DOE OSTI2021

Engineering local strain for single-atom nuclear acoustic resonance in silicon

Mechanical strain plays a key role in the physics and operation of nanoscale semiconductor systems, including quantum dots and single-dopant devices. In this report we describe the design of a nanoelectronic device, where a single nuclear spin is coherently controlled via nuclear acoustic resonance (NAR) through the local application of dynamical strain. The strain drives spin transitions by modulating the nuclear quadrupole interaction. We adopt an AlN piezoelectric actuator compatible with standard silicon metal–oxide–semiconductor processing and optimize the device layout to maximize the NAR drive. We predict NAR Rabi frequencies of order 200 Hz for a single 123Sb nucleus in a wide region of the device. Spin transitions driven directly by electric fields are suppressed in the center of the device, allowing the observation of pure NAR. Using electric field gradient-elastic tensors calculated by the density-functional theory, we extend our predictions to other high-spin group-V donors in silicon and to the isoelectronic 73Ge atom.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2022

2D materials-assisted heterogeneous integration of semiconductor membranes toward functional devices

Heterogeneous integration techniques allow the coupling of highly lattice-mismatched solid-state membranes, including semiconductors, oxides, and two-dimensional materials, to synergistically fuse the functionalities. The formation of heterostructures generally requires two processes: the combination of crystalline growth and a non-destructive lift-off/transfer process enables the formation of high-quality heterostructures. Although direct atomic interaction between the substrate and the target membrane ensures high-quality growth, the strong atomic bonds at the substrate/epitaxial film interface hinder the non-destructive separation of the target membrane from the substrate. Alternatively, a 2D material-coated compound semiconductor substrate can transfer the weakened (but still effective) surface potential field of the surface through the 2D material, allowing both high-quality epitaxial growth and non-destructive lift-off of the grown film. This Perspective reviews 2D/3D heterogeneous integration techniques, along with applications of III–V compound semiconductors and oxides. Here, the advanced heterogeneous integration methods offer an effective method to produce various freestanding membranes for stackable heterostructures with unique functionalities that can be applied to novel electrical, optoelectronic, neuromorphic, and bioelectronic systems.

2D materials↗
NASA NTRS1996

CMOS Active Pixel Sensors for Low Power, Highly Miniaturized Imaging Systems

The complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) technology has been developed over the past three years by NASA at the Jet Propulsion Laboratory, and has reached a level of performance comparable to CCDs with greatly increased functionality but at a very reduced power level.

CMOS complementary metal-oxide-semiconductor activ↗
DOE OSTI2020

Experimental and theoretical evidence for hydrogen doping in polymer solution-processed indium gallium oxide

The field-effect electron mobility of aqueous solution-processed indium gallium oxide (IGO) thin-film transistors (TFTs) is significantly enhanced by polyvinyl alcohol (PVA) addition to the precursor solution, a >70-fold increase to 7.9 cm 2 /Vs. To understand the origin of this remarkable phenomenon, microstructure, electronic structure, and charge transport of IGO:PVA film are investigated by a battery of experimental and theoretical techniques, including In K-edge and Ga K-edge extended X-ray absorption fine structure (EXAFS); resonant soft X-ray scattering (R-SoXS); ultraviolet photoelectron spectroscopy (UPS); Fourier transform-infrared (FT-IR) spectroscopy; time-of-flight secondary-ion mass spectrometry (ToF-SIMS); composition-/processing-dependent TFT properties; high-resolution solid-state 1 H, 71 Ga, and 115 In NMR spectroscopy; and discrete Fourier transform (DFT) analysis with ab initio molecular dynamics (MD) liquid-quench simulations. The 71 Ga{ 1 H} rotational-echo double-resonance (REDOR) NMR and other data indicate that PVA achieves optimal H doping with a Ga···H distance of ~3.4 Å and conversion from six- to four-coordinate Ga, which together suppress deep trap defect localization. This reduces metal-oxide polyhedral distortion, thereby increasing the electron mobility. Finally, hydroxyl polymer doping thus offers a pathway for efficient H doping in green solvent-processed metal oxide films and the promise of high-performance, ultra-stable metal oxide semiconductor electronics with simple binary compositions.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
NASA NTRS2010

NASA Engineering and Safety Center Technical Bulletin No. 10-01: Power MOSFET Thermal Instability

In the quest for faster switching times and lower “on resistance” the Metal-Oxide Semiconductor Field-Effect Transistor (MOSFET), produced since 1998, has achieved most intended goals. Unfortunately, lower “on resistance” and higher switching speeds in the designs now being produced allow the charge carrier dominated region to develop conditions that could lead to thermal runaway. Temperatures above 450º C on any location within the part can cause the metals to begin migrating causing a fatal short circuit.

Metal-Oxide Semiconductor Field-Effect Transistor ↗
DOE OSTI2022

Characterization of Shallow, Undoped Ge/SiGe Quantum Wells Commercially Grown on 8-in. (100) Si Wafers

Hole spins in Ge quantum wells have shown success in both spintronic and quantum applications, thereby increasing the demand for high-quality material. We performed material analysis and device characterization of commercially grown shallow and undoped Ge/SiGe quantum well heterostructures on 8-in. (100) Si wafers. Material analysis reveals the high crystalline quality, sharp interfaces, and uniformity of the material. We demonstrate a high mobility (1.7 × 10 5 cm 2 V –1 s –1 ) 2D hole gas in a device with a conduction threshold density of 9.2 × 10 10 cm –2 . We study the use of surface preparation as a tool to control barrier thickness, density, mobility, and interface trap density. We report interface trap densities of 6 × 10 12 eV –1 . Our results validate the material’s high quality and show that further investigation into improving device performance is needed. We conclude that surface preparations which include weak Ge etchants, such as dilute H 2 O 2 , can be used for postgrowth control of quantum well depth in Ge-rich SiGe while still providing a relatively smooth oxide–semiconductor interface. Our results show that interface state density is mostly independent of our surface preparations, thereby implying that a Si cap layer is not necessary for device performance. Transport in our devices is instead limited by the quantum well depth. Commercially sourced Ge/SiGe, such as studied here, will provide accessibility for future investigations.

36 MATERIALS SCIENCE↗
NASA NTRS1979

Thermally grown oxide and diffusions for automatic processing of integrated circuits

A totally automated facility for semiconductor oxidation and diffusion was developed using a state-of-the-art diffusion furnace and high temperature grown oxides. Major innovations include: (1) a process controller specifically for semiconductor processing; (2) an automatic loading system to accept wafers from an air track, insert them into a quartz carrier and then place the carrier on a paddle for insertion into the furnace; (3) automatic unloading of the wafers back onto the air track, and (4) boron diffusion using diborane with plus or minus 5 percent uniformity. Processes demonstrated include Wet and dry oxidation for general use and for gate oxide, boron diffusion, phosphorous diffusion, and sintering.

Kennedy, B. W.↗
NASA NTRS2010

Re-Verification of the IRHN57133SE and IRHN57250SE for Single Event Gate Rupture and Single Event Burnout

The vertical metal oxide semiconductor field-effect transistor (MOSFET) is a widely used power transistor onboard a spacecraft. The MOSFET is typically employed in power supplies and high current switching applications. Due to the inherent high electric fields in the device, power MOSFETs are sensitive to heavy ion irradiation and can fail catastrophically as a result of single event gate rupture (SEGR) or single event burnout (SEB). Manufacturers have designed radiation-hardened power MOSFETs for space applications. These radiation hardened devices are not immune to SEGR or SEB but, rather, can exhibit them at a much more damaging ion than their non-radiation hardened counterparts. See [1] through [5] for more information.This effort was to investigate the SEGR and SEB responses of two power MOSFETs from IR(the IRHN57133SE and the IRHN57250SE) that have recently been produced on a new fabrication line. These tests will serve as a limited verification of these parts, but it is acknowledged that further testing on the respective parts may be needed for some mission profiles.

Single Event Gate Rupture (SEGR)↗
NASA NTRS2008

IR DirectFET Extreme Environments Evaluation Final Report

In 2007, International Rectifier (IR) introduced a new version of its DirectFET metal oxide semiconductor field effect transistor (MOSFET) packaging. The new version (referred to as 'Version 2') enhances device moisture resistance, makes surface mount (SMT) assembly of these devices to printed wiring boards (PWBs) more repeatable, and subsequent assembly inspection simpler. In the present study, the National Aeronautics Space Administration (NASA) Jet Propulsion Laboratory (JPL), in collaboration with Stellar Microelectronics (Stellar), continued an evaluation of the DirectFET that they started together in 2006. The present study focused on comparing the two versions of the DirectFET and examining the suitability of the DirectFET devices for space applications. This study evaluated both versions of two DirectFET packaged devices that had both been shown in the 2006 study to have the best electrical and thermal properties: the IRF6635 and IRF6644. The present study evaluated (1) the relative electrical and thermal performance of both versions of each device, (2) the performance through high reliability testing, and (3) the performance of these devices in combination with a range of alternate solder alloys in the extreme thermal environments of deep space....

electronic parts packaging↗
DOE OSTI2025

Amorphous Indium Oxide Channel FEFETs With Write Voltage of 0.9 V and Endurance >10 12 for Refresh-Free Embedded Memory

This work presents, for the first time, a back-end-of-the-line (BEOL)-compatible W-doped indium oxide (IWO) ferroelectric field-effect transistor (FEFET) with a record-low operating voltage below 0.9 V and a write speed of 20 ns while achieving a transient read current window (CW) ratio ( I LVT /I HVT ) greater than 10 4 . The device also exhibits exceptional reliability characteristics such as: 1) measured bipolar write endurance up to 10 12 cycles; 2) a fast read speed of 50 ns; 3) read endurance surpassing 10 12 cycles; and 4) retention exceeding 10 4 s at 85 ∘ C. Furthermore, a physics-based numerical model has been developed to investigate the nanoscale characteristics of BEOL FEFET devices, leveraging nucleation-limited switching in HfO 2 ferroelectrics and dc characterization to extract material and channel parameters for accurate device simulation. The simulation uncovers the stochastic switching behavior of BEOL amorphous oxide semiconductor (AOS) FEFETs and demonstrates an intrinsic switching time as low as 1 ps, highlighting the potential of BEOL AOS FEFETs for ultrafast memory applications. These results establish AOS FEFETs as a compelling candidate for high-density embedded memory applications for last-level cache (LLC) (L4) in advanced CMOS technology nodes.

1-V ferroelectric field-effect transistor (FEFET)↗
DOE OSTI2025

Tracking oxygen vacancy migration in memristor devices using operando hard X-ray photoelectron spectroscopy

Fabrication of ultrathin (sub-2 nm) oxide semiconductor memristors poses the fundamental challenge of achieving oxide growth with atomic precision in terms of electronic structure and defect formation. Recently, ultrathin memristors consisting of bilayers of mixed Al 2 O 3 and MgO atomic layers were fabricated using an in vacuo atomic layer deposition process. This approach offers a unique platform for precise atomic control of oxygen vacancies in the device in which the vacancies are introduced by placing MgO atomic layers between pristine Al 2 O 3 layers. In this work, we present a systematic operando Hard X-ray PhotoElectron Spectroscopy (HAXPES) study of the switching of such memristors, combined with complementary current-voltage and capacitance-voltage (C-V) measurements. We used a memristor stack of Al 2 O 3 /MgO atomic layers, with the MgO-containing oxide deposited on the bottom Al metal electrode and a pure Al 2 O 3 layer below the top Pd electrode. HAXPES analysis shows a substantial change in the chemical shift of the Aluminum oxide when switching between the ”OFF” and ”ON” states indicative of a redistribution of oxygen vacancies in the device active layer. Interestingly, subsequent switching to the OFF state shows hysteretic behavior indicating the retention of some oxygen vacancies in the top Al 2 O 3 layer. This vacancy retention can be correlated with the stochastic behavior of the switching voltage observed in these devices. C–V measurements show a clear frequency-dependent response in the OFF state, consistent with enhanced polarization and vacancy trapping at low frequencies.

47 OTHER INSTRUMENTATION↗
DOE OSTI2020

Graphite-Embedded High-Performance Insulated Metal Substrate for Wide-Bandgap Power Modules

Emerging wide-bandgap (WBG) semiconductor devices such as silicon carbide (SiC) metal–oxide semiconductor field-effect transistors (MOSFETs) and gallium nitride high-electron-mobility transistors can handle high power in reduced semiconductor areas better than conventional Si-based devices owing to superior material properties. With increased power loss density in a WBG-based converter and reduced die size in power modules, thermal management of power devices must be optimized for high performance. Here, we present a graphite-embedded insulated metal substrate (thermally-annealed-pyrolytic-graphite-embedded insulated metal substrate—IMSwTPG) designed for WBG power modules. Theoretical thermal performance analysis of graphite-embedded metal cores is presented, with design details for IMSwTPG with embedded graphite to replace a direct-bonded copper (DBC) substrate. The proposed IMSwTPG is compared with an aluminum nitride-based DBC substrate using finite-element thermal analysis for steady-state and transient thermal performance. The solutions’ thermal performances are compared under different coolant temperature and thermal loading conditions, and the proposed substrate's electrical performance is validated with static and dynamic characterization. Using graphite-embedded substrates, junction-to-case thermal resistance of SiC MOSFETs can be reduced up to 17%, and device current density can be increased by 10%, regardless of the thermal management strategy used to cool the substrate. Reduced transient thermal impedance of up to 40% of dies owing to increased heat capacity is validated in transient thermal simulations and experiments. The half-bridge power module's electrical performance is evaluated for on -state resistance, switching performance, and switching loss at three junction temperature conditions. The proposed substrate solution has minimal impact on conduction and switching performance of SiC MOSFETs.

42 ENGINEERING↗
DOE OSTI2024

Epitaxial Growth of Large-Scale 2D CrTe 2 Films on Amorphous Silicon Wafers With Low Thermal Budget

2D van der Waals (vdW) magnets open landmark horizons in the development of innovative spintronic device architectures. However, their fabrication with large scale poses challenges due to high synthesis temperatures (>500 °C) and difficulties in integrating them with standard complementary metal-oxide semiconductor (CMOS) technology on amorphous substrates such as silicon oxide (SiO 2 ) and silicon nitride (SiN x ). Here, a seeded growth technique for crystallizing CrTe 2 films on amorphous SiN x /Si and SiO 2 /Si substrates with a low thermal budget is presented. This fabrication process optimizes large-scale, granular atomic layers on amorphous substrates, yielding a substantial coercivity of 11.5 kilo-oersted, attributed to weak intergranular exchange coupling. Field-driven Néel-type stripe domain dynamics explain the amplified coercivity. Moreover, the granular CrTe 2 devices on Si wafers display significantly enhanced magnetoresistance, more than doubling that of single-crystalline counterparts. Current-assisted magnetization switching, enabled by a substantial spin–orbit torque with a large spin Hall angle (85) and spin Hall conductivity (1.02 × 10 7 ℏ/2e Ω -1 m -1 ), is also demonstrated. These observations underscore the proficiency in manipulating crystallinity within integrated 2D magnetic films on Si wafers, paving the way for large-scale batch manufacturing of practical magnetoelectronic and spintronic devices, heralding a new era of technological innovation.

2D magnetic thin films↗