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Theory for block-coded telemetry systems is useful in testing performance of one- and two-way, phase-coherent telemetry systems when double-conversion, superheterodyne, phase-locked receiver, preceded by bandpass limiter is used to track carrier.
Tracking oscillator consists of modified phase-lock loop which controls voltage-controlled oscillator capable of automatic lock-on and track of periodic input waveform over frequency ratio 500-1. It is used in telemetry and communications systems where large signal fluctuations are encountered.
Phase and frequency fluctuations, inherent in oscillators used as frequency standards, are measured over spectral frequency range of 1 Hz to 5 kHz. Basic measurement system consists of electromechanical phase-locked loop that extracts phase and frequency fluctuations and error multiplier that extends threshold sensitivity.
Phase-locked loop operation in multipath environment and multipath effect on detection for Mars probe
Program studies and designs combline filters and analyzes their effectiveness in improving TV quality. Signal tracking methods are improved. Combline phase-lock loop provides significant sensitivity improvement above and below threshold.
The system described performs the tracking and communications functions of a tracking and data relay satellite system (TDRS). The spread-spectrum signal format is achieved through wide deviation FM by a sinusoidal subcarrier unique to each multiple-access user. A compound phase-locked loop tracks carrier and subcarrier and demodulates data and ranging signals. Design parameters of user and ground terminals for TDRS are given. Acquisition procedures are described. Performance analyses are presented including the effects of noise, RFI, multipath and other users.
Range rate errors due to specular and diffuse multipath are calculated for a tracking and data relay satellite (TDRS) using an S band Goddard range and range rate (GRARR) system modified with a phase-locked loop transponder. Carrier signal processing in the coherent turn-around transponder and the GRARR reciever is taken into account. The root-mean-square (rms) range rate error was computed for the GRARR Doppler extractor and N-cycle count range rate measurement. Curves of worst-case range rate error are presented as a function of grazing angle at the reflection point. At very low grazing angles specular scattering predominates over diffuse scattering as expected, whereas for grazing angles greater than approximately 15 deg, the diffuse multipath predominates. The range rate errors at different low orbit altutudes peaked between 5 and 10 deg grazing angles.
This note deals with the measurement of the total electron content of the ionosphere at the Goddard Space Flight Center, looking towards the geostationary satellite ATS 3 during the solar eclipse of Mar. 7, 1970. Obscuration at this site was nearly total. Faraday rotation was measured with a stationary circularly polarized antenna and a dual-channel phase-lock receiver tuned to 137.350 MHz. By comparing the electrical phase of the two opposite circularly polarized components, a continuous chart recording was made of Faraday rotation vs local time. A depletion of about 25% in electron content was observed from first contact to the time of minimum electron content. The time variations of the electron content during the eclipse are briefly examined in the light of current theories of ionospheric processes.
Discussion of the optimum power allocation problem associated with the design of a phase-coherent receiver employing a bandpass limiter. A single channel system is treated in detail, and an optimization technique is proposed that makes use of up-to-date phase-locked loop and bandpass limiter theories recently contributed by Lindsey (1969) and Springett and Simon (1971). It is shown how this technique can be extended to a two-channel system.
A digital pulse programmer producing the standard pulse sequences required for pulsed nuclear magnetic resonance spectroscopy is described. In addition, a 'saturation burst' sequence, useful in the measurement of long relaxation times in solids, is provided. Both positive and negative 4 V trigger pulses are produced that are fully synchronous with a crystal-controlled time base, and the pulse programmer may be phase-locked with a maximum pulse jitter of 3 ns to the oscillator of a coherent pulse spectrometer. Medium speed TTL integrated circuits are used throughout.
A digital computer model for Monte-Carlo simulation of an imperfect second-order hybrid phase-locked loop (PLL) operating in radio-frequency interference (RFI) and Gaussian noise backgrounds has been developed. Characterization of hybrid loop performance in terms of cycle slipping statistics and phase error variance, through computer simulation, indicates that the hybrid loop has desirable performance characteristics in RFI backgrounds over the conventional PLL or the costas loop.
A phase-locked loop designed with all-digital circuitry which avoids certain problems, and a digital voltage controlled oscillator algorithm are described. The system operates synchronously and performs all required digital calculations within one sampling period, thereby performing as a real-time special-purpose computer. The SNR ratio is computed for frequency offsets and sinusoidal modulation, and experimental results verify the theoretical calculations.
A method is presented for calculating the effect of carrier-phase reference error in a receiver phase-locked loop on bit error rates in convolutionally coded data, for the practical design of systems using short-constraint-length convolutional codes. A set of design curves shows the relation between design bit error rate, uplink carrier tracking loop SNR, downlink total SNR, and downlink modulation index. These curves make possible rapid and simple system optimization.
Self-synchronizing digital data communication systems usually use active or phase-locked loop (PLL) bit synchronizers. The three main elements of PLL synchronizers are the phase detector, loop filter, and the voltage controlled oscillator. Of these three elements, phase detector synthesis is the main source of difficulty, particularly when the received signals are demodulated square-wave signals. A phase detector synthesis technique is reviewed that provides a physically realizable design for bit synchronizer phase detectors. The development is based upon nonlinear recursive estimation methods. The phase detector portion of the algorithm is isolated and analyzed.
An interconnection algorithm is presented for achieving clock synchronization in a multiprocessor system. The system is assumed to be maliciously faulty, i.e., some processors are out of synchronization and lie about their clock state to other intragroup or intergroup processors. A phase-locked clock network design is proposed which groups the clocks in the system into diverse clusters. The clusters are then treated as single clock units from the perspective of the network. The algorithm minimizes the number of interconnections while permitting synchronization of large multiprocessor systems controlling time-critical applications such as aircraft, nuclear reactors and industrial processes.
A design has been conceived for a system intended to provide rapid command sync acquisition between widely separated transmitter-receivers, such as between a spacecraft telemetry transmitter, and a ground-based receiver. Use of the system in commercial satellite communications would facilitate rapid sync acquisition between stations and regaining of data lock after interruption or equipment failure. The system is based on a rapid, automatic range-adjustment approach rather than the time-consuming cycle slipping or stepping techniques of conventional phase-locked loops.
A technique is presented that may be used for precision real-time continuous range measuring at long ranges. The technique uses a carrier that is phase modulated by a pseudo-random binary sequence. The characteristics of the sequence that make it acquirable are discussed. The general form of a receiver capable of tracking the carrier is given and is shown to be a kind of phase-locked loop. A two-loop system capable of tracking a pseudo-random sequence and its clock is given. The combination of the receiver and the sequence tracking system form a ranging receiver. The power division necessary between the carrier and the sidebands is shown to be determined by the noise bandwidths of the two tracking systems. The bandwidths necessary for tracking space probes and Earth satellites are given and some experiments in radar-tracking Earth satellites are described. Based on these experiments, estimates are made of the useful range of such a system in tracking space probes.
In TDC testing and timing system implementations, it is often necessary to generate signal pulses with finely adjustable time intervals. In delay cell–based schemes, the adjustment resolution is constrained by the propagation delay of the cells—typically 15–20 ps per step—and is sensitive to temperature and supply voltage variations. This document presents a fully digital approach that uses two vernier clocks, generated by two stages of cascaded phase-locked loops (PLLs) with a slight frequency difference, to achieve adjustable timing intervals through accumulated phase differences. The scheme was validated on two families of low-cost FPGA devices, achieving adjustable step sizes of 0.67 ps and 0.97 ps.