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At least 1,099 records · Page 61

Implementation and Testing of VLBI Software Correlation at the USNO

The Washington Correlator (WACO) at the U.S. Naval Observatory (USNO) is a dedicated VLBI processor based on dedicated hardware of ASIC design. The WACO is currently over 10 years old and is nearing the end of its expected lifetime. Plans for implementation and testing of software correlation at the USNO are currently being considered. The VLBI correlation process is, by its very nature, well suited to a parallelized computing environment. Commercial off-the-shelf computer hardware has advanced in processing power to the point where software correlation is now both economically and technologically feasible. The advantages of software correlation are manifold but include flexibility, scalability, and easy adaptability to changing environments and requirements. We discuss our experience with and plans for use of software correlation at USNO with emphasis on the use of the DiFX software correlator.

Fey, Alan↗

New Techniques for High-Contrast Imaging with ADI: The ACORNS-ADI SEEDS Data Reduction Pipeline

We describe Algorithms for Calibration, Optimized Registration, and Nulling the Star in Angular Differential Imaging (ACORNS-ADI), a new, parallelized software package to reduce high-contrast imaging data, and its application to data from the Strategic Exploration of Exoplanets and Disks (SEEDS) survey. We implement seyeral new algorithms, includbg a method to centroid saturated images, a trimmed mean for combining an image sequence that reduces noise by up to approx 20%, and a robust and computationally fast method to compute the sensitivitv of a high-contrast obsen-ation everywhere on the field-of-view without introducing artificial sources. We also include a description of image processing steps to remove electronic artifacts specific to Hawaii2-RG detectors like the one used for SEEDS, and a detailed analysis of the Locally Optimized Combination of Images (LOCI) algorithm commonly used to reduce high-contrast imaging data. ACORNS-ADI is efficient and open-source, and includes several optional features which may improve performance on data from other instruments. ACORNS-ADI is freely available for download at www.github.com/t-brandt/acorns_-adi under a BSD license

Brandt, Timothy D.↗

Updates to the NEQAIR Radiation Solver

The NEQAIR code is one of the original heritage solvers for radiative heating prediction in aerothermal environments, and is still used today for mission design purposes. This paper discusses the implementation of the first major revision to the NEQAIR code in the last five years, NEQAIR v14.0. The most notable features of NEQAIR v14.0 are the parallelization of the radiation computation, reducing runtimes by about 30×, and the inclusion of mid-wave CO2 infrared radiation.

Radiation↗

Tuning the Performance of a Computational Persistent Homology Package

In recent years, persistent homology has become an attractive method for data analysis. It captures topological features, such as connected components, holes, and voids from point cloud data and summarizes the way in which these features appear and disappear in a filtration sequence. In this project, we focus on improving the performanceof Eirene, a computational package for persistent homology. Eirene is a 5000-line open-source software library implemented in the dynamic programming language Julia. We use the Julia profiling tools to identify performance bottlenecks and develop novel methods to manage them, including the parallelization of some time-consuming functions on multicore/manycore hardware. Empirical results show that performance can be greatly improved.

Persistent Homology↗

Porting OVERFLOW CFD Code to GPUs: To Hackathons and Beyond!

OVERFLOW is an overset, structured computational fluid dynamics (CFD) code written in Fortran which is widely used in the government, industry, and academia. Over the last several years the OVERFLOW developers have been working to port miniapps based on computationally expensive parts of OVERFLOW to run on GPUs, primarily using OpenACC. This effort started at our first hackathon in 2019 and since then the OVERFLOW team has attended two additional hackathons (virtually). These hackathon environments have provided a great place to collaborate with others and learn from experts. These learning experiences enabled porting two miniapps to run effectively on NVIDIA GPUs using OpenACC. The first miniapp focused on motifs found in the solver itself and the final ported version runs three times fast ona single V100 compared to a 40 core, dual-socket Intel Skylake node. The speed up in this solverminiapp required multiple design changes including increasing the amount of parallelism available and the amount of work performed in each kernel. The second miniapp focused on overset MPI communication, also saw significant speedups over the CPU implementation using a CUDA-aware MPI implementation through OpenACC. This presentation will discuss our experience at the hackathons, our process of porting the miniapps to run on the GPUs, and several lessons learned throughout.

OpenACC↗

High-Speed Soft-Decision Decoding of Two Reed-Muller Codes

In this research, we have proposed the (64, 40, 8) subcode of the third-order Reed-Muller (RM) code to NASA for high-speed satellite communications. This RM subcode can be used either alone or as an inner code of a concatenated coding system with the NASA standard (255, 233, 33) Reed-Solomon (RS) code as the outer code to achieve high performance (or low bit-error rate) with reduced decoding complexity. It can also be used as a component code in a multilevel bandwidth efficient coded modulation system to achieve reliable bandwidth efficient data transmission. This report will summarize the key progress we have made toward achieving our eventual goal of implementing, a decoder system based upon this code. In the first phase of study, we investigated the complexities of various sectionalized trellis diagrams for the proposed (64, 40, 8) RM subcode. We found a specific 8-trellis diagram for this code which requires the least decoding complexity with a high possibility of achieving a decoding speed of 600 M bits per second (Mbps). The combination of a large number of states and a high data rate will be made possible due to the utilization of a high degree of parallelism throughout the architecture. This trellis diagram will be presented and briefly described. In the second phase of study, which was carried out through the past year, we investigated circuit architectures to determine the feasibility of VLSI implementation of a high-speed Viterbi decoder based on this 8-section trellis diagram. We began to examine specific design and implementation approaches to implement a fully custom integrated circuit (IC) which will be a key building block for a decoder system implementation. The key results will be presented in this report. This report will be divided into three primary sections. First, we will briefly describe the system block diagram in which the proposed decoder is assumed to be operating, and present some of the key architectural approaches being used to implement the system at high speed. Second, we will describe details of the 8-trellis diagram we found to best meet the trade-offs between chip and overall system complexity. The chosen approach implements the trellis for the (64, 40, 8) RM subcode with 32 independent sub-trellises. And third, we will describe results of our feasibility study on the implementation of such an IC chip in CMOS technology to implement one of these sub-trellises.

Lin, Shu↗

Circuit Design Approaches for Implementation of a Subtrellis IC for a Reed-Muller Subcode

In this research, we have proposed the (64, 40, 8) subcode of the third-order Reed-Muller (RM) code to NASA for high-speed satellite communications. This RM subcode can be used either alone or as an inner code of a concatenated coding system with the NASA standard (255, 233, 33) Reed-Solomon (RS) code as the outer code to achieve high performance (or low bit-error rate) with reduced decoding complexity. It can also be used as a component code in a multilevel bandwidth efficient coded modulation system to achieve reliable bandwidth efficient data transmission. This report will summarize the key progress we have made toward achieving our eventual goal of implementing a decoder system based upon this code. In the first phase of study, we investigated the complexities of various sectionalized trellis diagrams for the proposed (64, 40, 8) RM subcode. We found a specific 8-trellis diagram for this code which requires the least decoding complexity with a high possibility of achieving a decoding speed of 600 M bits per second (Mbps). The combination of a large number of states and a high data rate will be made possible due to the utilization of a high degree of parallelism throughout the architecture. This trellis diagram will be presented and briefly described. In the second phase of study which was carried out through the past year, we investigated circuit architectures to determine the feasibility of VLSI implementation of a high-speed Viterbi decoder based on this 8-section trellis diagram. We began to examine specific design and implementation approaches to implement a fully custom integrated circuit (IC) which will be a key building block for a decoder system implementation. The key results will be presented in this report. This report will be divided into three primary sections. First, we will briefly describe the system block diagram in which the proposed decoder is assumed to be operating and present some of the key architectural approaches being used to implement the system at high speed. Second, we will describe details of the 8-trellis diagram we found to best meet the trade-offs between chip and overall system complexity. The chosen approach implements the trellis for the (64, 40, 8) RM subcode with 32 independent sub-trellises. And third, we will describe results of our feasibility study on the implementation of such an IC chip in CMOS technology to implement one of these subtrellises.

Lin, Shu↗

Circuit Design Approaches for Implementation of a Subtrellis IC for a Reed-Muller Subcode

In his research, we have proposed the (64, 40, 8) subcode of the third-order Reed-Muller (RM) code to NASA for high-speed satellite communications. This RM subcode can be used either alone or as an inner code of a concatenated coding system with the NASA standard (255, 233, 33) Reed-Solomon (RS) code as the outer code to achieve high performance (or low bit-error rate) with reduced decoding complexity. It can also be used as a component code in a multilevel bandwidth efficient coded modulation system to achieve reliable bandwidth efficient data transmission. This report will summarize the key progress we have made toward achieving our eventual goal of implementing a decoder system based upon this code. In the first phase of study, we investigated the complexities of various sectionalized trellis diagrams for the proposed (64, 40, 8) RM subcode. We found a specific 8-trellis diagram for this code which requires the least decoding complexity with a high possibility of achieving a decoding speed of 600 M bits per second(Mbps). The combination of a large number of states and a high data rate will be made possible due to the utilization of a high degree of parallelism throughout the architecture. This trellis diagram will be presented and briefly described. In the second phase of study which was carried out through the past year, we investigated circuit architectures to determine the feasibility of VLSI implementation of a high- speed Viterbi decoder based on this 8-section trellis diagram. We began to examine specific design and implementation approaches to implement a fully custom integrated circuit (IC) which will be a key building block for a decoder system implementation. The key results will be presented in this report. This report will be divided into three primary sections. First, we will briefly describe the system block diagram in which the proposed decoder is assumed to be operating and present some of the key architectural approaches being used to implement the system at high speed. Second, we will describe details of the 8-trellis diagram we found to best meet the trade-offs between chip and overall system complexity. The chosen approach implements the trellis for the (64, 40, 8) RM subcode with 32 independent sub-trellises. And third, we will describe results of our feasibility study on the implementation of such an IC chip in CMOS technology to implement one of these subtrellises.

Lin, Shu↗

High-Speed Soft-Decision Decoding of Two Reed-Muller Codes

In his research, we have proposed the (64, 40, 8) subcode of the third-order Reed-Muller (RM) code to NASA for high-speed satellite communications. This RM subcode can be used either alone or as an inner code of a concatenated coding system with the NASA standard (255, 233, 33) Reed-Solomon (RS) code as the outer code to achieve high performance (or low bit-error rate) with reduced decoding complexity. It can also be used as a component code in a multilevel bandwidth efficient coded modulation system to achieve reliable bandwidth efficient data transmission. This report will summarize the key progress we have made toward achieving our eventual goal of implementing a decoder system based upon this code. In the first phase of study, we investigated the complexities of various sectionalized trellis diagrams for the proposed (64, 40, 8) RNI subcode. We found a specific 8-trellis diagram for this code which requires the least decoding complexity with a high possibility of achieving a decoding speed of 600 M bits per second (Mbps). The combination of a large number of states and a hi ch data rate will be made possible due to the utilization of a high degree of parallelism throughout the architecture. This trellis diagram will be presented and briefly described. In the second phase of study which was carried out through the past year, we investigated circuit architectures to determine the feasibility of VLSI implementation of a high-speed Viterbi decoder based on this 8-section trellis diagram. We began to examine specific design and implementation approaches to implement a fully custom integrated circuit (IC) which will be a key building block for a decoder system implementation. The key results will be presented in this report. This report will be divided into three primary sections. First, we will briefly describe the system block diagram in which the proposed decoder is assumed to be operating and present some of the key architectural approaches being used to implement the system at high speed. Second, we will describe details of the 8-trellis diagram we found to best meet the trade-offs between chip and overall system complexity. The chosen approach implements the trellis for the (64, 40, 8) RM subcode with 32 independent sub-trellises. And third, we will describe results of our feasibility study on the implementation of such an IC chip in CMOS technology to implement one of these sub-trellises.

Lin, Shu↗

Applications of Parallel-Element, Embedded Mesh-Cap Acoustic Liner Concepts

This study explores progress achieved with 2DOF, 3DOF, and MDOF acoustic liners constructed with mesh caps embedded within a honeycomb core. These liner configurations offer potential for broadband noise reduction, and are suitable for conventional aircraft implementation. Samples for each configuration are tested in the NASA normal incidence tube and grazing flow impedance tube, with and without a wire mesh facesheet. Impedances based on these measured data compare favorably with those predicted using a transmission line impedance prediction model. Predicted impedances are then used as input for an aeroacoustic propagation code to compute axial acoustic pressure distributions in the grazing flow tube. These predicted distributions compare favorably with the corresponding measured distributions at frequencies away from the frequency of peak attenuation, but suffer slight degradation for frequencies very near the peak attenuation frequency, where the predicted results are sensitive to input impedance changes. As expected, the noise reduction frequency range increases as more degrees of freedom are included. Although the specific results achieved herein may differ from those that would be achieved with other 2DOF, 3DOF, and MDOF liners, this comparison highlights some of the key features that can be exploited in the design of parallel-element, embedded mesh-cap liners.

Jones, M. G.↗

Runtime support for data parallel tasks

We have recently introduced a set of Fortran language extensions that allow for integrated support of task and data parallelism, and provide for shared data abstractions (SDA's) as a method for communications and synchronization among these tasks. In this paper we discuss the design and implementation issues of the runtime system necessary to support these extensions, and discuss the underlying requirements for such a system. To test the feasibility of this approach, we implement a prototype of the runtime system and use this to support an abstract multidisciplinary optimization (MDO) problem for aircraft design. We give initial results and discuss future plans.

Haines, Matthew↗

Fuel Preheat Effects on Soot-Field Structure in Laminar Gas Jet Diffusion Flames Burning in 0-g and 1-g

An experimental investigation conducted at the 2.2-s drop tower of the NASA Lewis Research Center is presented to quantify the influence of moderate fuel preheat on soot-field structure within 0-g laminar gas jet diffusion flames. Parallel work in 1-g is also presented to delineate the effect of elevated fuel temperatures on soot-field structure in buoyant flames. The experimental methodology implements jet diffusion flames of nitrogen-diluted acetylene fuel burning in quiescent air at atmospheric pressure. Fuel preheat of approximately 100 K in the 0-g laminar jet diffusion flames is found to reduce soot loadings in the annular region, but causes an increase in soot volume fractions at the centerline. In addition, fuel preheat reduces the radial extent of the soot field in 0-g. In 1-g, the same fuel preheat levels have a more moderated influence on soot loadings in the annular region, but are also seen to enhance soot concentrations near the axis low in the flame. The increased soot loadings near the flame centerline, as caused by fuel preheat, are consistent with the hypothesis that preheat levels of approximately 100 K enhance fuel pyrolysis rates. The results show that the growth stage of particles transported along the soot annulus is shortened both in 1-g and 0-g when elevated fuel temperatures are used.

Konsur, Bogdan↗

Field-Programmable Gate Array Computer in Structural Analysis: An Initial Exploration

This paper reports on an initial assessment of using a Field-Programmable Gate Array (FPGA) computational device as a new tool for solving structural mechanics problems. A FPGA is an assemblage of binary gates arranged in logical blocks that are interconnected via software in a manner dependent on the algorithm being implemented and can be reprogrammed thousands of times per second. In effect, this creates a computer specialized for the problem that automatically exploits all the potential for parallel computing intrinsic in an algorithm. This inherent parallelism is the most important feature of the FPGA computational environment. It is therefore important that if a problem offers a choice of different solution algorithms, an algorithm of a higher degree of inherent parallelism should be selected. It is found that in structural analysis, an 'analog computer' style of programming, which solves problems by direct simulation of the terms in the governing differential equations, yields a more favorable solution algorithm than current solution methods. This style of programming is facilitated by a 'drag-and-drop' graphic programming language that is supplied with the particular type of FPGA computer reported in this paper. Simple examples in structural dynamics and statics illustrate the solution approach used. The FPGA system also allows linear scalability in computing capability. As the problem grows, the number of FPGA chips can be increased with no loss of computing efficiency due to data flow or algorithmic latency that occurs when a single problem is distributed among many conventional processors that operate in parallel. This initial assessment finds the FPGA hardware and software to be in their infancy in regard to the user conveniences; however, they have enormous potential for shrinking the elapsed time of structural analysis solutions if programmed with algorithms that exhibit inherent parallelism and linear scalability. This potential warrants further development of FPGA-tailored algorithms for structural analysis.

Singleterry, Robert C., Jr.↗

MCM Polarimetric Radiometers for Planar Arrays

A polarimetric radiometer that operates at a frequency of 40 GHz has been designed and built as a prototype of multiple identical units that could be arranged in a planar array for scientific measurements. Such an array is planned for use in studying the cosmic microwave background (CMB). All of the subsystems and components of this polarimetric radiometer are integrated into a single multi-chip module (MCM) of substantially planar geometry. In comparison with traditional designs of polarimetric radiometers, the MCM design is expected to greatly reduce the cost per unit in an array of many such units. The design of the unit is dictated partly by a requirement, in the planned CMB application, to measure the Stokes parameters I, Q, and U of the CMB radiation with high sensitivity. (A complete definition of the Stokes parameters would exceed the scope of this article. In necessarily oversimplified terms, I is a measure of total intensity of radiation, while Q and U are measures of the relationships between the horizontally and vertically polarized components of radiation.) Because the sensitivity of a single polarimeter cannot be increased significantly, the only way to satisfy the high-sensitivity requirement is to make a large array of polarimeters that operate in parallel. The MCM includes contact pins that can be plugged into receptacles on a standard printed-circuit board (PCB). All of the required microwave functionality is implemented within the MCM; any required supporting non-microwave ("back-end") electronic functionality, including the provision of DC bias and control signals, can be implemented by standard PCB techniques. On the way from a microwave antenna to the MCM, the incoming microwave signal passes through an orthomode transducer (OMT), which splits the radiation into an h + i(nu) beam and an h - i(nu) beam (where, using complex-number notation, h denotes the horizontal component, nu denotes the vertical component, and +/-i denotes a +/-90deg phase shift). Each of these beams enters the MCM through one of two WR-22 waveguide input terminals in the lid of the MCM. The h + i(nu0 and h - i(nu) signals are amplified, then fed to a phase-discriminator hybrid designed specifically to fit the predominantly planar character of the MCM geometry and to enable determination of Q and U. The phase-discriminator hybrid generates four outputs, which are detected and used to calculate I, Q, and U.

Kangaslahti, Pekka↗

WGM Temperature Tracker

This software implements digital control of a WGM (whispering-gallerymode) resonator temperature based on the dual-mode approach. It comprises one acquisition (dual-channel) and three control modules. The interaction of the proportional-integral loops is designed in the original way, preventing the loops from fighting. The data processing is organized in parallel with the acquisition, which allows the computational overhead time to be suppressed or often completely avoided. WGM resonators potentially provide excellent optical references for metrology, clocks, spectroscopy, and other applications. However, extremely accurate (below micro-Kelvin) temperature stabilization is required. This software allows one specifically advantageous method of such stabilization to be implemented, which is immune to a variety of effects that mask the temperature variation. WGM Temperature Tracker 2.3 (see figure) is a LabVIEW code developed for dual-mode temperature stabilization of WGM resonators. It has allowed for the temperature stabilization at the level of 200 nK with one-second integration time, and 6 nK with 10,000-second integration time, with the above room-temperature set point. This software, in conjunction with the appropriate hardware, can be used as a noncryogenic temperature sensor/ controller with sub-micro-Kelvin sensitivity, which at the time of this reporting considerably outperforms the state of the art.

Strekalov, Dmitry V.↗

Computational Investigation of Retropropulsion Operating Environments with a GPU-Enabled Detached Eddy Simulation Approach

Human exploration of the surface of Mars will require an extended powered descent phase of flight, during which aerodynamic-propulsive interference effects can be significant. Characterization of these environments to enable implementation of this technology into a flight vehicle will rely heavily on computational simulation. This work advances the understanding of retropropulsion aerodynamics through application of a massively parallel detached eddy simulation approach on a GPU-accelerated computational framework, yielding data that are largely unachievable with conventional high-performance computing resources. This work includes time-dependent and time-averaged forces and moments on a conceptual, full-scale vehicle in environments and operating conditions relevant to human Mars exploration. Conditions are examined where the engine exhaust flow transitions between over-expanded and under-expanded flow structures, and flight operation will require the ability to maintain control of the vehicle during such a transition. These transitions occur as the vehicle decelerates, and as such, this investigation includes supersonic, transonic, and subsonic flight conditions. Options for vehicle control during powered flight include differential throttling of the engines. This paper provides an overview of the computational campaign, approach, and discussion of results in characterizing the resulting aerodynamics for differential throttling with retropropulsion in atmospheric environments.

EDL↗

An improved multilevel optimization approach for the design of complex engineering systems

Multilevel optimization methods are being considered for the design of complex systems on distributed networks of computers or even parallel processors. An obstacle to the use of multilevel methods is that they can be computationally expensive because of the cycling necessary to account for the coupling between the subproblems. This research effort aims at increasing the efficiency of multilevel optimization by adapting two techniques that are widely used in conventional one-level optimization: constraint approximation and temporary constraint deletion. These improvements are implemented and tested on three-, ten- and 52-bar planar truss designs. The results show that for larger problems (approximately 100 design variables and larger), the cost of analysis dominates the total cost so that multilevel optimization is no more expensive than one-level optimization. If parallel processing is used or the analysis process itself is decomposed, then multilevel optimization stands to become more economical than one-level optimization.

Barthelemy, J.-F. M.↗

Implementing Distributed Operations: A Comparison of Two Deep Space Missions

Two very different deep space exploration missions--Mars Exploration Rover and Cassini--have made use of distributed operations for their science teams. In the case of MER, the distributed operations capability was implemented only after the prime mission was completed, as the rovers continued to operate well in excess of their expected mission lifetimes; Cassini, designed for a mission of more than ten years, had planned for distributed operations from its inception. The rapid command turnaround timeline of MER, as well as many of the operations features implemented to support it, have proven to be conducive to distributed operations. These features include: a single science team leader during the tactical operations timeline, highly integrated science and engineering teams, processes and file structures designed to permit multiple team members to work in parallel to deliver sequencing products, web-based spacecraft status and planning reports for team-wide access, and near-elimination of paper products from the operations process. Additionally, MER has benefited from the initial co-location of its entire operations team, and from having a single Principal Investigator, while Cassini operations have had to reconcile multiple science teams distributed from before launch. Cassini has faced greater challenges in implementing effective distributed operations. Because extensive early planning is required to capture science opportunities on its tour and because sequence development takes significantly longer than sequence execution, multiple teams are contributing to multiple sequences concurrently. The complexity of integrating inputs from multiple teams is exacerbated by spacecraft operability issues and resource contention among the teams, each of which has their own Principal Investigator. Finally, much of the technology that MER has exploited to facilitate distributed operations was not available when the Cassini ground system was designed, although later adoption of web-based and telecommunication tools has been critical to the success of Cassini operations.

Cassini Mission↗