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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 127 records · Page 7
All sourcesNASA NTRSDOE OSTI
DOE OSTI2025

Effect of particle size and moisture on flow performance of loblolly pine anatomical fractions: Experimental findings and model predictions

The rising energy demand has highlighted biomass as a promising next-generation energy source. However, commercializing biomass-derived energy faces challenges, particularly in handling biomass feedstock. Factors like particle size, shape, moisture content, and surface roughness significantly impact biomass flowability. This study addresses a crucial knowledge gap by examining the effects of particle size and moisture content on the flow behavior and shear properties of different anatomical fractions of loblolly pine (Pinus taeda). The bulk shear behavior was examined using a Schulze ring shear tester, while flow performance was tested through gravity-driven flow experiments in a variable wedge-shape hopper. Results were incorporated into empirical and machine learning-based flow prediction models to evaluate their accuracy and limitations. The study found that samples with higher moisture content show higher unconfined yield strength. The critical arching distance increased with particle size, e.g., from approximately 13 and 33 mm for 2- and 6-mm whole chips, respectively at a 32-degree inclination angle. Conversely, the flow rate decreased for a given hopper opening as particle size increased. For instance, at a 60-mm hopper opening and a 32-degree inclination angle, the mass flow rates for 2- and 6-mm whole chips were 7.83 and 6.42 tonne/h, respectively. The empirical model consistently overpredicted the mass flow rate for all anatomical fractions, while the machine learning model more accurately predicted the central tendency of flow rate but was insensitive to varying tissue proportions. These novel findings provide comprehensive characterization of anatomical fractions, reveal significant combined effects of particle size and moisture content on biomass flow behavior, and demonstrate a better predictive accuracy of a machine learning model, all of which are useful for optimizing material handling strategies and biomass utilization technologies in the industry.

09 - BIOMASS FUELS↗
DOE OSTI2025

Pool boiling heat transfer evaluation of next-generation dielectric fluid: Opteon™ 2P50

The growing use of artificial intelligence has led to heavy thermal loads and high heat dissipation rates in data centers. Conventional air-cooled technologies are not able to fulfill these requirements. To overcome these challenges, two-phase immersion cooling (2PIC) has emerged as one of the leading technologies for high power-density chips. 2PIC increases the heat dissipation rate and efficiency of the system while reducing the footprint of the cooling equipment. A fluid with adequate dielectric properties, a suitable normal boiling temperature to maintain chip temperatures, and good material compatibility, is desired for 2PIC system. In this study, the pool boiling heat transfer of a new developmental dielectric fluid, Opteon™ 2P50, was experimentally investigated. The heat transfer coefficients at various heat fluxes (20–150 kW/m 2 ) and the critical heat flux were measured using a smooth aluminum surface. Compared with HFE-7100, Opteon™ 2P50 shows higher heat transfer coefficient (up to 59% higher) and a slightly lower value of critical heat flux (around 5.9% lower). The modified Cooper correlation with the optimized leading constant resulted in reliable prediction accuracy with a 5.3% mean absolute error percentage. Overall, these results indicate that the new dielectric fluid provides similar thermal performance to some legacy fluids.

2P50↗
DOE OSTI2024

Microstructure analysis and machinability of additively manufactured A205 aluminum with heat treatments

A205 aluminum is one of the few high-strength aluminum alloys discovered for additive manufacturing (AM). The microstructure and heat treatment effects of AM A205 vary from those of its cast form, indicating possible differences in machinability during post-processing. Here, the objective of this research is to determine these variations of AM A205 and their effects on machinability using the cast condition as the baseline. As built and two heat-treated conditions (solution treatment and age hardening) were applied and compared in terms of their microstructures, micro-hardness, and machinability including vibration, specific cutting energy, chip morphology, and surface finish. The effects of print orientations on machinability were tested as well and found to be insignificant. AM as built had a higher hardness and slightly better machinability than its cast as built cast counterpart due to a smaller grain size (1 µm vs. 15 µm), eutectic θ-Al 2 Cu lattice and a fine, homogeneous TiB 2 distribution. The solution treatment dissolved this θ-Al 2 Cu lattice and increased the grain size (3 µm) which decreased the hardness, increased the ductility seen in the chips, and reduced the overall machinability. The presence of θ’-Al 2 Cu precipitates improved the machinability of aged AM A205. In addition, it was found that A205 exhibited both ductile and brittle behavior depending on the cutting speed, thus producing different machinability. The speed dependency is related to the material condition and heat treatment.

36 MATERIALS SCIENCE↗
DOE OSTI2026

Evaluation of 3D pixel silicon sensors for the CMS Phase-2 Inner Tracker

The high-luminosity upgrade of the CERN LHC requires the replacement of the CMS tracking detector to cope with the increased radiation fluence while maintaining its excellent performance. An extensive R&D program, aiming at using 3D pixel silicon sensors in the innermost barrel layer of the detector, has been carried out by CMS in collaboration with the FBK (Trento, Italy) and CNM (Barcelona, Spain) foundries. The sensors will feature a pixel cell size of 25 × 100 µm 2 , with a centrally located electrode connected to the readout chip. The sensors are read out by the RD53A and CROCv1 chips, developed in 65 nm CMOS technology by the RD53 Collaboration, a joint effort between the ATLAS and CMS groups. This paper reports the results achieved in beam test experiments before and after irradiation, up to a fluence of approximately 2 . 6 × 1 0 16 n eq /cm 2 . Measurements of assemblies irradiated to a fluence of 1 × 10 16 n˙eq/cm 2 show a hit detection efficiency higher than 96% at normal incidence, with fewer than 2% of channels masked, across a bias voltage range greater than 50 V . Even after irradiation to a higher fluence of 1.6 × 10 16 n˙eq/cm 2 , similar performance is maintained over a bias voltage range of 30 V , remaining well within CMS requirements.

3D pixel↗
DOE OSTI2025

Synchronous detection of cosmic rays and correlated errors in superconducting qubit arrays

Quantum information processing at scale will require sufficiently stable and long-lived qubits, likely enabled by error-correction codes. Several recent superconducting-qubit experiments, however, reported observing intermittent spatiotemporally correlated errors that would be problematic for conventional codes, with ionizing radiation being a likely cause. Here, we directly measured the cosmic-ray contribution to spatiotemporally correlated qubit errors. We accomplished this by synchronously monitoring cosmic-ray detectors and qubit energy-relaxation dynamics of 10 transmon qubits distributed across a 5 × 5 × 0.35 mm 3 silicon chip. Cosmic rays caused correlated errors at a rate of $1/\left(592\begin{array}{c}+48\\ -41\end{array}\,{\rm{s}}\right)$, accounting for 17.1 ± 1.3% of all such events. Our qubits responded to essentially all of the cosmic rays and their secondary particles incident on the chip, consistent with the independently measured arrival flux. Moreover, we observed that the landscape of the superconducting gap in proximity to the Josephson junctions dramatically impacts the qubit response to cosmic rays. Given the practical difficulties associated with shielding cosmic rays, our results indicate the importance of radiation hardening—for example, superconducting gap engineering—to the realization of robust quantum error correction.

Science & Technology - Other Topics↗
DOE OSTI2026

Milliwatt-level UV generation using sidewall poled lithium niobate

Integrated coherent sources of ultra-violet (UV) light are essential for a wide range of applications, from ion-based quantum computing and optical clocks to gas sensing and microscopy. Recently, approaches that use frequency upconversion have received considerable attention. Among these, the integrated thin-film lithium niobate (TFLN) photonic platform shows particular promise. However, to date, the high propagation losses and lack of reliable techniques for consistent poling of cm-long waveguides with small poling periods have impeded progress. Here, we present a sidewall poled lithium niobate (SPLN) waveguide approach that overcomes these obstacles and results in a two-orders-of-magnitude increase in generated UV power. We demonstrate SPLN waveguides featuring record-low propagation losses of 2.3 dB/cm, complete domain inversion across the waveguide cross-section, and an optimum 50% duty cycle, resulting in a record-high normalized conversion efficiency of 5050%W$^{−1}$cm$^{−2}$, and 4.2 mW of generated on-chip power at 390 nm wavelength. This advancement makes the TFLN platform a viable option for high-quality on-chip UV generation, benefiting emerging applications.

Franken, C. A.A. [Harvard U.; Twente U., Enschede]↗
DOE OSTI2024

Axon-like active signal transmission

Any electrical signal propagating in a metallic conductor loses amplitude due to the natural resistance of the metal. Compensating for such losses presently requires repeatedly breaking the conductor and interposing amplifiers that consume and regenerate the signal. This century-old primitive severely constrains the design and performance of modern interconnect-dense chips. Here we present a fundamentally different primitive based on semi-stable edge of chaos (EOC), a long-theorized but experimentally elusive regime that underlies active (self-amplifying) transmission in biological axons. By electrically accessing the spin crossover in LaCoO 3 , we isolate semi-stable EOC, characterized by small-signal negative resistance and amplification of perturbations. In a metallic line atop a medium biased at EOC, a signal input at one end exits the other end amplified, without passing through a separate amplifying component. While superficially resembling superconductivity, active transmission offers controllably amplified time-varying small-signal propagation at normal temperature and pressure, but requires an electrically energized EOC medium. Operando thermal mapping reveals the mechanism of amplification—bias energy of the EOC medium, instead of fully dissipating as heat, is partly used to amplify signals in the metallic line, thereby enabling spatially continuous active transmission, which could transform the design and performance of complex electronic chips.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗
DOE OSTI2025

An electro-optical Mott neuron based on niobium dioxide

Various applications—including brain-like computing and on-chip artificial vision—increasingly demand a combination of electronic and photonic techniques. However, integrating both approaches on a single chip is challenging, and solutions typically rely on disparate components with power-hungry signal conversions. Here, in this paper, we report electro-optical Mott neurons that combine visible light emission with electrical threshold switching, as well as neuron-like oscillations. The devices are based on thin films of sputtered niobium dioxide (NbO 2 ), a Mott insulator–metal transition material, operating at room temperature and emitting light that peaks around 810 nm. Operando measurements reveal an electronic origin to the light emission: charge carrier relaxation initiated by high-field transport in the NbO 2 . Our devices combine electrical and optical functions within a single material, thereby expanding the options available for future artificial intelligence hardware.

electrical engineering↗
DOE OSTI2024

Fault localization in a microfabricated surface ion trap using diamond nitrogen-vacancy center magnetometry

Here, as quantum computing hardware becomes more complex with ongoing design innovations and growing capabilities, the quantum computing community needs increasingly powerful techniques for fabrication failure root-cause analysis. This is especially true for trapped-ion quantum computing. As trapped-ion quantum computing aims to scale to thousands of ions, the electrode numbers are growing to several hundred, with likely integrated photonic components also adding to the electrical and fabrication complexity, making faults even harder to locate. In this work, we used a high-resolution quantum magnetic imaging technique, based on nitrogen-vacancy centers in diamond, to investigate short-circuit faults in an ion trap chip. We imaged currents from these short-circuit faults to ground and compared them to intentionally created faults, finding that the root cause of the faults was failures in the on-chip trench capacitors. This work, where we exploited the performance advantages of a quantum magnetic sensing technique to troubleshoot a piece of quantum computing hardware, is a unique example of the evolving synergy between emerging quantum technologies to achieve capabilities that were previously inaccessible.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2024

Plasma sources for advanced semiconductor applications

Semiconductors are the foundation of modern technology, used in our personal, industrial, and military-grade devices. Further, every aspect of U.S. society is closely tied to semiconductors, and our economy cannot progress at the current pace with existing chip manufacturing methods as chip features approach an atomistic scale.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗
DOE OSTI2025

A scanning resonator for probing quantum coherent devices

Superconducting resonators with high quality factors are extremely sensitive detectors of the complex impedance of materials and devices coupled to them. This capability has been used to measure losses in multiple different materials and, in the case of circuit quantum electrodynamics (circuit QED), has been used to measure the coherent evolution of multiple different types of qubits. Here, we report on the implementation of a scanning resonator for probing quantum coherent devices. Our scanning setup enables tunable coherent coupling to systems of interest without the need for fabricating on-chip superconducting resonators. We measure the internal quality factor of our resonator sensor in the single-photon regime to be >104 and demonstrate capacitive imaging using our sensor with zeptoFarad sensitivity and micron spatial resolution at milliKelvin temperatures. We then use our setup to characterize the energy spectrum and coherence times of multiple transmon qubits with no on-chip readout circuitry. Our experiments introduce a new tool for using circuit QED to measure existing and proposed qubit platforms.

47 OTHER INSTRUMENTATION↗
DOE OSTI2026

Identifying materials-level sources of performance variation in superconducting transmon qubits

The Superconducting Quantum Materials and Systems Center, a U. S. Department of Energy National Quantum Information Science Research Center, has conducted a comprehensive and coordinated study using superconducting transmon qubit chips with known performance metrics to identify the underlying materials-level sources of device-to-device performance variation. Following qubit coherence measurements, these qubits of varying base superconducting metals and substrates have been examined with various non-destructive and invasive material characterization techniques at Northwestern University, Ames National Laboratory, and Fermilab as part of a blind study. We find trends in variations of the depth of the etched substrate trench, the thickness of the surface oxide, and the geometry of the sidewall, which when combined, lead to correlations with the T1 lifetime across different qubits on the same chip. In addition, we provide a list of features that varied from device to device, for which the impact on performance requires further studies. Finally, we identify two low-temperature characterization techniques that may potentially serve as proxy tools for qubit measurements. These insights provide materials-oriented solutions to not only reduce performance variations across neighboring devices but also to engineer and fabricate devices with optimal geometries to achieve performance metrics beyond the state-of-the-art values.

Murthy, Akshay A. [Fermilab] (ORCID:00000001767768↗
DOE OSTI2024

Investigating resource-efficient neutron/gamma classification ML models targeting eFPGAs

There has been considerable interest and resulting progress in implementing machine learning (ML) models in hardware over the last several years from the particle and nuclear physics communities. A big driver has been the release of the Python package, hls4ml, which has enabled porting models specified and trained using Python ML libraries to register transfer level (RTL) code. So far, the primary end targets have been commercial field-programmable gate arrays (FPGAs) or synthesized custom blocks on application specific integrated circuits (ASICs). However, recent developments in open-source embedded FPGA (eFPGA) frameworks now provide an alternate, more flexible pathway for implementing ML models in hardware. These customized eFPGA fabrics can be integrated as part of an overall chip design. In general, the decision between a fully custom, eFPGA, or commercial FPGA ML implementation will depend on the details of the end-use application. In this work, we explored the parameter space for eFPGA implementations of fully-connected neural network (fcNN) and boosted decision tree (BDT) models using the task of neutron/gamma classification with a specific focus on resource efficiency. We used data collected using an AmBe sealed source incident on Stilbene, which was optically coupled to an OnSemi J-series silicon photomultiplier (SiPM) to generate training and test data for this study. We investigated relevant input features and the effects of bit-resolution and sampling rate as well as trade-offs in hyperparameters for both ML architectures while tracking total resource usage. The performance metric used to track model performance was the calculated neutron efficiency at a gamma leakage of 10 -3 . The results of the study will be used to aid the specification of an eFPGA fabric, which will be integrated as part of a test chip.

47 OTHER INSTRUMENTATION↗
DOE OSTI2025

GRAPH — an readout ASIC for large MCP based detectors

We present a programmable 16 channel, mixed signal, low power readout ASIC, having the project historically named Gigasample Recorder of Analog waveforms from a PHotodetector (GRAPH). It is designed to read large aperture single photon imaging detectors using micro channel plates for charge multiplication, and measuring the detector's response on crossed strips anodes to extrapolate the incoming photon position. Each channel consists of a fast, low power and low noise charge sensitive amplifier, which provides a myriad of coarse and fine programmable options for gain and shaping settings. Further, the amplified signal is recorded using, to our knowledge novel, the Hybrid Universal sampLing Architecture (HULA) ADC. A kind of mixed signal double buffer memory, that enables concurrent waveform recording, and selected event digitized data extraction. The sampling frequency is freely adjustable between few kHz up to 125 MHz, while the chip's internal digital memory holds a history 2048 samples for each channel, with a digital headroom of 12 bits. An optimized region of interest sample-read algorithm allows to extract the information just around the event pulse peak, while selecting the next event, thus substantially reducing the operational dead time. The chip is designed in 130 nm TSMC CMOS technology, and its power consumption is around 47 mW per channel.

47 OTHER INSTRUMENTATION↗
DOE OSTI2024

Stacked-Die SiC Half-Bridge Module with Minimum Loop Inductance

Minimizing parasitic inductance of power modules is needed to advance their electrical performance. Innovation in the past decade has driven down the inductance of SiC half-bridge power modules to around 1–2 nH by using multilayer, embedded, and hybrid structures. Further reduction becomes difficult, mainly limited by the excessive interconnects required for the planar placement of vertical conducting chips. To address this, a vertically stacked-die approach is proposed in this paper, taking advantage of the vertical conducting nature of the SiC chips. With ceramic decoupling capacitors integrated, 0.48 nH overall loop inductance is achieved and validated by experimental measurement. This paper also discusses potential approaches to further reduce the inductance.

Ribeiro, Pedro↗
DOE OSTI2025

JACC.shared: Leveraging HPC Metaprogramming and Performance Portability for Computations That Use Shared Memory GPUs

In this work, we present JACC.shared, a new feature of Julia for ACCelerators (JACC), which is the performanceportable and metaprogramming model of the just-in-time and LLVM-based Julia language. This new feature allows JACC applications to leverage the high-performance computing (HPC) capabilities of high-bandwidth, on-chip GPU memory. Historically, exploiting high-bandwidth, shared-memory GPUs has not been a priority for high-level programming solutions. JACC.shared covers that gap for the first time, thereby providing a highlevel, portable, and easy-to-use solution for programmers to exploit this memory and supporting all current major accelerator architectures. Well-known HPC and AI workloads, such as multi/hyperspectral imaging and AI convolutions, have been used to evaluate JACC.shared on two exascale GPU architectures hosted by some of the most powerful US Department of Energy supercomputers: Perlmutter (NVIDIA A100) and Frontier (AMD MI250X). The performance evaluation reports speedup of up to 3.5× by adding only one line of code to the base codes, thus providing important accelerators in a simple, portable, and transparent way and elevating the programming productivity and performance-portability capabilities for Julia/JACC HPC, AI, and scientific applications.

Valero Lara, Pedro [ORNL] (ORCID:0000000214794310)↗
DOE OSTI2025

ETROC2 as the Final Version for CMS MTD Endcap Timing Layer (ETL) Upgrade

The ETROC2 is the first full-size full-functionality prototype design fully compatible with the final chip specifications for CMS ETL. The ETROC2 chips have been extensively tested and the results have been presented at IEEE NSS MIC RTSD 2024. We will present here new results including the bump bonding yield improvement study, the time walk correction (TWC) generality study with single pixel TWC applied to all pixels, the final SEU testing results using both heavy ion and proton beam, more beam test studies including different sensors and irradiated sensors, and readiness for the ETROC2 production for CMS ETL upgrade.

Liu, Tie Hui [Fermilab] (ORCID:0009000765225605)↗
DOE OSTI2026

Versatile High-Gain Low-Noise Readout ASIC for Silicon Microstrip Tracking Detectors

This work presents Turpial, a custom-designed low- power front-end readout ASIC for microstrip silicon sensors. Implemented in 130 nm CMOS technology, the chip integrates 64 identical readout channels, each including a configurable charge-sensitive amplifier, a bipolar pulse shaper, a 32-sample 50 Msps analog memory, and a 12-bit RC-hybrid SAR ADC operating at 1 Msps. To satisfy the target power budget of 5 mW per channel, the architecture employs a time-decoupled readout scheme in which fast transient signals are first captured in the analog memory and subsequently digitized at a lower rate. Turpial supports a wide dynamic range from 1 kℎ+ to 1 Mℎ+ while maintaining low noise performance, targeting an equivalent noise charge (ENC) below 200 𝑒−including the sensor, and providing a maximum gain of 1500 mV/fC. A digital block manages slow control, data acquisition, and data serialization through dual CML 300 Mb/s serializers. In addition, an on-chip reference circuit, based on a sub-1 V bandgap reference and an integrated LDO regulator, eliminates the need for external reference circuitry. Experimental results demonstrate that both the individual building blocks and the fully integrated ASIC meet the design specifications.

Hernandez, Hugo [Stanford University] (ORCID:00000↗