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At least 127 records · Page 7

Parallelized direct execution simulation of message-passing parallel programs

As massively parallel computers proliferate, there is growing interest in findings ways by which performance of massively parallel codes can be efficiently predicted. This problem arises in diverse contexts such as parallelizing computers, parallel performance monitoring, and parallel algorithm development. In this paper we describe one solution where one directly executes the application code, but uses a discrete-event simulator to model details of the presumed parallel machine such as operating system and communication network behavior. Because this approach is computationally expensive, we are interested in its own parallelization specifically the parallelization of the discrete-event simulator. We describe methods suitable for parallelized direct execution simulation of message-passing parallel programs, and report on the performance of such a system, Large Application Parallel Simulation Environment (LAPSE), we have built on the Intel Paragon. On all codes measured to date, LAPSE predicts performance well typically within 10 percent relative error. Depending on the nature of the application code, we have observed low slowdowns (relative to natively executing code) and high relative speedups using up to 64 processors.

Dickens, Phillip M.↗

A fault-tolerant network architecture for integrated avionics

The Army Fault-Tolerant Architecture (AFTA) under construction at the Charles Stark Draper Laboratory is an example of a highly integrated critical avionics system. The AFTA system must connect to other redundant and nonredundant systems, as well as to input/output devices. A fault-tolerant data bus (FTDB) is being developed to provide highly reliable communication between the AFTA computer and other network stations. The FTDB is being designed for Byzantine resilience and is probably capable of tolerating any single arbitrary fault. The author describes a prototype architecture for the fault-tolerant data bus.

Butler, Bryan↗

The EDSN Intersatellite Communications Architecture

The Edison Demonstration of Smallsat Networks (EDSN) is a swarm of eight 1.5U Cubesats developed by the NASA Ames Research Center under the Small Spacecraft Technology Program (SSTP) within NASA Space Technology Mission Directorate (STMD). EDSN, scheduled for launch in late 2014, is designed to explore the use of small spacecraft networks to make synchronized, multipoint scientific measurements, and to organize and pass those data to the ground through their network. Networked swarms of these small spacecraft will open new horizons in astronomy, Earth observations and solar physics. Their range of applications include the formation of synthetic aperture radars for Earth sensing systems, large aperture observatories for next generation telescopes and the collection of spatially distributed measurements of time varying systems, probing the Earth's magnetosphere, Earth-Sun interactions and the Earth's geopotential. The EDSN communications network is maintained and operated by a simple set of predefined rules operating independently on all eight spacecraft without direction from ground based systems. One spacecraft serves as a central node, requesting and collecting data from the other seven spacecraft, organizing the data and passing it to a ground station at regular intervals. The central node is rotated among the spacecraft on a regular basis, providing robustness against the failure of a single spacecraft. This paper describes the communication architecture of the EDSN network and its operation with small spacecraft of limited electrical power, computing power and communication range. Furthermore, the problems of collecting and prioritizing data through a system that has data throughput bottlenecks are addressed. Finally, future network enhancements that can be built on top of the current EDSN hardware are discussed.

Communications↗

NASA/DOD Aerospace Knowledge Diffusion Research Project. Paper 39: The role of computer networks in aerospace engineering

This paper presents selected results from an empirical investigation into the use of computer networks in aerospace engineering. Such networks allow aerospace engineers to communicate with people and access remote resources through electronic mail, file transfer, and remote log-in. The study drew its subjects from private sector, government and academic organizations in the U.S. aerospace industry. Data presented here were gathered in a mail survey, conducted in Spring 1993, that was distributed to aerospace engineers performing a wide variety of jobs. Results from the mail survey provide a snapshot of the current use of computer networks in the aerospace industry, suggest factors associated with the use of networks, and identify perceived impacts of networks on aerospace engineering work and communication.

Bishop, Ann P.↗

High speed network issues in a distributed visualization application

The author examines the issues in creating an UltraNet TCP/IP socket-based distributed application. The visualization computation is performed on a Connection Machine, and the results are rendered using a Silicon Graphics 4D/320 VGX workstation. The UltraNet network facilitates high-bandwidth communication between the computers. Ideally, taking advantage of the UltraNet is no more complex than developing TCP/IP and UNIX BSD socket-type applications on a single machine. In practice, there are several problems in developing an application using the UltraNet. The author identifies potential problems and discusses techniques for overcoming them. The performance of UltraNet communication is measured and found to be 10 MB/s for SGI 4D/320 workstations.

Krystynak, John↗

Design of a reconfigurable modular manipulator system

Using manipulators with a fixed configuration for specific tasks is appropriate when the task requirements are known beforehand. However, in less predictable situations, such as an outdoor construction site or aboard a space station, a manipulator system requires a wide range of capabilities, probably beyond the limitations of a single, fixed-configuration manipulator. To fulfill this need, researchers have been working on a Reconfigurable Modular Manipulator System (RMMS). Researchers have designed and are constructing a prototype RMMS. The prototype currently consists of two joint modules and four link modules. The joints utilize a conventional harmonic drive and torque motor actuator, with a small servo amplifier included in the assembly. A brushless resolver is used to sense the joint position and velocity. For coupling the modules together, a standard electrical connector and V-band clamps for mechanical connection are used, although more sophisticated designs are under way for future versions. The joint design yields an output torque to 50 ft-lbf at joint speeds up to 1 radian/second. The resolver and associated electronics have resolutions of 0.0001 radians, and absolute accuracies of plus or minus 0.001 radians. Manipulators configured from these prototype modules will have maximum reaches in the 0.5 to 2 meter range. The real-time RMMS controller consists of a Motorola 68020 single-board computer which will perform real time servo control and path planning of the manipulator. This single board computer communicates via shared memory with a SUN3 workstation, which serves as a software development system and robot programming environment. Researchers have designed a bus communication network to provide multiplexed communication between the joint modules and the computer controller. The bus supports identification of modules, sensing of joint states, and commands to the joint actuator. This network has sufficient bandwidth to allow servo sampling rates in excess of 500 Hz.

Schmitz, D.↗

Integrated Circuit Chip Improves Network Efficiency

Prior to 1999 and the development of SpaceWire, a standard for high-speed links for computer networks managed by the European Space Agency (ESA), there was no high-speed communications protocol for flight electronics. Onboard computers, processing units, and other electronics had to be designed for individual projects and then redesigned for subsequent projects, which increased development periods, costs, and risks. After adopting the SpaceWire protocol in 2000, NASA implemented the standard on the Swift mission, a gamma ray burst-alert telescope launched in November 2004. Scientists and developers on the James Webb Space Telescope further developed the network version of SpaceWire. In essence, SpaceWire enables more science missions at a lower cost, because it provides a standard interface between flight electronics components; new systems need not be custom built to accommodate individual missions, so electronics can be reused. New protocols are helping to standardize higher layers of computer communication. Goddard Space Flight Center improved on the ESA-developed SpaceWire by enabling standard protocols, which included defining quality of service and supporting plug-and-play capabilities. Goddard upgraded SpaceWire to make the routers more efficient and reliable, with features including redundant cables, simultaneous discrete broadcast pulses, prevention of network blockage, and improved verification. Redundant cables simplify management because the user does not need to worry about which connection is available, and simultaneous broadcast signals allow multiple users to broadcast low-latency side-band signal pulses across the network using the same resources for data communication. Additional features have been added to the SpaceWire switch to prevent network blockage so that more robust networks can be designed. Goddard s verification environment for the link-and-switch implementation continuously randomizes and tests different parts, constantly anticipating situations, which helps improve communications reliability. It has been tested in many different implementations for compatibility.

Source record↗

Optical Backplane Interconnection

Optical backplane interconnection (OBIT), method of optically interconnecting many parallel outputs from data processor to many parallel inputs of other data processors by optically changing wavelength of output optical beam. Requires only one command: exact wavelength necessary to make connection between two desired processors. Many features, including smallness advantageous to incorporate OBIT into integrated optical device. Simplifies or eliminates wiring and speeds transfer of data over existing electrical or optical interconnections. Computer hookups and fiber-optical communication networks benefit from concept.

Hendricks, Herbert D.↗

MEDUSA - An overset grid flow solver for network-based parallel computer systems

Continuing improvement in processing speed has made it feasible to solve the Reynolds-Averaged Navier-Stokes equations for simple three-dimensional flows on advanced workstations. Combining multiple workstations into a network-based heterogeneous parallel computer allows the application of programming principles learned on MIMD (Multiple Instruction Multiple Data) distributed memory parallel computers to the solution of larger problems. An overset-grid flow solution code has been developed which uses a cluster of workstations as a network-based parallel computer. Inter-process communication is provided by the Parallel Virtual Machine (PVM) software. Solution speed equivalent to one-third of a Cray-YMP processor has been achieved from a cluster of nine commonly used engineering workstation processors. Load imbalance and communication overhead are the principal impediments to parallel efficiency in this application.

Smith, Merritt H.↗

Considerations for Multiprocessor Topologies

Choosing a multiprocessor interconnection topology may depend on high-level considerations, such as the intended application domain and the expected number of processors. It certainly depends on low-level implementation details, such as packaging and communications protocols. The authors first use rough measures of cost and performance to characterize several topologies. They then examine how implementation details can affect the realizable performance of a topology.

INTERPROCESSOR COMMUNICATION↗

Standard Spacecraft Interfaces and IP Network Architectures: Prototyping Activities at the GSFC

Advancements in fright semiconductor technology have opened the door for IP-based networking in spacecraft architectures. The GSFC believes the same signlJicant cost savings gained using MIL-STD-1553/1773 as a standard low rate interface for spacecraft busses cun be realized for highspeed network interfaces. To that end, GSFC is developing hardware and software to support a seamless, space mission IP network based on Ethernet and MIL-STD-1553. The Ethernet network shall connect all fright computers and communications systems using interface standards defined by the CCSDS Standard Onboard InterFace (SOIF) Panel. This paper shall discuss the prototyping effort underway at GSFC and expected results.

Schnurr, Richard↗

Designing and Building a Crew-Centric Mobile Scheduling and Planning Tool for Exploring Crew Autonomy Concepts Onboard the International Space Station

During 2015, as part of our ongoing research on crew autonomy, our team adapted and extended the plan viewing tool, Playbook, into a mobile tool for exploring crew autonomy onboard the International Space Station (ISS). This work enables crewmembers to intuitively re-plan and schedule on their own with limited input from mission control. Designed for ease of use, re-planning is composed of simple drag and drop interactions and learning the tool requires little to no training. Playbook was successfully uplinked onto ISS as a technology demonstration and completed its onboard ground and crew checkouts in August and September 2015, respectively. We will discuss and describe how Playbook was able to integrate with actual ISS operational plans and operational procedures without disrupting real mission operations. This work will also outline the design and technical constraints required to build a collaborative tool that allows multiple users to simultaneously self-schedule and synchronize during communication dropouts in the restricted networking and computing environment onboard ISS. Finally, we will explore the aspects of crew autonomy that this technology enables as well as discuss our next steps and possible extensions.

ISS↗

Implementing direct, spatially isolated problems on transputer networks

Parametric studies were performed on transputer networks of up to 40 processors to determine how to implement and maximize the performance of the solution of problems where no processor-to-processor data transfer is required for the problem solution (spatially isolated). Two types of problems are investigated a computationally intensive problem where the solution required the transmission of 160 bytes of data through the parallel network, and a communication intensive example that required the transmission of 3 Mbytes of data through the network. This data consists of solutions being sent back to the host processor and not intermediate results for another processor to work on. Studies were performed on both integer and floating-point transputers. The latter features an on-chip floating-point math unit and offers approximately an order of magnitude performance increase over the integer transputer on real valued computations. The results indicate that a minimum amount of work is required on each node per communication to achieve high network speedups (efficiencies). The floating-point processor requires approximately an order of magnitude more work per communication than the integer processor because of the floating-point unit's increased computing capacity.

Ellis, Graham K.↗

Quad-Port Transceivers For A Dual-CRR LAN

Quad-port fiber-optic transceivers demonstrated successfully as physical-layer interface units in WhisperNet - local-area network (LAN) of computers and other devices in communication with each other. Each node of Dual-CRR LAN contains quad-port transceiver serving four pairs of optical fibers. Quad-port transceiver consists of two dual-port transceivers and ancillary equipment in compact package. Transceiver serves as interface between optical fibers and external computing devices. Because of high reliability, availability and "fail-soft" nature, network well suited to military and critical commercial applications.

Wiencko, Joseph A., Jr.↗

Topology design and performance analysis of an integrated communication network

A research study on the topology design and performance analysis for the Space Station Information System (SSIS) network is conducted. It is begun with a survey of existing research efforts in network topology design. Then a new approach for topology design is presented. It uses an efficient algorithm to generate candidate network designs (consisting of subsets of the set of all network components) in increasing order of their total costs, and checks each design to see if it forms an acceptable network. This technique gives the true cost-optimal network, and is particularly useful when the network has many constraints and not too many components. The algorithm for generating subsets is described in detail, and various aspects of the overall design procedure are discussed. Two more efficient versions of this algorithm (applicable in specific situations) are also given. Next, two important aspects of network performance analysis: network reliability and message delays are discussed. A new model is introduced to study the reliability of a network with dependent failures. For message delays, a collection of formulas from existing research results is given to compute or estimate the delays of messages in a communication network without making the independence assumption. The design algorithm coded in PASCAL is included as an appendix.

Li, V. O. K.↗

Hyperswitch communication network

The Hyperswitch Communication Network (HCN) is a large scale parallel computer prototype being developed at JPL. Commercial versions of the HCN computer are planned. The HCN computer being designed is a message passing multiple instruction multiple data (MIMD) computer, and offers many advantages in price-performance ratio, reliability and availability, and manufacturing over traditional uniprocessors and bus based multiprocessors. The design of the HCN operating system is a uniquely flexible environment that combines both parallel processing and distributed processing. This programming paradigm can achieve a balance among the following competing factors: performance in processing and communications, user friendliness, and fault tolerance. The prototype is being designed to accommodate a maximum of 64 state of the art microprocessors. The HCN is classified as a distributed supercomputer. The HCN system is described, and the performance/cost analysis and other competing factors within the system design are reviewed.

Peterson, J.↗

General aviation design synthesis utilizing interactive computer graphics

Interactive computer graphics is a fast growing area of computer application, due to such factors as substantial cost reductions in hardware, general availability of software, and expanded data communication networks. In addition to allowing faster and more meaningful input/output, computer graphics permits the use of data in graphic form to carry out parametric studies for configuration selection and for assessing the impact of advanced technologies on general aviation designs. The incorporation of interactive computer graphics into a NASA developed general aviation synthesis program is described, and the potential uses of the synthesis program in preliminary design are demonstrated.

Galloway, T. L.↗